Repository files (latest commit first)

Filename	Latest commit message	Latest commit date
Zhiwu Song 684f741446 ARM: CSR: add rtc i/o bridge interface for SiRFprimaII ... The module is a bridge between the RTC clock domain and the CPU interface clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through this module. Signed-off-by: Zhiwu Song <zhiwu.song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Arnd Bergmann <arnd@arndb.de>		2011-09-11 09:17:53 +08:00
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m48t59.h
sirfsoc_rtciobrg.h	ARM: CSR: add rtc i/o bridge interface for SiRFprimaII	2011-09-11 09:17:53 +08:00