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ae77cbc1e7
This change adds TILE-Gx SIMD instructions to the software raid (md), modeling the Altivec implementation. This is only for Syndrome generation; there is more that could be done to improve recovery, as in the recent Intel SSE3 recovery implementation. The code unrolls 8 times; this turns out to be the best on tilegx hardware among the set 1, 2, 4, 8 or 16. The code reads one cache-line of data from each disk, stores P and Q then goes to the next cache-line. The test code in sys/linux/lib/raid6/test reports 2008 MB/s data read rate for syndrome generation using 18 disks (16 data and 2 parity). It was 1512 MB/s before this SIMD optimizations. This is running on 1 core with all the data in cache. This is based on the paper The Mathematics of RAID-6. (http://kernel.org/pub/linux/kernel/people/hpa/raid6.pdf). Signed-off-by: Ken Steele <ken@tilera.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: NeilBrown <neilb@suse.de> |
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| .. | ||
| test | ||
| .gitignore | ||
| algos.c | ||
| altivec.uc | ||
| avx2.c | ||
| int.uc | ||
| Makefile | ||
| mktables.c | ||
| mmx.c | ||
| recov.c | ||
| recov_avx2.c | ||
| recov_ssse3.c | ||
| sse1.c | ||
| sse2.c | ||
| tilegx.uc | ||
| unroll.awk | ||
| x86.h | ||