mirror of
https://github.com/a52xq-dev/kernel.git
synced 2026-10-18 21:58:11 +07:00
This is the 4.19.75 stable release
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Merge 4.19.75 into android-4.19
Changes in 4.19.75
netfilter: nf_flow_table: set default timeout after successful insertion
HID: wacom: generic: read HID_DG_CONTACTMAX from any feature report
RDMA/restrack: Release task struct which was hold by CM_ID object
Input: elan_i2c - remove Lenovo Legion Y7000 PnpID
powerpc/mm/radix: Use the right page size for vmemmap mapping
USB: usbcore: Fix slab-out-of-bounds bug during device reset
media: tm6000: double free if usb disconnect while streaming
phy: renesas: rcar-gen3-usb2: Disable clearing VBUS in over-current
ip6_gre: fix a dst leak in ip6erspan_tunnel_xmit
udp: correct reuseport selection with connected sockets
xen-netfront: do not assume sk_buff_head list is empty in error handling
net_sched: let qdisc_put() accept NULL pointer
KVM: coalesced_mmio: add bounds checking
firmware: google: check if size is valid when decoding VPD data
serial: sprd: correct the wrong sequence of arguments
tty/serial: atmel: reschedule TX after RX was started
mwifiex: Fix three heap overflow at parsing element in cfg80211_ap_settings
nl80211: Fix possible Spectre-v1 for CQM RSSI thresholds
ieee802154: hwsim: Fix error handle path in hwsim_init_module
ieee802154: hwsim: unregister hw while hwsim_subscribe_all_others fails
ARM: dts: am57xx: Disable voltage switching for SD card
ARM: OMAP2+: Fix missing SYSC_HAS_RESET_STATUS for dra7 epwmss
bus: ti-sysc: Fix using configured sysc mask value
s390/bpf: fix lcgr instruction encoding
ARM: OMAP2+: Fix omap4 errata warning on other SoCs
ARM: dts: dra74x: Fix iodelay configuration for mmc3
ARM: OMAP1: ams-delta-fiq: Fix missing irq_ack
bus: ti-sysc: Simplify cleanup upon failures in sysc_probe()
s390/bpf: use 32-bit index for tail calls
selftests/bpf: fix "bind{4, 6} deny specific IP & port" on s390
tools: bpftool: close prog FD before exit on showing a single program
fpga: altera-ps-spi: Fix getting of optional confd gpio
netfilter: ebtables: Fix argument order to ADD_COUNTER
netfilter: nft_flow_offload: missing netlink attribute policy
netfilter: xt_nfacct: Fix alignment mismatch in xt_nfacct_match_info
NFSv4: Fix return values for nfs4_file_open()
NFSv4: Fix return value in nfs_finish_open()
NFS: Fix initialisation of I/O result struct in nfs_pgio_rpcsetup
Kconfig: Fix the reference to the IDT77105 Phy driver in the description of ATM_NICSTAR_USE_IDT77105
xdp: unpin xdp umem pages in error path
qed: Add cleanup in qed_slowpath_start()
ARM: 8874/1: mm: only adjust sections of valid mm structures
batman-adv: Only read OGM2 tvlv_len after buffer len check
bpf: allow narrow loads of some sk_reuseport_md fields with offset > 0
r8152: Set memory to all 0xFFs on failed reg reads
x86/apic: Fix arch_dynirq_lower_bound() bug for DT enabled machines
netfilter: xt_physdev: Fix spurious error message in physdev_mt_check
netfilter: nf_conntrack_ftp: Fix debug output
NFSv2: Fix eof handling
NFSv2: Fix write regression
kallsyms: Don't let kallsyms_lookup_size_offset() fail on retrieving the first symbol
cifs: set domainName when a domain-key is used in multiuser
cifs: Use kzfree() to zero out the password
usb: host: xhci-tegra: Set DMA mask correctly
ARM: 8901/1: add a criteria for pfn_valid of arm
ibmvnic: Do not process reset during or after device removal
sky2: Disable MSI on yet another ASUS boards (P6Xxxx)
i2c: designware: Synchronize IRQs when unregistering slave client
perf/x86/intel: Restrict period on Nehalem
perf/x86/amd/ibs: Fix sample bias for dispatched micro-ops
amd-xgbe: Fix error path in xgbe_mod_init()
tools/power x86_energy_perf_policy: Fix "uninitialized variable" warnings at -O2
tools/power x86_energy_perf_policy: Fix argument parsing
tools/power turbostat: fix buffer overrun
net: aquantia: fix out of memory condition on rx side
net: seeq: Fix the function used to release some memory in an error handling path
dmaengine: ti: dma-crossbar: Fix a memory leak bug
dmaengine: ti: omap-dma: Add cleanup in omap_dma_probe()
x86/uaccess: Don't leak the AC flags into __get_user() argument evaluation
x86/hyper-v: Fix overflow bug in fill_gva_list()
keys: Fix missing null pointer check in request_key_auth_describe()
iommu/amd: Flush old domains in kdump kernel
iommu/amd: Fix race in increase_address_space()
PCI: kirin: Fix section mismatch warning
ovl: fix regression caused by overlapping layers detection
floppy: fix usercopy direction
binfmt_elf: move brk out of mmap when doing direct loader exec
arm64: kpti: Whitelist Cortex-A CPUs that don't implement the CSV3 field
media: technisat-usb2: break out of loop at end of buffer
Linux 4.19.75
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I1dd841f112ee81497cd085b102979f45ee5e6b9d
This commit is contained in:
Greg Kroah-Hartman
commit
de5730eaef
91 changed files with 560 additions and 288 deletions
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@ -325,7 +325,7 @@ beneath or above the path of another overlay lower layer path.
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Using an upper layer path and/or a workdir path that are already used by
|
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another overlay mount is not allowed and may fail with EBUSY. Using
|
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partially overlapping paths is not allowed but will not fail with EBUSY.
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partially overlapping paths is not allowed and may fail with EBUSY.
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If files are accessed from two overlayfs mounts which share or overlap the
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upper layer and/or workdir path the behavior of the overlay is undefined,
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though it will not result in a crash or deadlock.
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2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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|||
# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
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PATCHLEVEL = 19
|
||||
SUBLEVEL = 74
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SUBLEVEL = 75
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EXTRAVERSION =
|
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NAME = "People's Front"
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@ -98,14 +98,9 @@
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
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};
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&mmc2 {
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@ -20,14 +20,9 @@
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
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};
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&mmc2 {
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@ -24,14 +24,9 @@
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_default>;
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pinctrl-3 = <&mmc1_pins_hs>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_conf>;
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pinctrl-6 = <&mmc1_pins_ddr50 &mmc1_iodelay_sdr104_conf>;
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};
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&mmc2 {
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@ -433,6 +433,7 @@
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bus-width = <4>;
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cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
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no-1-8-v;
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};
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&mmc2 {
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@ -19,14 +19,9 @@
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
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vmmc-supply = <&vdd_3v3>;
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vqmmc-supply = <&ldo1_reg>;
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};
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@ -19,14 +19,9 @@
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
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vmmc-supply = <&vdd_3v3>;
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vqmmc-supply = <&ldo1_reg>;
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};
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@ -32,7 +32,7 @@
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*
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* Datamanual Revisions:
|
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*
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* AM572x Silicon Revision 2.0: SPRS953B, Revised November 2016
|
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* AM572x Silicon Revision 2.0: SPRS953F, Revised May 2019
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* AM572x Silicon Revision 1.1: SPRS915R, Revised November 2016
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*
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*/
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@ -229,45 +229,45 @@
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mmc3_pins_default: mmc3_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
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DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
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DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
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DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
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DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
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DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
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DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
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DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
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DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
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DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
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DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
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DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
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>;
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};
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mmc3_pins_hs: mmc3_pins_hs {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
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DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
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DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
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DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
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DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
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DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
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DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
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DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
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DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
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DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
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DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
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DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
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||||
>;
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||||
};
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mmc3_pins_sdr12: mmc3_pins_sdr12 {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
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DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
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DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
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DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
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DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
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DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
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DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
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DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
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DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
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||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
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DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
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||||
>;
|
||||
};
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|
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mmc3_pins_sdr25: mmc3_pins_sdr25 {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
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DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
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DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
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DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -135,6 +135,8 @@ restart:
|
|||
orr r11, r11, r13 @ mask all requested interrupts
|
||||
str r11, [r12, #OMAP1510_GPIO_INT_MASK]
|
||||
|
||||
str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts
|
||||
|
||||
ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set?
|
||||
beq hksw @ no - try next source
|
||||
|
||||
|
|
@ -142,7 +144,6 @@ restart:
|
|||
@@@@@@@@@@@@@@@@@@@@@@
|
||||
@ Keyboard clock FIQ mode interrupt handler
|
||||
@ r10 now contains KEYBRD_CLK_MASK, use it
|
||||
str r10, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack the interrupt
|
||||
bic r11, r11, r10 @ unmask it
|
||||
str r11, [r12, #OMAP1510_GPIO_INT_MASK]
|
||||
|
||||
|
|
|
|||
|
|
@ -73,9 +73,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
|
|||
* interrupts default to since commit 80ac93c27441
|
||||
* requires interrupt already acked and unmasked.
|
||||
*/
|
||||
if (irq_chip->irq_ack)
|
||||
irq_chip->irq_ack(d);
|
||||
if (irq_chip->irq_unmask)
|
||||
if (!WARN_ON_ONCE(!irq_chip->irq_unmask))
|
||||
irq_chip->irq_unmask(d);
|
||||
}
|
||||
for (; irq_counter[gpio] < fiq_count; irq_counter[gpio]++)
|
||||
|
|
|
|||
|
|
@ -131,6 +131,9 @@ static int __init omap4_sram_init(void)
|
|||
struct device_node *np;
|
||||
struct gen_pool *sram_pool;
|
||||
|
||||
if (!soc_is_omap44xx() && !soc_is_omap54xx())
|
||||
return 0;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
|
||||
if (!np)
|
||||
pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
|
||||
|
|
|
|||
|
|
@ -385,7 +385,8 @@ static struct omap_hwmod dra7xx_dcan2_hwmod = {
|
|||
static struct omap_hwmod_class_sysconfig dra7xx_epwmss_sysc = {
|
||||
.rev_offs = 0x0,
|
||||
.sysc_offs = 0x4,
|
||||
.sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET,
|
||||
.sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_RESET_STATUS,
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -196,6 +196,11 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max_low,
|
|||
#ifdef CONFIG_HAVE_ARCH_PFN_VALID
|
||||
int pfn_valid(unsigned long pfn)
|
||||
{
|
||||
phys_addr_t addr = __pfn_to_phys(pfn);
|
||||
|
||||
if (__phys_to_pfn(addr) != pfn)
|
||||
return 0;
|
||||
|
||||
return memblock_is_map_memory(__pfn_to_phys(pfn));
|
||||
}
|
||||
EXPORT_SYMBOL(pfn_valid);
|
||||
|
|
@ -713,7 +718,8 @@ static void update_sections_early(struct section_perm perms[], int n)
|
|||
if (t->flags & PF_KTHREAD)
|
||||
continue;
|
||||
for_each_thread(t, s)
|
||||
set_section_perms(perms, n, true, s->mm);
|
||||
if (s->mm)
|
||||
set_section_perms(perms, n, true, s->mm);
|
||||
}
|
||||
set_section_perms(perms, n, true, current->active_mm);
|
||||
set_section_perms(perms, n, true, &init_mm);
|
||||
|
|
|
|||
|
|
@ -895,6 +895,12 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
|
|||
static const struct midr_range kpti_safe_list[] = {
|
||||
MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2),
|
||||
MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A35),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
char const *str = "command line option";
|
||||
|
|
|
|||
|
|
@ -521,14 +521,6 @@ void __init radix__early_init_devtree(void)
|
|||
mmu_psize_defs[MMU_PAGE_64K].shift = 16;
|
||||
mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
|
||||
found:
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
if (mmu_psize_defs[MMU_PAGE_2M].shift) {
|
||||
/*
|
||||
* map vmemmap using 2M if available
|
||||
*/
|
||||
mmu_vmemmap_psize = MMU_PAGE_2M;
|
||||
}
|
||||
#endif /* CONFIG_SPARSEMEM_VMEMMAP */
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -567,7 +559,13 @@ void __init radix__early_init_mmu(void)
|
|||
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
/* vmemmap mapping */
|
||||
mmu_vmemmap_psize = mmu_virtual_psize;
|
||||
if (mmu_psize_defs[MMU_PAGE_2M].shift) {
|
||||
/*
|
||||
* map vmemmap using 2M if available
|
||||
*/
|
||||
mmu_vmemmap_psize = MMU_PAGE_2M;
|
||||
} else
|
||||
mmu_vmemmap_psize = mmu_virtual_psize;
|
||||
#endif
|
||||
/*
|
||||
* initialize page table size
|
||||
|
|
|
|||
|
|
@ -841,7 +841,7 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i
|
|||
break;
|
||||
case BPF_ALU64 | BPF_NEG: /* dst = -dst */
|
||||
/* lcgr %dst,%dst */
|
||||
EMIT4(0xb9130000, dst_reg, dst_reg);
|
||||
EMIT4(0xb9030000, dst_reg, dst_reg);
|
||||
break;
|
||||
/*
|
||||
* BPF_FROM_BE/LE
|
||||
|
|
@ -1015,8 +1015,8 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i
|
|||
/* llgf %w1,map.max_entries(%b2) */
|
||||
EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2,
|
||||
offsetof(struct bpf_array, map.max_entries));
|
||||
/* clgrj %b3,%w1,0xa,label0: if %b3 >= %w1 goto out */
|
||||
EMIT6_PCREL_LABEL(0xec000000, 0x0065, BPF_REG_3,
|
||||
/* clrj %b3,%w1,0xa,label0: if (u32)%b3 >= (u32)%w1 goto out */
|
||||
EMIT6_PCREL_LABEL(0xec000000, 0x0077, BPF_REG_3,
|
||||
REG_W1, 0, 0xa);
|
||||
|
||||
/*
|
||||
|
|
@ -1042,8 +1042,10 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i
|
|||
* goto out;
|
||||
*/
|
||||
|
||||
/* sllg %r1,%b3,3: %r1 = index * 8 */
|
||||
EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, BPF_REG_3, REG_0, 3);
|
||||
/* llgfr %r1,%b3: %r1 = (u32) index */
|
||||
EMIT4(0xb9160000, REG_1, BPF_REG_3);
|
||||
/* sllg %r1,%r1,3: %r1 *= 8 */
|
||||
EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, REG_1, REG_0, 3);
|
||||
/* lg %r1,prog(%b2,%r1) */
|
||||
EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2,
|
||||
REG_1, offsetof(struct bpf_array, ptrs));
|
||||
|
|
|
|||
|
|
@ -672,10 +672,17 @@ fail:
|
|||
|
||||
throttle = perf_event_overflow(event, &data, ®s);
|
||||
out:
|
||||
if (throttle)
|
||||
if (throttle) {
|
||||
perf_ibs_stop(event, 0);
|
||||
else
|
||||
perf_ibs_enable_event(perf_ibs, hwc, period >> 4);
|
||||
} else {
|
||||
period >>= 4;
|
||||
|
||||
if ((ibs_caps & IBS_CAPS_RDWROPCNT) &&
|
||||
(*config & IBS_OP_CNT_CTL))
|
||||
period |= *config & IBS_OP_CUR_CNT_RAND;
|
||||
|
||||
perf_ibs_enable_event(perf_ibs, hwc, period);
|
||||
}
|
||||
|
||||
perf_event_update_userpage(event);
|
||||
|
||||
|
|
|
|||
|
|
@ -3319,6 +3319,11 @@ static u64 bdw_limit_period(struct perf_event *event, u64 left)
|
|||
return left;
|
||||
}
|
||||
|
||||
static u64 nhm_limit_period(struct perf_event *event, u64 left)
|
||||
{
|
||||
return max(left, 32ULL);
|
||||
}
|
||||
|
||||
PMU_FORMAT_ATTR(event, "config:0-7" );
|
||||
PMU_FORMAT_ATTR(umask, "config:8-15" );
|
||||
PMU_FORMAT_ATTR(edge, "config:18" );
|
||||
|
|
@ -4115,6 +4120,7 @@ __init int intel_pmu_init(void)
|
|||
x86_pmu.pebs_constraints = intel_nehalem_pebs_event_constraints;
|
||||
x86_pmu.enable_all = intel_pmu_nhm_enable_all;
|
||||
x86_pmu.extra_regs = intel_nehalem_extra_regs;
|
||||
x86_pmu.limit_period = nhm_limit_period;
|
||||
|
||||
x86_pmu.cpu_events = nhm_events_attrs;
|
||||
|
||||
|
|
|
|||
|
|
@ -37,12 +37,14 @@ static inline int fill_gva_list(u64 gva_list[], int offset,
|
|||
* Lower 12 bits encode the number of additional
|
||||
* pages to flush (in addition to the 'cur' page).
|
||||
*/
|
||||
if (diff >= HV_TLB_FLUSH_UNIT)
|
||||
if (diff >= HV_TLB_FLUSH_UNIT) {
|
||||
gva_list[gva_n] |= ~PAGE_MASK;
|
||||
else if (diff)
|
||||
cur += HV_TLB_FLUSH_UNIT;
|
||||
} else if (diff) {
|
||||
gva_list[gva_n] |= (diff - 1) >> PAGE_SHIFT;
|
||||
cur = end;
|
||||
}
|
||||
|
||||
cur += HV_TLB_FLUSH_UNIT;
|
||||
gva_n++;
|
||||
|
||||
} while (cur < end);
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue