mirror of
https://github.com/a52xq-dev/kernel.git
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This is the 4.19.60 stable release
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAl00DjYACgkQONu9yGCS aT7O6hAAqqs1jm+vztbAJTyZPR+Vu7yGO1BukoyoqA3iUm7JPW0/Xamp+e/nOjq3 UrRKcn6WvIdDv22ikrR1qfFTFZYYCZfe4LWvzuUNsscr0dixW6iYoiSr5RDypH0C VIYZfEMaZ5G1R07jO7u8HWXAjAm+xqvxZRgARu9H0tk9As1+yW1kYFnQubdpIyoA 3zsTTQ+Dsyzc5mQQXBi88VnNpnI2PZGDAyaYmqfe7iuiIZ6qvjYZ245GygVb5Qlo 9yGKuxqRc7Lrd34f6t/0w2CwZuj8lbpt7twcdLXOjg/EjcouwBnX5smoq8oo5UIK kNSRsV0pfxhLt7EXViuRFduJIinViaYJY7guzWon3O9HXjO6OlUIhM65WRvwuxhz NuM1ctOfDqiyDzJ0NEp7tROsmkV3Un/DFHrePWGvcQ25lFxJMLtXUQDf/39cNkP2 iiWDSDOAXzgskfzpxmfRYyXO2/u2cjnmdUil27+/B54vYYM4XemBn07uc6zJZhJ/ spq2Hg/i/7gaAaoqRgoHvYLajlUytvetJMhdAZYhEpHL2/1gxE6SXI9LypV3096a FgdEfAghf0yY6FzaOXVb1PlqgbkigWtf8vo7Wmr25mNrg01678UTqGi2soCMhLXz OAGtOvPKcmD6wTY3gZlEzzVxoX0eCXUUVgK6TZFsMbmJb3+Y9yA= =Uqvz -----END PGP SIGNATURE----- Merge 4.19.60 into android-4.19 Changes in 4.19.60 Revert "e1000e: fix cyclic resets at link up with active tx" e1000e: start network tx queue only when link is up Input: synaptics - enable SMBUS on T480 thinkpad trackpad nilfs2: do not use unexported cpu_to_le32()/le32_to_cpu() in uapi header drivers: base: cacheinfo: Ensure cpu hotplug work is done before Intel RDT firmware: improve LSM/IMA security behaviour irqchip/gic-v3-its: Fix command queue pointer comparison bug clk: ti: clkctrl: Fix returning uninitialized data efi/bgrt: Drop BGRT status field reserved bits check perf/core: Fix perf_sample_regs_user() mm check ARM: dts: gemini Fix up DNS-313 compatible string ARM: omap2: remove incorrect __init annotation afs: Fix uninitialised spinlock afs_volume::cb_break_lock x86/apic: Fix integer overflow on 10 bit left shift of cpu_khz be2net: fix link failure after ethtool offline test ppp: mppe: Add softdep to arc4 sis900: fix TX completion ARM: dts: imx6ul: fix PWM[1-4] interrupts pinctrl: mcp23s08: Fix add_data and irqchip_add_nested call order dm table: don't copy from a NULL pointer in realloc_argv() dm verity: use message limit for data block corruption message x86/boot/64: Fix crash if kernel image crosses page table boundary x86/boot/64: Add missing fixup_pointer() for next_early_pgt access HID: chicony: add another quirk for PixArt mouse HID: multitouch: Add pointstick support for ALPS Touchpad pinctrl: mediatek: Ignore interrupts that are wake only during resume cpu/hotplug: Fix out-of-bounds read when setting fail state pinctrl: mediatek: Update cur_mask in mask/mask ops linux/kernel.h: fix overflow for DIV_ROUND_UP_ULL genirq: Delay deactivation in free_irq() genirq: Fix misleading synchronize_irq() documentation genirq: Add optional hardware synchronization for shutdown x86/ioapic: Implement irq_get_irqchip_state() callback x86/irq: Handle spurious interrupt after shutdown gracefully x86/irq: Seperate unused system vectors from spurious entry again ARC: hide unused function unw_hdr_alloc s390: fix stfle zero padding s390/qdio: (re-)initialize tiqdio list entries s390/qdio: don't touch the dsci in tiqdio_add_input_queues() crypto: talitos - move struct talitos_edesc into talitos.h crypto: talitos - fix hash on SEC1. crypto/NX: Set receive window credits to max number of CRBs in RxFIFO regmap-irq: do not write mask register if mask_base is zero drm/udl: introduce a macro to convert dev to udl. drm/udl: Replace drm_dev_unref with drm_dev_put drm/udl: move to embedding drm device inside udl device. x86/entry/32: Fix ENDPROC of common_spurious Linux 4.19.60 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I283306f8640e06b3ffe8bcdca1478a0fd3af77db
This commit is contained in:
Greg Kroah-Hartman
commit
bafa20fa20
56 changed files with 533 additions and 266 deletions
2
Makefile
2
Makefile
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|
@ -1,7 +1,7 @@
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|||
# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
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PATCHLEVEL = 19
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SUBLEVEL = 59
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SUBLEVEL = 60
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EXTRAVERSION =
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NAME = "People's Front"
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@ -185,11 +185,6 @@ static void *__init unw_hdr_alloc_early(unsigned long sz)
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MAX_DMA_ADDRESS);
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}
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static void *unw_hdr_alloc(unsigned long sz)
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{
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return kmalloc(sz, GFP_KERNEL);
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}
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static void init_unwind_table(struct unwind_table *table, const char *name,
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const void *core_start, unsigned long core_size,
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const void *init_start, unsigned long init_size,
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@ -370,6 +365,10 @@ ret_err:
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}
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#ifdef CONFIG_MODULES
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static void *unw_hdr_alloc(unsigned long sz)
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{
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return kmalloc(sz, GFP_KERNEL);
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}
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static struct unwind_table *last_table;
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@ -11,7 +11,7 @@
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/ {
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model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
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compatible = "dlink,dir-313", "cortina,gemini";
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compatible = "dlink,dns-313", "cortina,gemini";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -359,7 +359,7 @@
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pwm1: pwm@2080000 {
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compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
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reg = <0x02080000 0x4000>;
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6UL_CLK_PWM1>,
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<&clks IMX6UL_CLK_PWM1>;
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clock-names = "ipg", "per";
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@ -370,7 +370,7 @@
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pwm2: pwm@2084000 {
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compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
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reg = <0x02084000 0x4000>;
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interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6UL_CLK_PWM2>,
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<&clks IMX6UL_CLK_PWM2>;
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clock-names = "ipg", "per";
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@ -381,7 +381,7 @@
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pwm3: pwm@2088000 {
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compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
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reg = <0x02088000 0x4000>;
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interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6UL_CLK_PWM3>,
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<&clks IMX6UL_CLK_PWM3>;
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clock-names = "ipg", "per";
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@ -392,7 +392,7 @@
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pwm4: pwm@208c000 {
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compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
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reg = <0x0208c000 0x4000>;
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interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6UL_CLK_PWM4>,
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<&clks IMX6UL_CLK_PWM4>;
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clock-names = "ipg", "per";
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@ -433,7 +433,7 @@ static void omap3_prm_reconfigure_io_chain(void)
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* registers, and omap3xxx_prm_reconfigure_io_chain() must be called.
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* No return value.
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*/
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static void __init omap3xxx_prm_enable_io_wakeup(void)
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static void omap3xxx_prm_enable_io_wakeup(void)
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{
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if (prm_features & PRM_HAS_IO_WAKEUP)
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omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
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@ -59,6 +59,18 @@ static inline int test_facility(unsigned long nr)
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return __test_facility(nr, &S390_lowcore.stfle_fac_list);
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}
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static inline unsigned long __stfle_asm(u64 *stfle_fac_list, int size)
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{
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register unsigned long reg0 asm("0") = size - 1;
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asm volatile(
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".insn s,0xb2b00000,0(%1)" /* stfle */
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: "+d" (reg0)
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: "a" (stfle_fac_list)
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: "memory", "cc");
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return reg0;
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}
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/**
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* stfle - Store facility list extended
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* @stfle_fac_list: array where facility list can be stored
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@ -76,13 +88,8 @@ static inline void stfle(u64 *stfle_fac_list, int size)
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memcpy(stfle_fac_list, &S390_lowcore.stfl_fac_list, 4);
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if (S390_lowcore.stfl_fac_list & 0x01000000) {
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/* More facility bits available with stfle */
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register unsigned long reg0 asm("0") = size - 1;
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asm volatile(".insn s,0xb2b00000,0(%1)" /* stfle */
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: "+d" (reg0)
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: "a" (stfle_fac_list)
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: "memory", "cc");
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nr = (reg0 + 1) * 8; /* # bytes stored by stfle */
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nr = __stfle_asm(stfle_fac_list, size);
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nr = min_t(unsigned long, (nr + 1) * 8, size * 8);
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}
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memset((char *) stfle_fac_list + nr, 0, size * 8 - nr);
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preempt_enable();
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@ -1098,6 +1098,30 @@ ENTRY(irq_entries_start)
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.endr
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END(irq_entries_start)
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#ifdef CONFIG_X86_LOCAL_APIC
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.align 8
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ENTRY(spurious_entries_start)
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vector=FIRST_SYSTEM_VECTOR
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.rept (NR_VECTORS - FIRST_SYSTEM_VECTOR)
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pushl $(~vector+0x80) /* Note: always in signed byte range */
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vector=vector+1
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jmp common_spurious
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.align 8
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.endr
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END(spurious_entries_start)
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common_spurious:
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ASM_CLAC
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addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
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SAVE_ALL switch_stacks=1
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ENCODE_FRAME_POINTER
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TRACE_IRQS_OFF
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movl %esp, %eax
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call smp_spurious_interrupt
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jmp ret_from_intr
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ENDPROC(common_spurious)
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#endif
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/*
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* the CPU automatically disables interrupts when executing an IRQ vector,
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* so IRQ-flags tracing has to follow that:
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@ -438,6 +438,18 @@ ENTRY(irq_entries_start)
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.endr
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END(irq_entries_start)
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.align 8
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ENTRY(spurious_entries_start)
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vector=FIRST_SYSTEM_VECTOR
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.rept (NR_VECTORS - FIRST_SYSTEM_VECTOR)
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UNWIND_HINT_IRET_REGS
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pushq $(~vector+0x80) /* Note: always in signed byte range */
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jmp common_spurious
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.align 8
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vector=vector+1
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.endr
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END(spurious_entries_start)
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.macro DEBUG_ENTRY_ASSERT_IRQS_OFF
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#ifdef CONFIG_DEBUG_ENTRY
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pushq %rax
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@ -634,10 +646,20 @@ _ASM_NOKPROBE(interrupt_entry)
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/* Interrupt entry/exit. */
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/*
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* The interrupt stubs push (~vector+0x80) onto the stack and
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* then jump to common_interrupt.
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*/
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/*
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* The interrupt stubs push (~vector+0x80) onto the stack and
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* then jump to common_spurious/interrupt.
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*/
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common_spurious:
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addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
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call interrupt_entry
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UNWIND_HINT_REGS indirect=1
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call smp_spurious_interrupt /* rdi points to pt_regs */
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jmp ret_from_intr
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END(common_spurious)
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_ASM_NOKPROBE(common_spurious)
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/* common_interrupt is a hotpath. Align it */
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.p2align CONFIG_X86_L1_CACHE_SHIFT
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common_interrupt:
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addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
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@ -150,8 +150,11 @@ extern char irq_entries_start[];
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#define trace_irq_entries_start irq_entries_start
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#endif
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extern char spurious_entries_start[];
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#define VECTOR_UNUSED NULL
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#define VECTOR_RETRIGGERED ((void *)~0UL)
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#define VECTOR_SHUTDOWN ((void *)~0UL)
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#define VECTOR_RETRIGGERED ((void *)~1UL)
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typedef struct irq_desc* vector_irq_t[NR_VECTORS];
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DECLARE_PER_CPU(vector_irq_t, vector_irq);
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@ -1452,7 +1452,8 @@ static void apic_pending_intr_clear(void)
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if (queued) {
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if (boot_cpu_has(X86_FEATURE_TSC) && cpu_khz) {
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ntsc = rdtsc();
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max_loops = (cpu_khz << 10) - (ntsc - tsc);
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max_loops = (long long)cpu_khz << 10;
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max_loops -= ntsc - tsc;
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} else {
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max_loops--;
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}
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@ -2026,21 +2027,32 @@ __visible void __irq_entry smp_spurious_interrupt(struct pt_regs *regs)
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entering_irq();
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trace_spurious_apic_entry(vector);
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/*
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* Check if this really is a spurious interrupt and ACK it
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* if it is a vectored one. Just in case...
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* Spurious interrupts should not be ACKed.
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*/
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v = apic_read(APIC_ISR + ((vector & ~0x1f) >> 1));
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if (v & (1 << (vector & 0x1f)))
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ack_APIC_irq();
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inc_irq_stat(irq_spurious_count);
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/* see sw-dev-man vol 3, chapter 7.4.13.5 */
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pr_info("spurious APIC interrupt through vector %02x on CPU#%d, "
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"should never happen.\n", vector, smp_processor_id());
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/*
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* If this is a spurious interrupt then do not acknowledge
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*/
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if (vector == SPURIOUS_APIC_VECTOR) {
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/* See SDM vol 3 */
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pr_info("Spurious APIC interrupt (vector 0xFF) on CPU#%d, should never happen.\n",
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smp_processor_id());
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goto out;
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}
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/*
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* If it is a vectored one, verify it's set in the ISR. If set,
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* acknowledge it.
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*/
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v = apic_read(APIC_ISR + ((vector & ~0x1f) >> 1));
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if (v & (1 << (vector & 0x1f))) {
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pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Acked\n",
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vector, smp_processor_id());
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ack_APIC_irq();
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} else {
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pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Not pending!\n",
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vector, smp_processor_id());
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}
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out:
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trace_spurious_apic_exit(vector);
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exiting_irq();
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}
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|
|
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@ -1891,6 +1891,50 @@ static int ioapic_set_affinity(struct irq_data *irq_data,
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return ret;
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}
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/*
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* Interrupt shutdown masks the ioapic pin, but the interrupt might already
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* be in flight, but not yet serviced by the target CPU. That means
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* __synchronize_hardirq() would return and claim that everything is calmed
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* down. So free_irq() would proceed and deactivate the interrupt and free
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* resources.
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*
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* Once the target CPU comes around to service it it will find a cleared
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* vector and complain. While the spurious interrupt is harmless, the full
|
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* release of resources might prevent the interrupt from being acknowledged
|
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* which keeps the hardware in a weird state.
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*
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* Verify that the corresponding Remote-IRR bits are clear.
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*/
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static int ioapic_irq_get_chip_state(struct irq_data *irqd,
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enum irqchip_irq_state which,
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bool *state)
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{
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struct mp_chip_data *mcd = irqd->chip_data;
|
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struct IO_APIC_route_entry rentry;
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struct irq_pin_list *p;
|
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if (which != IRQCHIP_STATE_ACTIVE)
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return -EINVAL;
|
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|
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*state = false;
|
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raw_spin_lock(&ioapic_lock);
|
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for_each_irq_pin(p, mcd->irq_2_pin) {
|
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rentry = __ioapic_read_entry(p->apic, p->pin);
|
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/*
|
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* The remote IRR is only valid in level trigger mode. It's
|
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* meaning is undefined for edge triggered interrupts and
|
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* irrelevant because the IO-APIC treats them as fire and
|
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* forget.
|
||||
*/
|
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if (rentry.irr && rentry.trigger) {
|
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*state = true;
|
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break;
|
||||
}
|
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}
|
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raw_spin_unlock(&ioapic_lock);
|
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return 0;
|
||||
}
|
||||
|
||||
static struct irq_chip ioapic_chip __read_mostly = {
|
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.name = "IO-APIC",
|
||||
.irq_startup = startup_ioapic_irq,
|
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|
|
@ -1900,6 +1944,7 @@ static struct irq_chip ioapic_chip __read_mostly = {
|
|||
.irq_eoi = ioapic_ack_level,
|
||||
.irq_set_affinity = ioapic_set_affinity,
|
||||
.irq_retrigger = irq_chip_retrigger_hierarchy,
|
||||
.irq_get_irqchip_state = ioapic_irq_get_chip_state,
|
||||
.flags = IRQCHIP_SKIP_SET_WAKE,
|
||||
};
|
||||
|
||||
|
|
@ -1912,6 +1957,7 @@ static struct irq_chip ioapic_ir_chip __read_mostly = {
|
|||
.irq_eoi = ioapic_ir_ack_level,
|
||||
.irq_set_affinity = ioapic_set_affinity,
|
||||
.irq_retrigger = irq_chip_retrigger_hierarchy,
|
||||
.irq_get_irqchip_state = ioapic_irq_get_chip_state,
|
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.flags = IRQCHIP_SKIP_SET_WAKE,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -342,7 +342,7 @@ static void clear_irq_vector(struct irq_data *irqd)
|
|||
trace_vector_clear(irqd->irq, vector, apicd->cpu, apicd->prev_vector,
|
||||
apicd->prev_cpu);
|
||||
|
||||
per_cpu(vector_irq, apicd->cpu)[vector] = VECTOR_UNUSED;
|
||||
per_cpu(vector_irq, apicd->cpu)[vector] = VECTOR_SHUTDOWN;
|
||||
irq_matrix_free(vector_matrix, apicd->cpu, vector, managed);
|
||||
apicd->vector = 0;
|
||||
|
||||
|
|
@ -351,7 +351,7 @@ static void clear_irq_vector(struct irq_data *irqd)
|
|||
if (!vector)
|
||||
return;
|
||||
|
||||
per_cpu(vector_irq, apicd->prev_cpu)[vector] = VECTOR_UNUSED;
|
||||
per_cpu(vector_irq, apicd->prev_cpu)[vector] = VECTOR_SHUTDOWN;
|
||||
irq_matrix_free(vector_matrix, apicd->prev_cpu, vector, managed);
|
||||
apicd->prev_vector = 0;
|
||||
apicd->move_in_progress = 0;
|
||||
|
|
|
|||
|
|
@ -184,24 +184,25 @@ unsigned long __head __startup_64(unsigned long physaddr,
|
|||
pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();
|
||||
|
||||
if (la57) {
|
||||
p4d = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr);
|
||||
p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++],
|
||||
physaddr);
|
||||
|
||||
i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
|
||||
pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;
|
||||
pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;
|
||||
|
||||
i = (physaddr >> P4D_SHIFT) % PTRS_PER_P4D;
|
||||
p4d[i + 0] = (pgdval_t)pud + pgtable_flags;
|
||||
p4d[i + 1] = (pgdval_t)pud + pgtable_flags;
|
||||
i = physaddr >> P4D_SHIFT;
|
||||
p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
|
||||
p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
|
||||
} else {
|
||||
i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
|
||||
pgd[i + 0] = (pgdval_t)pud + pgtable_flags;
|
||||
pgd[i + 1] = (pgdval_t)pud + pgtable_flags;
|
||||
}
|
||||
|
||||
i = (physaddr >> PUD_SHIFT) % PTRS_PER_PUD;
|
||||
pud[i + 0] = (pudval_t)pmd + pgtable_flags;
|
||||
pud[i + 1] = (pudval_t)pmd + pgtable_flags;
|
||||
i = physaddr >> PUD_SHIFT;
|
||||
pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
|
||||
pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
|
||||
|
||||
pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL;
|
||||
/* Filter out unsupported __PAGE_KERNEL_* bits: */
|
||||
|
|
@ -211,8 +212,9 @@ unsigned long __head __startup_64(unsigned long physaddr,
|
|||
pmd_entry += physaddr;
|
||||
|
||||
for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) {
|
||||
int idx = i + (physaddr >> PMD_SHIFT) % PTRS_PER_PMD;
|
||||
pmd[idx] = pmd_entry + i * PMD_SIZE;
|
||||
int idx = i + (physaddr >> PMD_SHIFT);
|
||||
|
||||
pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -321,7 +321,8 @@ void __init idt_setup_apic_and_irq_gates(void)
|
|||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
for_each_clear_bit_from(i, system_vectors, NR_VECTORS) {
|
||||
set_bit(i, system_vectors);
|
||||
set_intr_gate(i, spurious_interrupt);
|
||||
entry = spurious_entries_start + 8 * (i - FIRST_SYSTEM_VECTOR);
|
||||
set_intr_gate(i, entry);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -246,7 +246,7 @@ __visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
|
|||
if (!handle_irq(desc, regs)) {
|
||||
ack_APIC_irq();
|
||||
|
||||
if (desc != VECTOR_RETRIGGERED) {
|
||||
if (desc != VECTOR_RETRIGGERED && desc != VECTOR_SHUTDOWN) {
|
||||
pr_emerg_ratelimited("%s: %d.%d No irq handler for vector\n",
|
||||
__func__, smp_processor_id(),
|
||||
vector);
|
||||
|
|
|
|||
|
|
@ -653,7 +653,8 @@ static int cacheinfo_cpu_pre_down(unsigned int cpu)
|
|||
|
||||
static int __init cacheinfo_sysfs_init(void)
|
||||
{
|
||||
return cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "base/cacheinfo:online",
|
||||
return cpuhp_setup_state(CPUHP_AP_BASE_CACHEINFO_ONLINE,
|
||||
"base/cacheinfo:online",
|
||||
cacheinfo_cpu_online, cacheinfo_cpu_pre_down);
|
||||
}
|
||||
device_initcall(cacheinfo_sysfs_init);
|
||||
|
|
|
|||
|
|
@ -659,7 +659,7 @@ static bool fw_run_sysfs_fallback(enum fw_opt opt_flags)
|
|||
/* Also permit LSMs and IMA to fail firmware sysfs fallback */
|
||||
ret = security_kernel_load_data(LOADING_FIRMWARE);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
return false;
|
||||
|
||||
return fw_force_sysfs_fallback(opt_flags);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -91,6 +91,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
|
|||
* suppress pointless writes.
|
||||
*/
|
||||
for (i = 0; i < d->chip->num_regs; i++) {
|
||||
if (!d->chip->mask_base)
|
||||
continue;
|
||||
|
||||
reg = d->chip->mask_base +
|
||||
(i * map->reg_stride * d->irq_reg_stride);
|
||||
if (d->chip->mask_invert) {
|
||||
|
|
@ -526,6 +529,9 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
|
|||
/* Mask all the interrupts by default */
|
||||
for (i = 0; i < chip->num_regs; i++) {
|
||||
d->mask_buf[i] = d->mask_buf_def[i];
|
||||
if (!chip->mask_base)
|
||||
continue;
|
||||
|
||||
reg = chip->mask_base +
|
||||
(i * map->reg_stride * d->irq_reg_stride);
|
||||
if (chip->mask_invert)
|
||||
|
|
|
|||
|
|
@ -229,6 +229,7 @@ static struct clk_hw *_ti_omap4_clkctrl_xlate(struct of_phandle_args *clkspec,
|
|||
{
|
||||
struct omap_clkctrl_provider *provider = data;
|
||||
struct omap_clkctrl_clk *entry;
|
||||
bool found = false;
|
||||
|
||||
if (clkspec->args_count != 2)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
|
@ -238,11 +239,13 @@ static struct clk_hw *_ti_omap4_clkctrl_xlate(struct of_phandle_args *clkspec,
|
|||
|
||||
list_for_each_entry(entry, &provider->clocks, node) {
|
||||
if (entry->reg_offset == clkspec->args[0] &&
|
||||
entry->bit_offset == clkspec->args[1])
|
||||
entry->bit_offset == clkspec->args[1]) {
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!entry)
|
||||
if (!found)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
return entry->clk;
|
||||
|
|
|
|||
|
|
@ -36,8 +36,6 @@ MODULE_ALIAS_CRYPTO("842-nx");
|
|||
#define WORKMEM_ALIGN (CRB_ALIGN)
|
||||
#define CSB_WAIT_MAX (5000) /* ms */
|
||||
#define VAS_RETRIES (10)
|
||||
/* # of requests allowed per RxFIFO at a time. 0 for unlimited */
|
||||
#define MAX_CREDITS_PER_RXFIFO (1024)
|
||||
|
||||
struct nx842_workmem {
|
||||
/* Below fields must be properly aligned */
|
||||
|
|
@ -821,7 +819,11 @@ static int __init vas_cfg_coproc_info(struct device_node *dn, int chip_id,
|
|||
rxattr.lnotify_lpid = lpid;
|
||||
rxattr.lnotify_pid = pid;
|
||||
rxattr.lnotify_tid = tid;
|
||||
rxattr.wcreds_max = MAX_CREDITS_PER_RXFIFO;
|
||||
/*
|
||||
* Maximum RX window credits can not be more than #CRBs in
|
||||
* RxFIFO. Otherwise, can get checkstop if RxFIFO overruns.
|
||||
*/
|
||||
rxattr.wcreds_max = fifo_size / CRB_SIZE;
|
||||
|
||||
/*
|
||||
* Open a VAS receice window which is used to configure RxFIFO
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue