mirror of
https://github.com/a52xq-dev/kernel.git
synced 2026-10-18 21:58:11 +07:00
main drm pull for v4.13
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZYseIAAoJEAx081l5xIa+85kP/0zKzKKVzZXSXG2TAGb5jNfk Ex+TELG8tWk9KBxA7lEE5c0WEsnP79cNoXZLQu8wlUzO8+kwQK5Bz0zgNUkpSuo1 RthwdsxBQX1++UxB+HoSG+dOa7hkKVqlgQR3z9qyhsBXzetkJV0DoYcpMV0A1EWd 6Jzt+AvCShVkcW+21LqHPlc5EIVewrDMoA3oU6aYCLhyAOUTVvvQB2ML8YApH7TM JrSrzCFHTrQEBbGUrZQhzR0sZzZzk9byntb/I/mdVbHeCyIHiL8sC4PfWSOyyazm GkPnA8G3aFAY9haBRz9jG/VBr1yVb0mCBjkWQ1lGfIAOCDDSc+d7PDXdG+i4AewK jZheXlrDIdGgmJLy4W3rdEqJvdf7UQHZOs8594OL19l4+FxCTrol1JSHSMeavCvr 8bUNil9Jb/ONU/wmp+q55U0k4TCTyerUA7gKnuaJAwBvd4n78/PKmQnbrWinDyJc GQXp6zESk9bKt5DXSnVZuVf4POTzpuAsQkkfX1V2y145EHTQYfS3jLENWqEjyZUy QtKCHZvRkJfGaFU4Pr+vBo9Iu1GlA5OiOv08QadldTT4OxUI0T6yaLDobHCQfKPE sc3wCuCM+/dAnqoKDcGC4hAmF8zDdO0kw65P2m7uC6T9Jm1G35CioKbzo+fzUhuL fg5TBpbp2Wwe2oPA5iBm =2S5N -----END PGP SIGNATURE----- Merge tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux Pull drm updates from Dave Airlie: "This is the main pull request for the drm, I think I've got one later driver pull for mediatek SoC driver, I'm undecided on if it needs to go to you yet. Otherwise summary below: Core drm: - Atomic add driver private objects - Deprecate preclose hook in modern drivers - MST bandwidth tracking - Use kvmalloc in more places - Add mode_valid hook for crtc/encoder/bridge - Reduce sync_file construction time - Documentation updates - New DRM synchronisation object support New drivers: - pl111 - pl111 CLCD display controller Panel: - Innolux P079ZCA panel driver - Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels - panel-samsung-s6e3ha2: Add s6e3hf2 panel support i915: - SKL+ watermark fixes - G4x/G33 reset improvements - DP AUX backlight improvements - Buffer based GuC/host communication - New getparam for (sub)slice infomation - Cannonlake and Coffeelake initial patches - Execbuf optimisations radeon/amdgpu: - Lots of Vega10 bug fixes - Preliminary raven support - KIQ support for compute rings - MEC queue management rework - DCE6 Audio support - SR-IOV improvements - Better radeon/amdgpu selection support nouveau: - HDMI stereoscopic support - Display code rework for >= GM20x GPUs msm: - GEM rework for fine-grained locking - Per-process pagetable work - HDMI fixes for Snapdragon 820. vc4: - Remove 256MB CMA limit from vc4 - Add out-fence support - Add support for cygnus - Get/set tiling ioctls support - Add T-format tiling support for scanout zte: - add VGA support. etnaviv: - Thermal throttle support for newer GPUs - Restore userspace buffer cache performance - dma-buf sync fix stm: - add stm32f429 display support exynos: - Rework vblank handling - Fixup sw-trigger code sun4i: - V3s display engine support - HDMI support for older SoCs - Preliminary work on dual-pipeline SoCs. rcar-du: - VSP work imx-drm: - Remove counter load enable from PRE - Double read/write reduction flag support tegra: - Documentation for the host1x and drm driver. - Lots of staging ioctl fixes due to grate project work. omapdrm: - dma-buf fence support - TILER rotation fixes" * tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux: (1270 commits) drm: Remove unused drm_file parameter to drm_syncobj_replace_fence() drm/amd/powerplay: fix bug fail to remove sysfs when rmmod amdgpu. amdgpu: Set cik/si_support to 1 by default if radeon isn't built drm/amdgpu/gfx9: fix driver reload with KIQ drm/amdgpu/gfx8: fix driver reload with KIQ drm/amdgpu: Don't call amd_powerplay_destroy() if we don't have powerplay drm/ttm: Fix use-after-free in ttm_bo_clean_mm drm/amd/amdgpu: move get memory type function from early init to sw init drm/amdgpu/cgs: always set reference clock in mode_info drm/amdgpu: fix vblank_time when displays are off drm/amd/powerplay: power value format change for Vega10 drm/amdgpu/gfx9: support the amdgpu.disable_cu option drm/amd/powerplay: change PPSMC_MSG_GetCurrPkgPwr for Vega10 drm/amdgpu: Make amdgpu_cs_parser_init static (v2) drm/amdgpu/cs: fix a typo in a comment drm/amdgpu: Fix the exported always on CU bitmap drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static drm/amdgpu/psp: upper_32_bits/lower_32_bits for address setup drm/amd/powerplay/cz: print message if smc message fails drm/amdgpu: fix typo in amdgpu_debugfs_test_ib_init ...
This commit is contained in:
Linus Torvalds
commit
af3c8d9850
903 changed files with 359488 additions and 25526 deletions
|
|
@ -5,7 +5,7 @@ with HDMI output and the HVS (Hardware Video Scaler) for compositing
|
|||
display planes.
|
||||
|
||||
Required properties for VC4:
|
||||
- compatible: Should be "brcm,bcm2835-vc4"
|
||||
- compatible: Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4"
|
||||
|
||||
Required properties for Pixel Valve:
|
||||
- compatible: Should be one of "brcm,bcm2835-pixelvalve0",
|
||||
|
|
@ -54,11 +54,14 @@ Required properties for VEC:
|
|||
See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
|
||||
|
||||
Required properties for V3D:
|
||||
- compatible: Should be "brcm,bcm2835-v3d"
|
||||
- compatible: Should be "brcm,bcm2835-v3d" or "brcm,cygnus-v3d"
|
||||
- reg: Physical base address and length of the V3D's registers
|
||||
- interrupts: The interrupt number
|
||||
See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
|
||||
|
||||
Optional properties for V3D:
|
||||
- clocks: The clock the unit runs on
|
||||
|
||||
Required properties for DSI:
|
||||
- compatible: Should be "brcm,bcm2835-dsi0" or "brcm,bcm2835-dsi1"
|
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- reg: Physical base address and length of the DSI block's registers
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||||
|
|
|
|||
|
|
@ -8,12 +8,13 @@ Required properties:
|
|||
- compatible: value should be one of:
|
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"samsung,exynos5433-decon", "samsung,exynos5433-decon-tv";
|
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- reg: physical base address and length of the DECON registers set.
|
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- interrupts: should contain a list of all DECON IP block interrupts in the
|
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order: VSYNC, LCD_SYSTEM. The interrupt specifier format
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||||
depends on the interrupt controller used.
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- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"
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in the same order as they were listed in the interrupts
|
||||
property.
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- interrupt-names: should contain the interrupt names depending on mode of work:
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video mode: "vsync",
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command mode: "lcd_sys",
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command mode with software trigger: "lcd_sys", "te".
|
||||
- interrupts or interrupts-extended: list of interrupt specifiers corresponding
|
||||
to names privided in interrupt-names, as described in
|
||||
interrupt-controller/interrupts.txt
|
||||
- clocks: must include clock specifiers corresponding to entries in the
|
||||
clock-names property.
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||||
- clock-names: list of clock names sorted in the same order as the clocks
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|
|
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|||
|
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@ -0,0 +1,8 @@
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AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel
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Required properties:
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- compatible: should be "auo,p320hvn03"
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- power-supply: as specified in the base binding
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|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
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||||
|
|
@ -0,0 +1,23 @@
|
|||
Innolux P079ZCA 7.85" 768x1024 TFT LCD panel
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|
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Required properties:
|
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- compatible: should be "innolux,p079zca"
|
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- reg: DSI virtual channel of the peripheral
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||||
- power-supply: phandle of the regulator that provides the supply voltage
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- enable-gpios: panel enable gpio
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
Example:
|
||||
|
||||
&mipi_dsi {
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panel {
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compatible = "innolux,p079zca";
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reg = <0>;
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power-supply = <...>;
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backlight = <&backlight>;
|
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enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
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status = "okay";
|
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};
|
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};
|
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|
|
@ -0,0 +1,8 @@
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NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel
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|
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Required properties:
|
||||
- compatible: should be "nec,nl12880bc20-05"
|
||||
- power-supply: as specified in the base binding
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
NLT Technologies, Ltd. 15.6" FHD (1920x1080) LVDS TFT LCD panel
|
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|
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Required properties:
|
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- compatible: should be "nlt,nl192108ac18-02d"
|
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- power-supply: as specified in the base binding
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -1,7 +1,10 @@
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|||
Samsung S6E3HA2 5.7" 1440x2560 AMOLED panel
|
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Samsung S6E3HF2 5.65" 1600x2560 AMOLED panel
|
||||
|
||||
Required properties:
|
||||
- compatible: "samsung,s6e3ha2"
|
||||
- compatible: should be one of:
|
||||
"samsung,s6e3ha2",
|
||||
"samsung,s6e3hf2".
|
||||
- reg: the virtual channel number of a DSI peripheral
|
||||
- vdd3-supply: I/O voltage supply
|
||||
- vci-supply: voltage supply for analog circuits
|
||||
|
|
|
|||
36
Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
Normal file
36
Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
Normal file
|
|
@ -0,0 +1,36 @@
|
|||
* STMicroelectronics STM32 lcd-tft display controller
|
||||
|
||||
- ltdc: lcd-tft display controller host
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||||
must be a sub-node of st-display-subsystem
|
||||
Required properties:
|
||||
- compatible: "st,stm32-ltdc"
|
||||
- reg: Physical base address of the IP registers and length of memory mapped region.
|
||||
- clocks: A list of phandle + clock-specifier pairs, one for each
|
||||
entry in 'clock-names'.
|
||||
- clock-names: A list of clock names. For ltdc it should contain:
|
||||
- "lcd" for the clock feeding the output pixel clock & IP clock.
|
||||
- resets: reset to be used by the device (defined by use of RCC macro).
|
||||
Required nodes:
|
||||
- Video port for RGB output.
|
||||
|
||||
Example:
|
||||
|
||||
/ {
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||||
...
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||||
soc {
|
||||
...
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||||
ltdc: display-controller@40016800 {
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||||
compatible = "st,stm32-ltdc";
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reg = <0x40016800 0x200>;
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||||
interrupts = <88>, <89>;
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||||
resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
|
||||
clocks = <&rcc 1 CLK_LCD>;
|
||||
clock-names = "lcd";
|
||||
|
||||
port {
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||||
ltdc_out_rgb: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4,6 +4,44 @@ Allwinner A10 Display Pipeline
|
|||
The Allwinner A10 Display pipeline is composed of several components
|
||||
that are going to be documented below:
|
||||
|
||||
For the input port of all components up to the TCON in the display
|
||||
pipeline, if there are multiple components, the local endpoint IDs
|
||||
must correspond to the index of the upstream block. For example, if
|
||||
the remote endpoint is Frontend 1, then the local endpoint ID must
|
||||
be 1.
|
||||
|
||||
Conversely, for the output ports of the same group, the remote endpoint
|
||||
ID must be the index of the local hardware block. If the local backend
|
||||
is backend 1, then the remote endpoint ID must be 1.
|
||||
|
||||
HDMI Encoder
|
||||
------------
|
||||
|
||||
The HDMI Encoder supports the HDMI video and audio outputs, and does
|
||||
CEC. It is one end of the pipeline.
|
||||
|
||||
Required properties:
|
||||
- compatible: value must be one of:
|
||||
* allwinner,sun5i-a10s-hdmi
|
||||
- reg: base address and size of memory-mapped region
|
||||
- interrupts: interrupt associated to this IP
|
||||
- clocks: phandles to the clocks feeding the HDMI encoder
|
||||
* ahb: the HDMI interface clock
|
||||
* mod: the HDMI module clock
|
||||
* pll-0: the first video PLL
|
||||
* pll-1: the second video PLL
|
||||
- clock-names: the clock names mentioned above
|
||||
- dmas: phandles to the DMA channels used by the HDMI encoder
|
||||
* ddc-tx: The channel for DDC transmission
|
||||
* ddc-rx: The channel for DDC reception
|
||||
* audio-tx: The channel used for audio transmission
|
||||
- dma-names: the channel names mentioned above
|
||||
|
||||
- ports: A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoint. The second should be the
|
||||
output, usually to an HDMI connector.
|
||||
|
||||
TV Encoder
|
||||
----------
|
||||
|
||||
|
|
@ -31,6 +69,7 @@ Required properties:
|
|||
* allwinner,sun6i-a31-tcon
|
||||
* allwinner,sun6i-a31s-tcon
|
||||
* allwinner,sun8i-a33-tcon
|
||||
* allwinner,sun8i-v3s-tcon
|
||||
- reg: base address and size of memory-mapped region
|
||||
- interrupts: interrupt associated to this IP
|
||||
- clocks: phandles to the clocks feeding the TCON. Three are needed:
|
||||
|
|
@ -47,12 +86,15 @@ Required properties:
|
|||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoint, the second one the output
|
||||
|
||||
The output should have two endpoints. The first is the block
|
||||
connected to the TCON channel 0 (usually a panel or a bridge), the
|
||||
second the block connected to the TCON channel 1 (usually the TV
|
||||
encoder)
|
||||
The output may have multiple endpoints. The TCON has two channels,
|
||||
usually with the first channel being used for the panels interfaces
|
||||
(RGB, LVDS, etc.), and the second being used for the outputs that
|
||||
require another controller (TV Encoder, HDMI, etc.). The endpoints
|
||||
will take an extra property, allwinner,tcon-channel, to specify the
|
||||
channel the endpoint is associated to. If that property is not
|
||||
present, the endpoint number will be used as the channel number.
|
||||
|
||||
On SoCs other than the A33, there is one more clock required:
|
||||
On SoCs other than the A33 and V3s, there is one more clock required:
|
||||
- 'tcon-ch1': The clock driving the TCON channel 1
|
||||
|
||||
DRC
|
||||
|
|
@ -138,6 +180,26 @@ Required properties:
|
|||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoints, the second one the outputs
|
||||
|
||||
Display Engine 2.0 Mixer
|
||||
------------------------
|
||||
|
||||
The DE2 mixer have many functionalities, currently only layer blending is
|
||||
supported.
|
||||
|
||||
Required properties:
|
||||
- compatible: value must be one of:
|
||||
* allwinner,sun8i-v3s-de2-mixer
|
||||
- reg: base address and size of the memory-mapped region.
|
||||
- clocks: phandles to the clocks feeding the mixer
|
||||
* bus: the mixer interface clock
|
||||
* mod: the mixer module clock
|
||||
- clock-names: the clock names mentioned above
|
||||
- resets: phandles to the reset controllers driving the mixer
|
||||
|
||||
- ports: A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoints, the second one the output
|
||||
|
||||
|
||||
Display Engine Pipeline
|
||||
-----------------------
|
||||
|
|
@ -148,13 +210,15 @@ extra node.
|
|||
|
||||
Required properties:
|
||||
- compatible: value must be one of:
|
||||
* allwinner,sun5i-a10s-display-engine
|
||||
* allwinner,sun5i-a13-display-engine
|
||||
* allwinner,sun6i-a31-display-engine
|
||||
* allwinner,sun6i-a31s-display-engine
|
||||
* allwinner,sun8i-a33-display-engine
|
||||
* allwinner,sun8i-v3s-display-engine
|
||||
|
||||
- allwinner,pipelines: list of phandle to the display engine
|
||||
frontends available.
|
||||
frontends (DE 1.0) or mixers (DE 2.0) available.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
@ -173,6 +237,57 @@ panel: panel {
|
|||
};
|
||||
};
|
||||
|
||||
connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_con_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_con>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi: hdmi@01c16000 {
|
||||
compatible = "allwinner,sun5i-a10s-hdmi";
|
||||
reg = <0x01c16000 0x1000>;
|
||||
interrupts = <58>;
|
||||
clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>,
|
||||
<&ccu CLK_PLL_VIDEO0_2X>,
|
||||
<&ccu CLK_PLL_VIDEO1_2X>;
|
||||
clock-names = "ahb", "mod", "pll-0", "pll-1";
|
||||
dmas = <&dma SUN4I_DMA_NORMAL 16>,
|
||||
<&dma SUN4I_DMA_NORMAL 16>,
|
||||
<&dma SUN4I_DMA_DEDICATED 24>;
|
||||
dma-names = "ddc-tx", "ddc-rx", "audio-tx";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
hdmi_in_tcon0: endpoint {
|
||||
remote-endpoint = <&tcon0_out_hdmi>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
hdmi_out_con: endpoint {
|
||||
remote-endpoint = <&hdmi_con_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tve0: tv-encoder@01c0a000 {
|
||||
compatible = "allwinner,sun4i-a10-tv-encoder";
|
||||
reg = <0x01c0a000 0x1000>;
|
||||
|
|
|
|||
|
|
@ -58,6 +58,18 @@ Required properties:
|
|||
integer cells. The first cell is the offset of SYSCTRL register used
|
||||
to control TV Encoder DAC power, and the second cell is the bit mask.
|
||||
|
||||
* VGA output device
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "zte,zx296718-vga"
|
||||
- reg: Physical base address and length of the VGA device IO region
|
||||
- interrupts : VGA interrupt number to CPU
|
||||
- clocks: Phandle with clock-specifier pointing to VGA I2C clock.
|
||||
- clock-names: Must be "i2c_wclk".
|
||||
- zte,vga-power-control: the phandle to SYSCTRL block followed by two
|
||||
integer cells. The first cell is the offset of SYSCTRL register used
|
||||
to control VGA DAC power, and the second cell is the bit mask.
|
||||
|
||||
Example:
|
||||
|
||||
vou: vou@1440000 {
|
||||
|
|
@ -81,6 +93,15 @@ vou: vou@1440000 {
|
|||
"main_wclk", "aux_wclk";
|
||||
};
|
||||
|
||||
vga: vga@8000 {
|
||||
compatible = "zte,zx296718-vga";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topcrm VGA_I2C_WCLK>;
|
||||
clock-names = "i2c_wclk";
|
||||
zte,vga-power-control = <&sysctrl 0x170 0xe0>;
|
||||
};
|
||||
|
||||
hdmi: hdmi@c000 {
|
||||
compatible = "zte,zx296718-hdmi";
|
||||
reg = <0xc000 0x4000>;
|
||||
|
|
|
|||
|
|
@ -227,6 +227,7 @@ nexbox Nexbox
|
|||
newhaven Newhaven Display International
|
||||
ni National Instruments
|
||||
nintendo Nintendo
|
||||
nlt NLT Technologies, Ltd.
|
||||
nokia Nokia
|
||||
nordic Nordic Semiconductor
|
||||
nuvoton Nuvoton Technology Corporation
|
||||
|
|
|
|||
|
|
@ -98,6 +98,9 @@ DRIVER_ATOMIC
|
|||
implement appropriate obj->atomic_get_property() vfuncs for any
|
||||
modeset objects with driver specific properties.
|
||||
|
||||
DRIVER_SYNCOBJ
|
||||
Driver support drm sync objects.
|
||||
|
||||
Major, Minor and Patchlevel
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
|
|
@ -149,60 +152,15 @@ Device Instance and Driver Handling
|
|||
Driver Load
|
||||
-----------
|
||||
|
||||
IRQ Registration
|
||||
~~~~~~~~~~~~~~~~
|
||||
|
||||
The DRM core tries to facilitate IRQ handler registration and
|
||||
unregistration by providing :c:func:`drm_irq_install()` and
|
||||
:c:func:`drm_irq_uninstall()` functions. Those functions only
|
||||
support a single interrupt per device, devices that use more than one
|
||||
IRQs need to be handled manually.
|
||||
IRQ Helper Library
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Managed IRQ Registration
|
||||
''''''''''''''''''''''''
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_irq.c
|
||||
:doc: irq helpers
|
||||
|
||||
:c:func:`drm_irq_install()` starts by calling the irq_preinstall
|
||||
driver operation. The operation is optional and must make sure that the
|
||||
interrupt will not get fired by clearing all pending interrupt flags or
|
||||
disabling the interrupt.
|
||||
|
||||
The passed-in IRQ will then be requested by a call to
|
||||
:c:func:`request_irq()`. If the DRIVER_IRQ_SHARED driver feature
|
||||
flag is set, a shared (IRQF_SHARED) IRQ handler will be requested.
|
||||
|
||||
The IRQ handler function must be provided as the mandatory irq_handler
|
||||
driver operation. It will get passed directly to
|
||||
:c:func:`request_irq()` and thus has the same prototype as all IRQ
|
||||
handlers. It will get called with a pointer to the DRM device as the
|
||||
second argument.
|
||||
|
||||
Finally the function calls the optional irq_postinstall driver
|
||||
operation. The operation usually enables interrupts (excluding the
|
||||
vblank interrupt, which is enabled separately), but drivers may choose
|
||||
to enable/disable interrupts at a different time.
|
||||
|
||||
:c:func:`drm_irq_uninstall()` is similarly used to uninstall an
|
||||
IRQ handler. It starts by waking up all processes waiting on a vblank
|
||||
interrupt to make sure they don't hang, and then calls the optional
|
||||
irq_uninstall driver operation. The operation must disable all hardware
|
||||
interrupts. Finally the function frees the IRQ by calling
|
||||
:c:func:`free_irq()`.
|
||||
|
||||
Manual IRQ Registration
|
||||
'''''''''''''''''''''''
|
||||
|
||||
Drivers that require multiple interrupt handlers can't use the managed
|
||||
IRQ registration functions. In that case IRQs must be registered and
|
||||
unregistered manually (usually with the :c:func:`request_irq()` and
|
||||
:c:func:`free_irq()` functions, or their :c:func:`devm_request_irq()` and
|
||||
:c:func:`devm_free_irq()` equivalents).
|
||||
|
||||
When manually registering IRQs, drivers must not set the
|
||||
DRIVER_HAVE_IRQ driver feature flag, and must not provide the
|
||||
irq_handler driver operation. They must set the :c:type:`struct
|
||||
drm_device <drm_device>` irq_enabled field to 1 upon
|
||||
registration of the IRQs, and clear it to 0 after unregistering the
|
||||
IRQs.
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_irq.c
|
||||
:export:
|
||||
|
||||
Memory Manager Initialization
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
|
|
|||
|
|
@ -143,6 +143,12 @@ Bridge Helper Reference
|
|||
.. kernel-doc:: drivers/gpu/drm/drm_bridge.c
|
||||
:export:
|
||||
|
||||
Panel-Bridge Helper Reference
|
||||
-----------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/bridge/panel.c
|
||||
:export:
|
||||
|
||||
.. _drm_panel_helper:
|
||||
|
||||
Panel Helper Reference
|
||||
|
|
|
|||
|
|
@ -612,8 +612,8 @@ operation handler.
|
|||
Vertical Blanking and Interrupt Handling Functions Reference
|
||||
------------------------------------------------------------
|
||||
|
||||
.. kernel-doc:: include/drm/drm_irq.h
|
||||
.. kernel-doc:: include/drm/drm_vblank.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_irq.c
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_vblank.c
|
||||
:export:
|
||||
|
|
|
|||
|
|
@ -484,3 +484,15 @@ DRM Cache Handling
|
|||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_cache.c
|
||||
:export:
|
||||
|
||||
DRM Sync Objects
|
||||
===========================
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_syncobj.c
|
||||
:doc: Overview
|
||||
|
||||
.. kernel-doc:: include/drm/drm_syncobj.h
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_syncobj.c
|
||||
:export:
|
||||
|
|
|
|||
|
|
@ -12,6 +12,8 @@ Linux GPU Driver Developer's Guide
|
|||
drm-uapi
|
||||
i915
|
||||
meson
|
||||
pl111
|
||||
tegra
|
||||
tinydrm
|
||||
vc4
|
||||
vga-switcheroo
|
||||
|
|
|
|||
6
Documentation/gpu/pl111.rst
Normal file
6
Documentation/gpu/pl111.rst
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
==========================================
|
||||
drm/pl111 ARM PrimeCell PL111 CLCD Driver
|
||||
==========================================
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/pl111/pl111_drv.c
|
||||
:doc: ARM PrimeCell PL111 CLCD Driver
|
||||
178
Documentation/gpu/tegra.rst
Normal file
178
Documentation/gpu/tegra.rst
Normal file
|
|
@ -0,0 +1,178 @@
|
|||
===============================================
|
||||
drm/tegra NVIDIA Tegra GPU and display driver
|
||||
===============================================
|
||||
|
||||
NVIDIA Tegra SoCs support a set of display, graphics and video functions via
|
||||
the host1x controller. host1x supplies command streams, gathered from a push
|
||||
buffer provided directly by the CPU, to its clients via channels. Software,
|
||||
or blocks amongst themselves, can use syncpoints for synchronization.
|
||||
|
||||
Up until, but not including, Tegra124 (aka Tegra K1) the drm/tegra driver
|
||||
supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
|
||||
with Tegra124 the GPU is based on the NVIDIA desktop GPU architecture and
|
||||
supported by the drm/nouveau driver.
|
||||
|
||||
The drm/tegra driver supports NVIDIA Tegra SoC generations since Tegra20. It
|
||||
has three parts:
|
||||
|
||||
- A host1x driver that provides infrastructure and access to the host1x
|
||||
services.
|
||||
|
||||
- A KMS driver that supports the display controllers as well as a number of
|
||||
outputs, such as RGB, HDMI, DSI, and DisplayPort.
|
||||
|
||||
- A set of custom userspace IOCTLs that can be used to submit jobs to the
|
||||
GPU and video engines via host1x.
|
||||
|
||||
Driver Infrastructure
|
||||
=====================
|
||||
|
||||
The various host1x clients need to be bound together into a logical device in
|
||||
order to expose their functionality to users. The infrastructure that supports
|
||||
this is implemented in the host1x driver. When a driver is registered with the
|
||||
infrastructure it provides a list of compatible strings specifying the devices
|
||||
that it needs. The infrastructure creates a logical device and scan the device
|
||||
tree for matching device nodes, adding the required clients to a list. Drivers
|
||||
for individual clients register with the infrastructure as well and are added
|
||||
to the logical host1x device.
|
||||
|
||||
Once all clients are available, the infrastructure will initialize the logical
|
||||
device using a driver-provided function which will set up the bits specific to
|
||||
the subsystem and in turn initialize each of its clients.
|
||||
|
||||
Similarly, when one of the clients is unregistered, the infrastructure will
|
||||
destroy the logical device by calling back into the driver, which ensures that
|
||||
the subsystem specific bits are torn down and the clients destroyed in turn.
|
||||
|
||||
Host1x Infrastructure Reference
|
||||
-------------------------------
|
||||
|
||||
.. kernel-doc:: include/linux/host1x.h
|
||||
|
||||
.. kernel-doc:: drivers/gpu/host1x/bus.c
|
||||
:export:
|
||||
|
||||
Host1x Syncpoint Reference
|
||||
--------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/host1x/syncpt.c
|
||||
:export:
|
||||
|
||||
KMS driver
|
||||
==========
|
||||
|
||||
The display hardware has remained mostly backwards compatible over the various
|
||||
Tegra SoC generations, up until Tegra186 which introduces several changes that
|
||||
make it difficult to support with a parameterized driver.
|
||||
|
||||
Display Controllers
|
||||
-------------------
|
||||
|
||||
Tegra SoCs have two display controllers, each of which can be associated with
|
||||
zero or more outputs. Outputs can also share a single display controller, but
|
||||
only if they run with compatible display timings. Two display controllers can
|
||||
also share a single framebuffer, allowing cloned configurations even if modes
|
||||
on two outputs don't match. A display controller is modelled as a CRTC in KMS
|
||||
terms.
|
||||
|
||||
On Tegra186, the number of display controllers has been increased to three. A
|
||||
display controller can no longer drive all of the outputs. While two of these
|
||||
controllers can drive both DSI outputs and both SOR outputs, the third cannot
|
||||
drive any DSI.
|
||||
|
||||
Windows
|
||||
~~~~~~~
|
||||
|
||||
A display controller controls a set of windows that can be used to composite
|
||||
multiple buffers onto the screen. While it is possible to assign arbitrary Z
|
||||
ordering to individual windows (by programming the corresponding blending
|
||||
registers), this is currently not supported by the driver. Instead, it will
|
||||
assume a fixed Z ordering of the windows (window A is the root window, that
|
||||
is, the lowest, while windows B and C are overlaid on top of window A). The
|
||||
overlay windows support multiple pixel formats and can automatically convert
|
||||
from YUV to RGB at scanout time. This makes them useful for displaying video
|
||||
content. In KMS, each window is modelled as a plane. Each display controller
|
||||
has a hardware cursor that is exposed as a cursor plane.
|
||||
|
||||
Outputs
|
||||
-------
|
||||
|
||||
The type and number of supported outputs varies between Tegra SoC generations.
|
||||
All generations support at least HDMI. While earlier generations supported the
|
||||
very simple RGB interfaces (one per display controller), recent generations no
|
||||
longer do and instead provide standard interfaces such as DSI and eDP/DP.
|
||||
|
||||
Outputs are modelled as a composite encoder/connector pair.
|
||||
|
||||
RGB/LVDS
|
||||
~~~~~~~~
|
||||
|
||||
This interface is no longer available since Tegra124. It has been replaced by
|
||||
the more standard DSI and eDP interfaces.
|
||||
|
||||
HDMI
|
||||
~~~~
|
||||
|
||||
HDMI is supported on all Tegra SoCs. Starting with Tegra210, HDMI is provided
|
||||
by the versatile SOR output, which supports eDP, DP and HDMI. The SOR is able
|
||||
to support HDMI 2.0, though support for this is currently not merged.
|
||||
|
||||
DSI
|
||||
~~~
|
||||
|
||||
Although Tegra has supported DSI since Tegra30, the controller has changed in
|
||||
several ways in Tegra114. Since none of the publicly available development
|
||||
boards prior to Dalmore (Tegra114) have made use of DSI, only Tegra114 and
|
||||
later are supported by the drm/tegra driver.
|
||||
|
||||
eDP/DP
|
||||
~~~~~~
|
||||
|
||||
eDP was first introduced in Tegra124 where it was used to drive the display
|
||||
panel for notebook form factors. Tegra210 added support for full DisplayPort
|
||||
support, though this is currently not implemented in the drm/tegra driver.
|
||||
|
||||
Userspace Interface
|
||||
===================
|
||||
|
||||
The userspace interface provided by drm/tegra allows applications to create
|
||||
GEM buffers, access and control syncpoints as well as submit command streams
|
||||
to host1x.
|
||||
|
||||
GEM Buffers
|
||||
-----------
|
||||
|
||||
The ``DRM_IOCTL_TEGRA_GEM_CREATE`` IOCTL is used to create a GEM buffer object
|
||||
with Tegra-specific flags. This is useful for buffers that should be tiled, or
|
||||
that are to be scanned out upside down (useful for 3D content).
|
||||
|
||||
After a GEM buffer object has been created, its memory can be mapped by an
|
||||
application using the mmap offset returned by the ``DRM_IOCTL_TEGRA_GEM_MMAP``
|
||||
IOCTL.
|
||||
|
||||
Syncpoints
|
||||
----------
|
||||
|
||||
The current value of a syncpoint can be obtained by executing the
|
||||
``DRM_IOCTL_TEGRA_SYNCPT_READ`` IOCTL. Incrementing the syncpoint is achieved
|
||||
using the ``DRM_IOCTL_TEGRA_SYNCPT_INCR`` IOCTL.
|
||||
|
||||
Userspace can also request blocking on a syncpoint. To do so, it needs to
|
||||
execute the ``DRM_IOCTL_TEGRA_SYNCPT_WAIT`` IOCTL, specifying the value of
|
||||
the syncpoint to wait for. The kernel will release the application when the
|
||||
syncpoint reaches that value or after a specified timeout.
|
||||
|
||||
Command Stream Submission
|
||||
-------------------------
|
||||
|
||||
Before an application can submit command streams to host1x it needs to open a
|
||||
channel to an engine using the ``DRM_IOCTL_TEGRA_OPEN_CHANNEL`` IOCTL. Client
|
||||
IDs are used to identify the target of the channel. When a channel is no
|
||||
longer needed, it can be closed using the ``DRM_IOCTL_TEGRA_CLOSE_CHANNEL``
|
||||
IOCTL. To retrieve the syncpoint associated with a channel, an application
|
||||
can use the ``DRM_IOCTL_TEGRA_GET_SYNCPT``.
|
||||
|
||||
After opening a channel, submitting command streams is easy. The application
|
||||
writes commands into the memory backing a GEM buffer object and passes these
|
||||
to the ``DRM_IOCTL_TEGRA_SUBMIT`` IOCTL along with various other parameters,
|
||||
such as the syncpoints or relocations used in the job submission.
|
||||
|
|
@ -177,19 +177,6 @@ following drivers still use ``struct_mutex``: ``msm``, ``omapdrm`` and
|
|||
|
||||
Contact: Daniel Vetter, respective driver maintainers
|
||||
|
||||
Switch to drm_connector_list_iter for any connector_list walking
|
||||
----------------------------------------------------------------
|
||||
|
||||
Connectors can be hotplugged, and we now have a special list of helpers to walk
|
||||
the connector_list in a race-free fashion, without incurring deadlocks on
|
||||
mutexes and other fun stuff.
|
||||
|
||||
Unfortunately most drivers are not converted yet. At least all those supporting
|
||||
DP MST hotplug should be converted, since for those drivers the difference
|
||||
matters. See drm_for_each_connector_iter() vs. drm_for_each_connector().
|
||||
|
||||
Contact: Daniel Vetter
|
||||
|
||||
Core refactorings
|
||||
=================
|
||||
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
Sync File API Guide
|
||||
~~~~~~~~~~~~~~~~~~~
|
||||
===================
|
||||
Sync File API Guide
|
||||
===================
|
||||
|
||||
Gustavo Padovan
|
||||
<gustavo at padovan dot org>
|
||||
:Author: Gustavo Padovan <gustavo at padovan dot org>
|
||||
|
||||
This document serves as a guide for device drivers writers on what the
|
||||
sync_file API is, and how drivers can support it. Sync file is the carrier of
|
||||
|
|
@ -46,16 +46,17 @@ Creating Sync Files
|
|||
|
||||
When a driver needs to send an out-fence userspace it creates a sync_file.
|
||||
|
||||
Interface:
|
||||
Interface::
|
||||
|
||||
struct sync_file *sync_file_create(struct dma_fence *fence);
|
||||
|
||||
The caller pass the out-fence and gets back the sync_file. That is just the
|
||||
first step, next it needs to install an fd on sync_file->file. So it gets an
|
||||
fd:
|
||||
fd::
|
||||
|
||||
fd = get_unused_fd_flags(O_CLOEXEC);
|
||||
|
||||
and installs it on sync_file->file:
|
||||
and installs it on sync_file->file::
|
||||
|
||||
fd_install(fd, sync_file->file);
|
||||
|
||||
|
|
@ -71,7 +72,8 @@ When userspace needs to send an in-fence to the driver it passes file descriptor
|
|||
of the Sync File to the kernel. The kernel can then retrieve the fences
|
||||
from it.
|
||||
|
||||
Interface:
|
||||
Interface::
|
||||
|
||||
struct dma_fence *sync_file_get_fence(int fd);
|
||||
|
||||
|
||||
|
|
@ -79,5 +81,6 @@ The returned reference is owned by the caller and must be disposed of
|
|||
afterwards using dma_fence_put(). In case of error, a NULL is returned instead.
|
||||
|
||||
References:
|
||||
[1] struct sync_file in include/linux/sync_file.h
|
||||
[2] All interfaces mentioned above defined in include/linux/sync_file.h
|
||||
|
||||
1. struct sync_file in include/linux/sync_file.h
|
||||
2. All interfaces mentioned above defined in include/linux/sync_file.h
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue