mirror of
https://github.com/a52xq-dev/kernel.git
synced 2026-10-18 21:58:11 +07:00
tty: move a number of tty drivers from drivers/char/ to drivers/tty/
As planned by Arnd Bergmann, this moves the following drivers from drivers/char/ to drivers/tty/ as that's where they really belong: amiserial nozomi synclink rocket cyclades moxa mxser isicom bfin_jtag_comm Cc: Arnd Bergmann <arnd@arndb.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Jiri Slaby <jslaby@suse.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
44ed76b78e
commit
a6afd9f3e8
19 changed files with 184 additions and 183 deletions
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@ -15,36 +15,6 @@ config DEVKMEM
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kind of kernel debugging operations.
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When in doubt, say "N".
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config BFIN_JTAG_COMM
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tristate "Blackfin JTAG Communication"
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depends on BLACKFIN
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help
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Add support for emulating a TTY device over the Blackfin JTAG.
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To compile this driver as a module, choose M here: the
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module will be called bfin_jtag_comm.
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config BFIN_JTAG_COMM_CONSOLE
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bool "Console on Blackfin JTAG"
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depends on BFIN_JTAG_COMM=y
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config SERIAL_NONSTANDARD
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bool "Non-standard serial port support"
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depends on HAS_IOMEM
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---help---
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Say Y here if you have any non-standard serial boards -- boards
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which aren't supported using the standard "dumb" serial driver.
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This includes intelligent serial boards such as Cyclades,
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Digiboards, etc. These are usually used for systems that need many
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serial ports because they serve many terminals or dial-in
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connections.
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Note that the answer to this question won't directly affect the
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kernel: saying N will just cause the configurator to skip all
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the questions about non-standard serial boards.
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Most people can say N here.
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config COMPUTONE
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tristate "Computone IntelliPort Plus serial support"
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depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI)
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@ -60,50 +30,6 @@ config COMPUTONE
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To compile this driver as module, choose M here: the
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module will be called ip2.
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config ROCKETPORT
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tristate "Comtrol RocketPort support"
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depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI)
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help
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This driver supports Comtrol RocketPort and RocketModem PCI boards.
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These boards provide 2, 4, 8, 16, or 32 high-speed serial ports or
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modems. For information about the RocketPort/RocketModem boards
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and this driver read <file:Documentation/serial/rocket.txt>.
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To compile this driver as a module, choose M here: the
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module will be called rocket.
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If you want to compile this driver into the kernel, say Y here. If
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you don't have a Comtrol RocketPort/RocketModem card installed, say N.
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config CYCLADES
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tristate "Cyclades async mux support"
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depends on SERIAL_NONSTANDARD && (PCI || ISA)
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select FW_LOADER
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---help---
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This driver supports Cyclades Z and Y multiserial boards.
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You would need something like this to connect more than two modems to
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your Linux box, for instance in order to become a dial-in server.
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For information about the Cyclades-Z card, read
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<file:Documentation/serial/README.cycladesZ>.
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To compile this driver as a module, choose M here: the
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module will be called cyclades.
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If you haven't heard about it, it's safe to say N.
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config CYZ_INTR
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bool "Cyclades-Z interrupt mode operation (EXPERIMENTAL)"
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depends on EXPERIMENTAL && CYCLADES
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help
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The Cyclades-Z family of multiport cards allows 2 (two) driver op
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modes: polling and interrupt. In polling mode, the driver will check
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the status of the Cyclades-Z ports every certain amount of time
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(which is called polling cycle and is configurable). In interrupt
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mode, it will use an interrupt line (IRQ) in order to check the
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status of the Cyclades-Z ports. The default op mode is polling. If
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unsure, say N.
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config DIGIEPCA
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tristate "Digiboard Intelligent Async Support"
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depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI)
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@ -119,94 +45,6 @@ config DIGIEPCA
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To compile this driver as a module, choose M here: the
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module will be called epca.
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config MOXA_INTELLIO
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tristate "Moxa Intellio support"
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depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI)
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select FW_LOADER
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help
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Say Y here if you have a Moxa Intellio multiport serial card.
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To compile this driver as a module, choose M here: the
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module will be called moxa.
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config MOXA_SMARTIO
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tristate "Moxa SmartIO support v. 2.0"
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depends on SERIAL_NONSTANDARD && (PCI || EISA || ISA)
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help
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Say Y here if you have a Moxa SmartIO multiport serial card and/or
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want to help develop a new version of this driver.
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This is upgraded (1.9.1) driver from original Moxa drivers with
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changes finally resulting in PCI probing.
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This driver can also be built as a module. The module will be called
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mxser. If you want to do that, say M here.
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config ISI
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tristate "Multi-Tech multiport card support (EXPERIMENTAL)"
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depends on SERIAL_NONSTANDARD && PCI
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select FW_LOADER
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help
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This is a driver for the Multi-Tech cards which provide several
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serial ports. The driver is experimental and can currently only be
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built as a module. The module will be called isicom.
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If you want to do that, choose M here.
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config SYNCLINK
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tristate "Microgate SyncLink card support"
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depends on SERIAL_NONSTANDARD && PCI && ISA_DMA_API
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help
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Provides support for the SyncLink ISA and PCI multiprotocol serial
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adapters. These adapters support asynchronous and HDLC bit
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synchronous communication up to 10Mbps (PCI adapter).
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This driver can only be built as a module ( = code which can be
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inserted in and removed from the running kernel whenever you want).
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The module will be called synclink. If you want to do that, say M
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here.
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config SYNCLINKMP
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tristate "SyncLink Multiport support"
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depends on SERIAL_NONSTANDARD && PCI
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help
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Enable support for the SyncLink Multiport (2 or 4 ports)
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serial adapter, running asynchronous and HDLC communications up
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to 2.048Mbps. Each ports is independently selectable for
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RS-232, V.35, RS-449, RS-530, and X.21
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This driver may be built as a module ( = code which can be
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inserted in and removed from the running kernel whenever you want).
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The module will be called synclinkmp. If you want to do that, say M
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here.
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config SYNCLINK_GT
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tristate "SyncLink GT/AC support"
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depends on SERIAL_NONSTANDARD && PCI
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help
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Support for SyncLink GT and SyncLink AC families of
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synchronous and asynchronous serial adapters
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manufactured by Microgate Systems, Ltd. (www.microgate.com)
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config N_HDLC
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tristate "HDLC line discipline support"
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depends on SERIAL_NONSTANDARD
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help
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Allows synchronous HDLC communications with tty device drivers that
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support synchronous HDLC such as the Microgate SyncLink adapter.
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This driver can be built as a module ( = code which can be
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inserted in and removed from the running kernel whenever you want).
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The module will be called n_hdlc. If you want to do that, say M
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here.
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config N_GSM
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tristate "GSM MUX line discipline support (EXPERIMENTAL)"
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depends on EXPERIMENTAL
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depends on NET
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help
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This line discipline provides support for the GSM MUX protocol and
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presents the mux as a set of 61 individual tty devices.
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config RISCOM8
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tristate "SDL RISCom/8 card support"
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depends on SERIAL_NONSTANDARD
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@ -296,16 +134,6 @@ config ISTALLION
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To compile this driver as a module, choose M here: the
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module will be called istallion.
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config NOZOMI
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tristate "HSDPA Broadband Wireless Data Card - Globe Trotter"
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depends on PCI && EXPERIMENTAL
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help
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If you have a HSDPA driver Broadband Wireless Data Card -
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Globe Trotter PCMCIA card, say Y here.
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To compile this driver as a module, choose M here, the module
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will be called nozomi.
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config A2232
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tristate "Commodore A2232 serial support (EXPERIMENTAL)"
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depends on EXPERIMENTAL && ZORRO && BROKEN
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@ -5,29 +5,18 @@
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obj-y += mem.o random.o
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obj-$(CONFIG_TTY_PRINTK) += ttyprintk.o
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obj-y += misc.o
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obj-$(CONFIG_BFIN_JTAG_COMM) += bfin_jtag_comm.o
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obj-$(CONFIG_MVME147_SCC) += generic_serial.o vme_scc.o
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obj-$(CONFIG_MVME162_SCC) += generic_serial.o vme_scc.o
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obj-$(CONFIG_BVME6000_SCC) += generic_serial.o vme_scc.o
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obj-$(CONFIG_ROCKETPORT) += rocket.o
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obj-$(CONFIG_SERIAL167) += serial167.o
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obj-$(CONFIG_CYCLADES) += cyclades.o
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obj-$(CONFIG_STALLION) += stallion.o
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obj-$(CONFIG_ISTALLION) += istallion.o
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obj-$(CONFIG_NOZOMI) += nozomi.o
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obj-$(CONFIG_DIGIEPCA) += epca.o
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obj-$(CONFIG_SPECIALIX) += specialix.o
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obj-$(CONFIG_MOXA_INTELLIO) += moxa.o
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obj-$(CONFIG_A2232) += ser_a2232.o generic_serial.o
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obj-$(CONFIG_ATARI_DSP56K) += dsp56k.o
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obj-$(CONFIG_MOXA_SMARTIO) += mxser.o
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obj-$(CONFIG_COMPUTONE) += ip2/
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obj-$(CONFIG_RISCOM8) += riscom8.o
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obj-$(CONFIG_ISI) += isicom.o
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obj-$(CONFIG_SYNCLINK) += synclink.o
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obj-$(CONFIG_SYNCLINKMP) += synclinkmp.o
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obj-$(CONFIG_SYNCLINK_GT) += synclink_gt.o
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obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o
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obj-$(CONFIG_SX) += sx.o generic_serial.o
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obj-$(CONFIG_RIO) += rio/ generic_serial.o
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obj-$(CONFIG_RAW_DRIVER) += raw.o
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@ -147,4 +147,175 @@ config LEGACY_PTY_COUNT
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When not in use, each legacy PTY occupies 12 bytes on 32-bit
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architectures and 24 bytes on 64-bit architectures.
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config BFIN_JTAG_COMM
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tristate "Blackfin JTAG Communication"
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depends on BLACKFIN
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help
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Add support for emulating a TTY device over the Blackfin JTAG.
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To compile this driver as a module, choose M here: the
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module will be called bfin_jtag_comm.
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config BFIN_JTAG_COMM_CONSOLE
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bool "Console on Blackfin JTAG"
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depends on BFIN_JTAG_COMM=y
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config SERIAL_NONSTANDARD
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bool "Non-standard serial port support"
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depends on HAS_IOMEM
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---help---
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Say Y here if you have any non-standard serial boards -- boards
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which aren't supported using the standard "dumb" serial driver.
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This includes intelligent serial boards such as Cyclades,
|
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Digiboards, etc. These are usually used for systems that need many
|
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serial ports because they serve many terminals or dial-in
|
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connections.
|
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|
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Note that the answer to this question won't directly affect the
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kernel: saying N will just cause the configurator to skip all
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the questions about non-standard serial boards.
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Most people can say N here.
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config ROCKETPORT
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tristate "Comtrol RocketPort support"
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depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI)
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help
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This driver supports Comtrol RocketPort and RocketModem PCI boards.
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These boards provide 2, 4, 8, 16, or 32 high-speed serial ports or
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modems. For information about the RocketPort/RocketModem boards
|
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and this driver read <file:Documentation/serial/rocket.txt>.
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To compile this driver as a module, choose M here: the
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module will be called rocket.
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If you want to compile this driver into the kernel, say Y here. If
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you don't have a Comtrol RocketPort/RocketModem card installed, say N.
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config CYCLADES
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tristate "Cyclades async mux support"
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depends on SERIAL_NONSTANDARD && (PCI || ISA)
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select FW_LOADER
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---help---
|
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This driver supports Cyclades Z and Y multiserial boards.
|
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You would need something like this to connect more than two modems to
|
||||
your Linux box, for instance in order to become a dial-in server.
|
||||
|
||||
For information about the Cyclades-Z card, read
|
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<file:Documentation/serial/README.cycladesZ>.
|
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|
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To compile this driver as a module, choose M here: the
|
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module will be called cyclades.
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If you haven't heard about it, it's safe to say N.
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config CYZ_INTR
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bool "Cyclades-Z interrupt mode operation (EXPERIMENTAL)"
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depends on EXPERIMENTAL && CYCLADES
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help
|
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The Cyclades-Z family of multiport cards allows 2 (two) driver op
|
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modes: polling and interrupt. In polling mode, the driver will check
|
||||
the status of the Cyclades-Z ports every certain amount of time
|
||||
(which is called polling cycle and is configurable). In interrupt
|
||||
mode, it will use an interrupt line (IRQ) in order to check the
|
||||
status of the Cyclades-Z ports. The default op mode is polling. If
|
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unsure, say N.
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config MOXA_INTELLIO
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tristate "Moxa Intellio support"
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depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI)
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select FW_LOADER
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help
|
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Say Y here if you have a Moxa Intellio multiport serial card.
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To compile this driver as a module, choose M here: the
|
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module will be called moxa.
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config MOXA_SMARTIO
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tristate "Moxa SmartIO support v. 2.0"
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depends on SERIAL_NONSTANDARD && (PCI || EISA || ISA)
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help
|
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Say Y here if you have a Moxa SmartIO multiport serial card and/or
|
||||
want to help develop a new version of this driver.
|
||||
|
||||
This is upgraded (1.9.1) driver from original Moxa drivers with
|
||||
changes finally resulting in PCI probing.
|
||||
|
||||
This driver can also be built as a module. The module will be called
|
||||
mxser. If you want to do that, say M here.
|
||||
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config SYNCLINK
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tristate "Microgate SyncLink card support"
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depends on SERIAL_NONSTANDARD && PCI && ISA_DMA_API
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help
|
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Provides support for the SyncLink ISA and PCI multiprotocol serial
|
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adapters. These adapters support asynchronous and HDLC bit
|
||||
synchronous communication up to 10Mbps (PCI adapter).
|
||||
|
||||
This driver can only be built as a module ( = code which can be
|
||||
inserted in and removed from the running kernel whenever you want).
|
||||
The module will be called synclink. If you want to do that, say M
|
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here.
|
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|
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config SYNCLINKMP
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tristate "SyncLink Multiport support"
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depends on SERIAL_NONSTANDARD && PCI
|
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help
|
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Enable support for the SyncLink Multiport (2 or 4 ports)
|
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serial adapter, running asynchronous and HDLC communications up
|
||||
to 2.048Mbps. Each ports is independently selectable for
|
||||
RS-232, V.35, RS-449, RS-530, and X.21
|
||||
|
||||
This driver may be built as a module ( = code which can be
|
||||
inserted in and removed from the running kernel whenever you want).
|
||||
The module will be called synclinkmp. If you want to do that, say M
|
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here.
|
||||
|
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config SYNCLINK_GT
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tristate "SyncLink GT/AC support"
|
||||
depends on SERIAL_NONSTANDARD && PCI
|
||||
help
|
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Support for SyncLink GT and SyncLink AC families of
|
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synchronous and asynchronous serial adapters
|
||||
manufactured by Microgate Systems, Ltd. (www.microgate.com)
|
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|
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config NOZOMI
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tristate "HSDPA Broadband Wireless Data Card - Globe Trotter"
|
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depends on PCI && EXPERIMENTAL
|
||||
help
|
||||
If you have a HSDPA driver Broadband Wireless Data Card -
|
||||
Globe Trotter PCMCIA card, say Y here.
|
||||
|
||||
To compile this driver as a module, choose M here, the module
|
||||
will be called nozomi.
|
||||
|
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config ISI
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tristate "Multi-Tech multiport card support (EXPERIMENTAL)"
|
||||
depends on SERIAL_NONSTANDARD && PCI
|
||||
select FW_LOADER
|
||||
help
|
||||
This is a driver for the Multi-Tech cards which provide several
|
||||
serial ports. The driver is experimental and can currently only be
|
||||
built as a module. The module will be called isicom.
|
||||
If you want to do that, choose M here.
|
||||
|
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config N_HDLC
|
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tristate "HDLC line discipline support"
|
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depends on SERIAL_NONSTANDARD
|
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help
|
||||
Allows synchronous HDLC communications with tty device drivers that
|
||||
support synchronous HDLC such as the Microgate SyncLink adapter.
|
||||
|
||||
This driver can be built as a module ( = code which can be
|
||||
inserted in and removed from the running kernel whenever you want).
|
||||
The module will be called n_hdlc. If you want to do that, say M
|
||||
here.
|
||||
|
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config N_GSM
|
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tristate "GSM MUX line discipline support (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
depends on NET
|
||||
help
|
||||
This line discipline provides support for the GSM MUX protocol and
|
||||
presents the mux as a set of 61 individual tty devices.
|
||||
|
||||
|
|
|
|||
|
|
@ -11,3 +11,16 @@ obj-$(CONFIG_R3964) += n_r3964.o
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obj-y += vt/
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obj-$(CONFIG_HVC_DRIVER) += hvc/
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obj-y += serial/
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|
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# tty drivers
|
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obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o
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obj-$(CONFIG_BFIN_JTAG_COMM) += bfin_jtag_comm.o
|
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obj-$(CONFIG_CYCLADES) += cyclades.o
|
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obj-$(CONFIG_ISI) += isicom.o
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obj-$(CONFIG_MOXA_INTELLIO) += moxa.o
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obj-$(CONFIG_MOXA_SMARTIO) += mxser.o
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obj-$(CONFIG_NOZOMI) += nozomi.o
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obj-$(CONFIG_ROCKETPORT) += rocket.o
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obj-$(CONFIG_SYNCLINK_GT) += synclink_gt.o
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obj-$(CONFIG_SYNCLINKMP) += synclinkmp.o
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obj-$(CONFIG_SYNCLINK) += synclink.o
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||||
|
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|
|||
2178
drivers/tty/amiserial.c
Normal file
2178
drivers/tty/amiserial.c
Normal file
File diff suppressed because it is too large
Load diff
366
drivers/tty/bfin_jtag_comm.c
Normal file
366
drivers/tty/bfin_jtag_comm.c
Normal file
|
|
@ -0,0 +1,366 @@
|
|||
/*
|
||||
* TTY over Blackfin JTAG Communication
|
||||
*
|
||||
* Copyright 2008-2009 Analog Devices Inc.
|
||||
*
|
||||
* Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Licensed under the GPL-2 or later.
|
||||
*/
|
||||
|
||||
#define DRV_NAME "bfin-jtag-comm"
|
||||
#define DEV_NAME "ttyBFJC"
|
||||
#define pr_fmt(fmt) DRV_NAME ": " fmt
|
||||
|
||||
#include <linux/circ_buf.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/tty_driver.h>
|
||||
#include <linux/tty_flip.h>
|
||||
#include <asm/atomic.h>
|
||||
|
||||
#define pr_init(fmt, args...) ({ static const __initconst char __fmt[] = fmt; printk(__fmt, ## args); })
|
||||
|
||||
/* See the Debug/Emulation chapter in the HRM */
|
||||
#define EMUDOF 0x00000001 /* EMUDAT_OUT full & valid */
|
||||
#define EMUDIF 0x00000002 /* EMUDAT_IN full & valid */
|
||||
#define EMUDOOVF 0x00000004 /* EMUDAT_OUT overflow */
|
||||
#define EMUDIOVF 0x00000008 /* EMUDAT_IN overflow */
|
||||
|
||||
static inline uint32_t bfin_write_emudat(uint32_t emudat)
|
||||
{
|
||||
__asm__ __volatile__("emudat = %0;" : : "d"(emudat));
|
||||
return emudat;
|
||||
}
|
||||
|
||||
static inline uint32_t bfin_read_emudat(void)
|
||||
{
|
||||
uint32_t emudat;
|
||||
__asm__ __volatile__("%0 = emudat;" : "=d"(emudat));
|
||||
return emudat;
|
||||
}
|
||||
|
||||
static inline uint32_t bfin_write_emudat_chars(char a, char b, char c, char d)
|
||||
{
|
||||
return bfin_write_emudat((a << 0) | (b << 8) | (c << 16) | (d << 24));
|
||||
}
|
||||
|
||||
#define CIRC_SIZE 2048 /* see comment in tty_io.c:do_tty_write() */
|
||||
#define CIRC_MASK (CIRC_SIZE - 1)
|
||||
#define circ_empty(circ) ((circ)->head == (circ)->tail)
|
||||
#define circ_free(circ) CIRC_SPACE((circ)->head, (circ)->tail, CIRC_SIZE)
|
||||
#define circ_cnt(circ) CIRC_CNT((circ)->head, (circ)->tail, CIRC_SIZE)
|
||||
#define circ_byte(circ, idx) ((circ)->buf[(idx) & CIRC_MASK])
|
||||
|
||||
static struct tty_driver *bfin_jc_driver;
|
||||
static struct task_struct *bfin_jc_kthread;
|
||||
static struct tty_struct * volatile bfin_jc_tty;
|
||||
static unsigned long bfin_jc_count;
|
||||
static DEFINE_MUTEX(bfin_jc_tty_mutex);
|
||||
static volatile struct circ_buf bfin_jc_write_buf;
|
||||
|
||||
static int
|
||||
bfin_jc_emudat_manager(void *arg)
|
||||
{
|
||||
uint32_t inbound_len = 0, outbound_len = 0;
|
||||
|
||||
while (!kthread_should_stop()) {
|
||||
/* no one left to give data to, so sleep */
|
||||
if (bfin_jc_tty == NULL && circ_empty(&bfin_jc_write_buf)) {
|
||||
pr_debug("waiting for readers\n");
|
||||
__set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
schedule();
|
||||
__set_current_state(TASK_RUNNING);
|
||||
}
|
||||
|
||||
/* no data available, so just chill */
|
||||
if (!(bfin_read_DBGSTAT() & EMUDIF) && circ_empty(&bfin_jc_write_buf)) {
|
||||
pr_debug("waiting for data (in_len = %i) (circ: %i %i)\n",
|
||||
inbound_len, bfin_jc_write_buf.tail, bfin_jc_write_buf.head);
|
||||
if (inbound_len)
|
||||
schedule();
|
||||
else
|
||||
schedule_timeout_interruptible(HZ);
|
||||
continue;
|
||||
}
|
||||
|
||||
/* if incoming data is ready, eat it */
|
||||
if (bfin_read_DBGSTAT() & EMUDIF) {
|
||||
struct tty_struct *tty;
|
||||
mutex_lock(&bfin_jc_tty_mutex);
|
||||
tty = (struct tty_struct *)bfin_jc_tty;
|
||||
if (tty != NULL) {
|
||||
uint32_t emudat = bfin_read_emudat();
|
||||
if (inbound_len == 0) {
|
||||
pr_debug("incoming length: 0x%08x\n", emudat);
|
||||
inbound_len = emudat;
|
||||
} else {
|
||||
size_t num_chars = (4 <= inbound_len ? 4 : inbound_len);
|
||||
pr_debug(" incoming data: 0x%08x (pushing %zu)\n", emudat, num_chars);
|
||||
inbound_len -= num_chars;
|
||||
tty_insert_flip_string(tty, (unsigned char *)&emudat, num_chars);
|
||||
tty_flip_buffer_push(tty);
|
||||
}
|
||||
}
|
||||
mutex_unlock(&bfin_jc_tty_mutex);
|
||||
}
|
||||
|
||||
/* if outgoing data is ready, post it */
|
||||
if (!(bfin_read_DBGSTAT() & EMUDOF) && !circ_empty(&bfin_jc_write_buf)) {
|
||||
if (outbound_len == 0) {
|
||||
outbound_len = circ_cnt(&bfin_jc_write_buf);
|
||||
bfin_write_emudat(outbound_len);
|
||||
pr_debug("outgoing length: 0x%08x\n", outbound_len);
|
||||
} else {
|
||||
struct tty_struct *tty;
|
||||
int tail = bfin_jc_write_buf.tail;
|
||||
size_t ate = (4 <= outbound_len ? 4 : outbound_len);
|
||||
uint32_t emudat =
|
||||
bfin_write_emudat_chars(
|
||||
circ_byte(&bfin_jc_write_buf, tail + 0),
|
||||
circ_byte(&bfin_jc_write_buf, tail + 1),
|
||||
circ_byte(&bfin_jc_write_buf, tail + 2),
|
||||
circ_byte(&bfin_jc_write_buf, tail + 3)
|
||||
);
|
||||
bfin_jc_write_buf.tail += ate;
|
||||
outbound_len -= ate;
|
||||
mutex_lock(&bfin_jc_tty_mutex);
|
||||
tty = (struct tty_struct *)bfin_jc_tty;
|
||||
if (tty)
|
||||
tty_wakeup(tty);
|
||||
mutex_unlock(&bfin_jc_tty_mutex);
|
||||
pr_debug(" outgoing data: 0x%08x (pushing %zu)\n", emudat, ate);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
__set_current_state(TASK_RUNNING);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
bfin_jc_open(struct tty_struct *tty, struct file *filp)
|
||||
{
|
||||
mutex_lock(&bfin_jc_tty_mutex);
|
||||
pr_debug("open %lu\n", bfin_jc_count);
|
||||
++bfin_jc_count;
|
||||
bfin_jc_tty = tty;
|
||||
wake_up_process(bfin_jc_kthread);
|
||||
mutex_unlock(&bfin_jc_tty_mutex);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
bfin_jc_close(struct tty_struct *tty, struct file *filp)
|
||||
{
|
||||
mutex_lock(&bfin_jc_tty_mutex);
|
||||
pr_debug("close %lu\n", bfin_jc_count);
|
||||
if (--bfin_jc_count == 0)
|
||||
bfin_jc_tty = NULL;
|
||||
wake_up_process(bfin_jc_kthread);
|
||||
mutex_unlock(&bfin_jc_tty_mutex);
|
||||
}
|
||||
|
||||
/* XXX: we dont handle the put_char() case where we must handle count = 1 */
|
||||
static int
|
||||
bfin_jc_circ_write(const unsigned char *buf, int count)
|
||||
{
|
||||
int i;
|
||||
count = min(count, circ_free(&bfin_jc_write_buf));
|
||||
pr_debug("going to write chunk of %i bytes\n", count);
|
||||
for (i = 0; i < count; ++i)
|
||||
circ_byte(&bfin_jc_write_buf, bfin_jc_write_buf.head + i) = buf[i];
|
||||
bfin_jc_write_buf.head += i;
|
||||
return i;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_BFIN_JTAG_COMM_CONSOLE
|
||||
# define console_lock()
|
||||
# define console_unlock()
|
||||
#endif
|
||||
static int
|
||||
bfin_jc_write(struct tty_struct *tty, const unsigned char *buf, int count)
|
||||
{
|
||||
int i;
|
||||
console_lock();
|
||||
i = bfin_jc_circ_write(buf, count);
|
||||
console_unlock();
|
||||
wake_up_process(bfin_jc_kthread);
|
||||
return i;
|
||||
}
|
||||
|
||||
static void
|
||||
bfin_jc_flush_chars(struct tty_struct *tty)
|
||||
{
|
||||
wake_up_process(bfin_jc_kthread);
|
||||
}
|
||||
|
||||
static int
|
||||
bfin_jc_write_room(struct tty_struct *tty)
|
||||
{
|
||||
return circ_free(&bfin_jc_write_buf);
|
||||
}
|
||||
|
||||
static int
|
||||
bfin_jc_chars_in_buffer(struct tty_struct *tty)
|
||||
{
|
||||
return circ_cnt(&bfin_jc_write_buf);
|
||||
}
|
||||
|
||||
static void
|
||||
bfin_jc_wait_until_sent(struct tty_struct *tty, int timeout)
|
||||
{
|
||||
unsigned long expire = jiffies + timeout;
|
||||
while (!circ_empty(&bfin_jc_write_buf)) {
|
||||
if (signal_pending(current))
|
||||
break;
|
||||
if (time_after(jiffies, expire))
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct tty_operations bfin_jc_ops = {
|
||||
.open = bfin_jc_open,
|
||||
.close = bfin_jc_close,
|
||||
.write = bfin_jc_write,
|
||||
/*.put_char = bfin_jc_put_char,*/
|
||||
.flush_chars = bfin_jc_flush_chars,
|
||||
.write_room = bfin_jc_write_room,
|
||||
.chars_in_buffer = bfin_jc_chars_in_buffer,
|
||||
.wait_until_sent = bfin_jc_wait_until_sent,
|
||||
};
|
||||
|
||||
static int __init bfin_jc_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
bfin_jc_kthread = kthread_create(bfin_jc_emudat_manager, NULL, DRV_NAME);
|
||||
if (IS_ERR(bfin_jc_kthread))
|
||||
return PTR_ERR(bfin_jc_kthread);
|
||||
|
||||
ret = -ENOMEM;
|
||||
|
||||
bfin_jc_write_buf.head = bfin_jc_write_buf.tail = 0;
|
||||
bfin_jc_write_buf.buf = kmalloc(CIRC_SIZE, GFP_KERNEL);
|
||||
if (!bfin_jc_write_buf.buf)
|
||||
goto err;
|
||||
|
||||
bfin_jc_driver = alloc_tty_driver(1);
|
||||
if (!bfin_jc_driver)
|
||||
goto err;
|
||||
|
||||
bfin_jc_driver->owner = THIS_MODULE;
|
||||
bfin_jc_driver->driver_name = DRV_NAME;
|
||||
bfin_jc_driver->name = DEV_NAME;
|
||||
bfin_jc_driver->type = TTY_DRIVER_TYPE_SERIAL;
|
||||
bfin_jc_driver->subtype = SERIAL_TYPE_NORMAL;
|
||||
bfin_jc_driver->init_termios = tty_std_termios;
|
||||
tty_set_operations(bfin_jc_driver, &bfin_jc_ops);
|
||||
|
||||
ret = tty_register_driver(bfin_jc_driver);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
pr_init(KERN_INFO DRV_NAME ": initialized\n");
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
put_tty_driver(bfin_jc_driver);
|
||||
kfree(bfin_jc_write_buf.buf);
|
||||
kthread_stop(bfin_jc_kthread);
|
||||
return ret;
|
||||
}
|
||||
module_init(bfin_jc_init);
|
||||
|
||||
static void __exit bfin_jc_exit(void)
|
||||
{
|
||||
kthread_stop(bfin_jc_kthread);
|
||||
kfree(bfin_jc_write_buf.buf);
|
||||
tty_unregister_driver(bfin_jc_driver);
|
||||
put_tty_driver(bfin_jc_driver);
|
||||
}
|
||||
module_exit(bfin_jc_exit);
|
||||
|
||||
#if defined(CONFIG_BFIN_JTAG_COMM_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
|
||||
static void
|
||||
bfin_jc_straight_buffer_write(const char *buf, unsigned count)
|
||||
{
|
||||
unsigned ate = 0;
|
||||
while (bfin_read_DBGSTAT() & EMUDOF)
|
||||
continue;
|
||||
bfin_write_emudat(count);
|
||||
while (ate < count) {
|
||||
while (bfin_read_DBGSTAT() & EMUDOF)
|
||||
continue;
|
||||
bfin_write_emudat_chars(buf[ate], buf[ate+1], buf[ate+2], buf[ate+3]);
|
||||
ate += 4;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_JTAG_COMM_CONSOLE
|
||||
static void
|
||||
bfin_jc_console_write(struct console *co, const char *buf, unsigned count)
|
||||
{
|
||||
if (bfin_jc_kthread == NULL)
|
||||
bfin_jc_straight_buffer_write(buf, count);
|
||||
else
|
||||
bfin_jc_circ_write(buf, count);
|
||||
}
|
||||
|
||||
static struct tty_driver *
|
||||
bfin_jc_console_device(struct console *co, int *index)
|
||||
{
|
||||
*index = co->index;
|
||||
return bfin_jc_driver;
|
||||
}
|
||||
|
||||
static struct console bfin_jc_console = {
|
||||
.name = DEV_NAME,
|
||||
.write = bfin_jc_console_write,
|
||||
.device = bfin_jc_console_device,
|
||||
.flags = CON_ANYTIME | CON_PRINTBUFFER,
|
||||
.index = -1,
|
||||
};
|
||||
|
||||
static int __init bfin_jc_console_init(void)
|
||||
{
|
||||
register_console(&bfin_jc_console);
|
||||
return 0;
|
||||
}
|
||||
console_initcall(bfin_jc_console_init);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_EARLY_PRINTK
|
||||
static void __init
|
||||
bfin_jc_early_write(struct console *co, const char *buf, unsigned int count)
|
||||
{
|
||||
bfin_jc_straight_buffer_write(buf, count);
|
||||
}
|
||||
|
||||
static struct __initdata console bfin_jc_early_console = {
|
||||
.name = "early_BFJC",
|
||||
.write = bfin_jc_early_write,
|
||||
.flags = CON_ANYTIME | CON_PRINTBUFFER,
|
||||
.index = -1,
|
||||
};
|
||||
|
||||
struct console * __init
|
||||
bfin_jc_early_init(unsigned int port, unsigned int cflag)
|
||||
{
|
||||
return &bfin_jc_early_console;
|
||||
}
|
||||
#endif
|
||||
|
||||
MODULE_AUTHOR("Mike Frysinger <vapier@gentoo.org>");
|
||||
MODULE_DESCRIPTION("TTY over Blackfin JTAG Communication");
|
||||
MODULE_LICENSE("GPL");
|
||||
4200
drivers/tty/cyclades.c
Normal file
4200
drivers/tty/cyclades.c
Normal file
File diff suppressed because it is too large
Load diff
1736
drivers/tty/isicom.c
Normal file
1736
drivers/tty/isicom.c
Normal file
File diff suppressed because it is too large
Load diff
2092
drivers/tty/moxa.c
Normal file
2092
drivers/tty/moxa.c
Normal file
File diff suppressed because it is too large
Load diff
304
drivers/tty/moxa.h
Normal file
304
drivers/tty/moxa.h
Normal file
|
|
@ -0,0 +1,304 @@
|
|||
#ifndef MOXA_H_FILE
|
||||
#define MOXA_H_FILE
|
||||
|
||||
#define MOXA 0x400
|
||||
#define MOXA_GET_IQUEUE (MOXA + 1) /* get input buffered count */
|
||||
#define MOXA_GET_OQUEUE (MOXA + 2) /* get output buffered count */
|
||||
#define MOXA_GETDATACOUNT (MOXA + 23)
|
||||
#define MOXA_GET_IOQUEUE (MOXA + 27)
|
||||
#define MOXA_FLUSH_QUEUE (MOXA + 28)
|
||||
#define MOXA_GETMSTATUS (MOXA + 65)
|
||||
|
||||
/*
|
||||
* System Configuration
|
||||
*/
|
||||
|
||||
#define Magic_code 0x404
|
||||
|
||||
/*
|
||||
* for C218 BIOS initialization
|
||||
*/
|
||||
#define C218_ConfBase 0x800
|
||||
#define C218_status (C218_ConfBase + 0) /* BIOS running status */
|
||||
#define C218_diag (C218_ConfBase + 2) /* diagnostic status */
|
||||
#define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
|
||||
#define C218DLoad_len (C218_ConfBase + 6) /* WORD */
|
||||
#define C218check_sum (C218_ConfBase + 8) /* BYTE */
|
||||
#define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
|
||||
#define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
|
||||
#define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
|
||||
#define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
|
||||
#define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
|
||||
|
||||
#define C218_LoadBuf 0x0F00
|
||||
#define C218_KeyCode 0x218
|
||||
#define CP204J_KeyCode 0x204
|
||||
|
||||
/*
|
||||
* for C320 BIOS initialization
|
||||
*/
|
||||
#define C320_ConfBase 0x800
|
||||
#define C320_LoadBuf 0x0f00
|
||||
#define STS_init 0x05 /* for C320_status */
|
||||
|
||||
#define C320_status C320_ConfBase + 0 /* BIOS running status */
|
||||
#define C320_diag C320_ConfBase + 2 /* diagnostic status */
|
||||
#define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */
|
||||
#define C320DLoad_len C320_ConfBase + 6 /* WORD */
|
||||
#define C320check_sum C320_ConfBase + 8 /* WORD */
|
||||
#define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */
|
||||
#define C320bapi_len C320_ConfBase + 0x0c /* WORD */
|
||||
#define C320UART_no C320_ConfBase + 0x0e /* WORD */
|
||||
|
||||
#define C320_KeyCode 0x320
|
||||
|
||||
#define FixPage_addr 0x0000 /* starting addr of static page */
|
||||
#define DynPage_addr 0x2000 /* starting addr of dynamic page */
|
||||
#define C218_start 0x3000 /* starting addr of C218 BIOS prg */
|
||||
#define Control_reg 0x1ff0 /* select page and reset control */
|
||||
#define HW_reset 0x80
|
||||
|
||||
/*
|
||||
* Function Codes
|
||||
*/
|
||||
#define FC_CardReset 0x80
|
||||
#define FC_ChannelReset 1 /* C320 firmware not supported */
|
||||
#define FC_EnableCH 2
|
||||
#define FC_DisableCH 3
|
||||
#define FC_SetParam 4
|
||||
#define FC_SetMode 5
|
||||
#define FC_SetRate 6
|
||||
#define FC_LineControl 7
|
||||
#define FC_LineStatus 8
|
||||
#define FC_XmitControl 9
|
||||
#define FC_FlushQueue 10
|
||||
#define FC_SendBreak 11
|
||||
#define FC_StopBreak 12
|
||||
#define FC_LoopbackON 13
|
||||
#define FC_LoopbackOFF 14
|
||||
#define FC_ClrIrqTable 15
|
||||
#define FC_SendXon 16
|
||||
#define FC_SetTermIrq 17 /* C320 firmware not supported */
|
||||
#define FC_SetCntIrq 18 /* C320 firmware not supported */
|
||||
#define FC_SetBreakIrq 19
|
||||
#define FC_SetLineIrq 20
|
||||
#define FC_SetFlowCtl 21
|
||||
#define FC_GenIrq 22
|
||||
#define FC_InCD180 23
|
||||
#define FC_OutCD180 24
|
||||
#define FC_InUARTreg 23
|
||||
#define FC_OutUARTreg 24
|
||||
#define FC_SetXonXoff 25
|
||||
#define FC_OutCD180CCR 26
|
||||
#define FC_ExtIQueue 27
|
||||
#define FC_ExtOQueue 28
|
||||
#define FC_ClrLineIrq 29
|
||||
#define FC_HWFlowCtl 30
|
||||
#define FC_GetClockRate 35
|
||||
#define FC_SetBaud 36
|
||||
#define FC_SetDataMode 41
|
||||
#define FC_GetCCSR 43
|
||||
#define FC_GetDataError 45
|
||||
#define FC_RxControl 50
|
||||
#define FC_ImmSend 51
|
||||
#define FC_SetXonState 52
|
||||
#define FC_SetXoffState 53
|
||||
#define FC_SetRxFIFOTrig 54
|
||||
#define FC_SetTxFIFOCnt 55
|
||||
#define FC_UnixRate 56
|
||||
#define FC_UnixResetTimer 57
|
||||
|
||||
#define RxFIFOTrig1 0
|
||||
#define RxFIFOTrig4 1
|
||||
#define RxFIFOTrig8 2
|
||||
#define RxFIFOTrig14 3
|
||||
|
||||
/*
|
||||
* Dual-Ported RAM
|
||||
*/
|
||||
#define DRAM_global 0
|
||||
#define INT_data (DRAM_global + 0)
|
||||
#define Config_base (DRAM_global + 0x108)
|
||||
|
||||
#define IRQindex (INT_data + 0)
|
||||
#define IRQpending (INT_data + 4)
|
||||
#define IRQtable (INT_data + 8)
|
||||
|
||||
/*
|
||||
* Interrupt Status
|
||||
*/
|
||||
#define IntrRx 0x01 /* receiver data O.K. */
|
||||
#define IntrTx 0x02 /* transmit buffer empty */
|
||||
#define IntrFunc 0x04 /* function complete */
|
||||
#define IntrBreak 0x08 /* received break */
|
||||
#define IntrLine 0x10 /* line status change
|
||||
for transmitter */
|
||||
#define IntrIntr 0x20 /* received INTR code */
|
||||
#define IntrQuit 0x40 /* received QUIT code */
|
||||
#define IntrEOF 0x80 /* received EOF code */
|
||||
|
||||
#define IntrRxTrigger 0x100 /* rx data count reach tigger value */
|
||||
#define IntrTxTrigger 0x200 /* tx data count below trigger value */
|
||||
|
||||
#define Magic_no (Config_base + 0)
|
||||
#define Card_model_no (Config_base + 2)
|
||||
#define Total_ports (Config_base + 4)
|
||||
#define Module_cnt (Config_base + 8)
|
||||
#define Module_no (Config_base + 10)
|
||||
#define Timer_10ms (Config_base + 14)
|
||||
#define Disable_IRQ (Config_base + 20)
|
||||
#define TMS320_PORT1 (Config_base + 22)
|
||||
#define TMS320_PORT2 (Config_base + 24)
|
||||
#define TMS320_CLOCK (Config_base + 26)
|
||||
|
||||
/*
|
||||
* DATA BUFFER in DRAM
|
||||
*/
|
||||
#define Extern_table 0x400 /* Base address of the external table
|
||||
(24 words * 64) total 3K bytes
|
||||
(24 words * 128) total 6K bytes */
|
||||
#define Extern_size 0x60 /* 96 bytes */
|
||||
#define RXrptr 0x00 /* read pointer for RX buffer */
|
||||
#define RXwptr 0x02 /* write pointer for RX buffer */
|
||||
#define TXrptr 0x04 /* read pointer for TX buffer */
|
||||
#define TXwptr 0x06 /* write pointer for TX buffer */
|
||||
#define HostStat 0x08 /* IRQ flag and general flag */
|
||||
#define FlagStat 0x0A
|
||||
#define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */
|
||||
/* x x x x | | | | */
|
||||
/* | | | + CTS flow */
|
||||
/* | | +--- RTS flow */
|
||||
/* | +------ TX Xon/Xoff */
|
||||
/* +--------- RX Xon/Xoff */
|
||||
#define Break_cnt 0x0E /* received break count */
|
||||
#define CD180TXirq 0x10 /* if non-0: enable TX irq */
|
||||
#define RX_mask 0x12
|
||||
#define TX_mask 0x14
|
||||
#define Ofs_rxb 0x16
|
||||
#define Ofs_txb 0x18
|
||||
#define Page_rxb 0x1A
|
||||
#define Page_txb 0x1C
|
||||
#define EndPage_rxb 0x1E
|
||||
#define EndPage_txb 0x20
|
||||
#define Data_error 0x22
|
||||
#define RxTrigger 0x28
|
||||
#define TxTrigger 0x2a
|
||||
|
||||
#define rRXwptr 0x34
|
||||
#define Low_water 0x36
|
||||
|
||||
#define FuncCode 0x40
|
||||
#define FuncArg 0x42
|
||||
#define FuncArg1 0x44
|
||||
|
||||
#define C218rx_size 0x2000 /* 8K bytes */
|
||||
#define C218tx_size 0x8000 /* 32K bytes */
|
||||
|
||||
#define C218rx_mask (C218rx_size - 1)
|
||||
#define C218tx_mask (C218tx_size - 1)
|
||||
|
||||
#define C320p8rx_size 0x2000
|
||||
#define C320p8tx_size 0x8000
|
||||
#define C320p8rx_mask (C320p8rx_size - 1)
|
||||
#define C320p8tx_mask (C320p8tx_size - 1)
|
||||
|
||||
#define C320p16rx_size 0x2000
|
||||
#define C320p16tx_size 0x4000
|
||||
#define C320p16rx_mask (C320p16rx_size - 1)
|
||||
#define C320p16tx_mask (C320p16tx_size - 1)
|
||||
|
||||
#define C320p24rx_size 0x2000
|
||||
#define C320p24tx_size 0x2000
|
||||
#define C320p24rx_mask (C320p24rx_size - 1)
|
||||
#define C320p24tx_mask (C320p24tx_size - 1)
|
||||
|
||||
#define C320p32rx_size 0x1000
|
||||
#define C320p32tx_size 0x1000
|
||||
#define C320p32rx_mask (C320p32rx_size - 1)
|
||||
#define C320p32tx_mask (C320p32tx_size - 1)
|
||||
|
||||
#define Page_size 0x2000U
|
||||
#define Page_mask (Page_size - 1)
|
||||
#define C218rx_spage 3
|
||||
#define C218tx_spage 4
|
||||
#define C218rx_pageno 1
|
||||
#define C218tx_pageno 4
|
||||
#define C218buf_pageno 5
|
||||
|
||||
#define C320p8rx_spage 3
|
||||
#define C320p8tx_spage 4
|
||||
#define C320p8rx_pgno 1
|
||||
#define C320p8tx_pgno 4
|
||||
#define C320p8buf_pgno 5
|
||||
|
||||
#define C320p16rx_spage 3
|
||||
#define C320p16tx_spage 4
|
||||
#define C320p16rx_pgno 1
|
||||
#define C320p16tx_pgno 2
|
||||
#define C320p16buf_pgno 3
|
||||
|
||||
#define C320p24rx_spage 3
|
||||
#define C320p24tx_spage 4
|
||||
#define C320p24rx_pgno 1
|
||||
#define C320p24tx_pgno 1
|
||||
#define C320p24buf_pgno 2
|
||||
|
||||
#define C320p32rx_spage 3
|
||||
#define C320p32tx_ofs C320p32rx_size
|
||||
#define C320p32tx_spage 3
|
||||
#define C320p32buf_pgno 1
|
||||
|
||||
/*
|
||||
* Host Status
|
||||
*/
|
||||
#define WakeupRx 0x01
|
||||
#define WakeupTx 0x02
|
||||
#define WakeupBreak 0x08
|
||||
#define WakeupLine 0x10
|
||||
#define WakeupIntr 0x20
|
||||
#define WakeupQuit 0x40
|
||||
#define WakeupEOF 0x80 /* used in VTIME control */
|
||||
#define WakeupRxTrigger 0x100
|
||||
#define WakeupTxTrigger 0x200
|
||||
/*
|
||||
* Flag status
|
||||
*/
|
||||
#define Rx_over 0x01
|
||||
#define Xoff_state 0x02
|
||||
#define Tx_flowOff 0x04
|
||||
#define Tx_enable 0x08
|
||||
#define CTS_state 0x10
|
||||
#define DSR_state 0x20
|
||||
#define DCD_state 0x80
|
||||
/*
|
||||
* FlowControl
|
||||
*/
|
||||
#define CTS_FlowCtl 1
|
||||
#define RTS_FlowCtl 2
|
||||
#define Tx_FlowCtl 4
|
||||
#define Rx_FlowCtl 8
|
||||
#define IXM_IXANY 0x10
|
||||
|
||||
#define LowWater 128
|
||||
|
||||
#define DTR_ON 1
|
||||
#define RTS_ON 2
|
||||
#define CTS_ON 1
|
||||
#define DSR_ON 2
|
||||
#define DCD_ON 8
|
||||
|
||||
/* mode definition */
|
||||
#define MX_CS8 0x03
|
||||
#define MX_CS7 0x02
|
||||
#define MX_CS6 0x01
|
||||
#define MX_CS5 0x00
|
||||
|
||||
#define MX_STOP1 0x00
|
||||
#define MX_STOP15 0x04
|
||||
#define MX_STOP2 0x08
|
||||
|
||||
#define MX_PARNONE 0x00
|
||||
#define MX_PAREVEN 0x40
|
||||
#define MX_PARODD 0xC0
|
||||
|
||||
#endif
|
||||
2757
drivers/tty/mxser.c
Normal file
2757
drivers/tty/mxser.c
Normal file
File diff suppressed because it is too large
Load diff
150
drivers/tty/mxser.h
Normal file
150
drivers/tty/mxser.h
Normal file
|
|
@ -0,0 +1,150 @@
|
|||
#ifndef _MXSER_H
|
||||
#define _MXSER_H
|
||||
|
||||
/*
|
||||
* Semi-public control interfaces
|
||||
*/
|
||||
|
||||
/*
|
||||
* MOXA ioctls
|
||||
*/
|
||||
|
||||
#define MOXA 0x400
|
||||
#define MOXA_GETDATACOUNT (MOXA + 23)
|
||||
#define MOXA_DIAGNOSE (MOXA + 50)
|
||||
#define MOXA_CHKPORTENABLE (MOXA + 60)
|
||||
#define MOXA_HighSpeedOn (MOXA + 61)
|
||||
#define MOXA_GET_MAJOR (MOXA + 63)
|
||||
#define MOXA_GETMSTATUS (MOXA + 65)
|
||||
#define MOXA_SET_OP_MODE (MOXA + 66)
|
||||
#define MOXA_GET_OP_MODE (MOXA + 67)
|
||||
|
||||
#define RS232_MODE 0
|
||||
#define RS485_2WIRE_MODE 1
|
||||
#define RS422_MODE 2
|
||||
#define RS485_4WIRE_MODE 3
|
||||
#define OP_MODE_MASK 3
|
||||
|
||||
#define MOXA_SDS_RSTICOUNTER (MOXA + 69)
|
||||
#define MOXA_ASPP_OQUEUE (MOXA + 70)
|
||||
#define MOXA_ASPP_MON (MOXA + 73)
|
||||
#define MOXA_ASPP_LSTATUS (MOXA + 74)
|
||||
#define MOXA_ASPP_MON_EXT (MOXA + 75)
|
||||
#define MOXA_SET_BAUD_METHOD (MOXA + 76)
|
||||
|
||||
/* --------------------------------------------------- */
|
||||
|
||||
#define NPPI_NOTIFY_PARITY 0x01
|
||||
#define NPPI_NOTIFY_FRAMING 0x02
|
||||
#define NPPI_NOTIFY_HW_OVERRUN 0x04
|
||||
#define NPPI_NOTIFY_SW_OVERRUN 0x08
|
||||
#define NPPI_NOTIFY_BREAK 0x10
|
||||
|
||||
#define NPPI_NOTIFY_CTSHOLD 0x01 /* Tx hold by CTS low */
|
||||
#define NPPI_NOTIFY_DSRHOLD 0x02 /* Tx hold by DSR low */
|
||||
#define NPPI_NOTIFY_XOFFHOLD 0x08 /* Tx hold by Xoff received */
|
||||
#define NPPI_NOTIFY_XOFFXENT 0x10 /* Xoff Sent */
|
||||
|
||||
/* follow just for Moxa Must chip define. */
|
||||
/* */
|
||||
/* when LCR register (offset 0x03) write following value, */
|
||||
/* the Must chip will enter enchance mode. And write value */
|
||||
/* on EFR (offset 0x02) bit 6,7 to change bank. */
|
||||
#define MOXA_MUST_ENTER_ENCHANCE 0xBF
|
||||
|
||||
/* when enhance mode enable, access on general bank register */
|
||||
#define MOXA_MUST_GDL_REGISTER 0x07
|
||||
#define MOXA_MUST_GDL_MASK 0x7F
|
||||
#define MOXA_MUST_GDL_HAS_BAD_DATA 0x80
|
||||
|
||||
#define MOXA_MUST_LSR_RERR 0x80 /* error in receive FIFO */
|
||||
/* enchance register bank select and enchance mode setting register */
|
||||
/* when LCR register equal to 0xBF */
|
||||
#define MOXA_MUST_EFR_REGISTER 0x02
|
||||
/* enchance mode enable */
|
||||
#define MOXA_MUST_EFR_EFRB_ENABLE 0x10
|
||||
/* enchance reister bank set 0, 1, 2 */
|
||||
#define MOXA_MUST_EFR_BANK0 0x00
|
||||
#define MOXA_MUST_EFR_BANK1 0x40
|
||||
#define MOXA_MUST_EFR_BANK2 0x80
|
||||
#define MOXA_MUST_EFR_BANK3 0xC0
|
||||
#define MOXA_MUST_EFR_BANK_MASK 0xC0
|
||||
|
||||
/* set XON1 value register, when LCR=0xBF and change to bank0 */
|
||||
#define MOXA_MUST_XON1_REGISTER 0x04
|
||||
|
||||
/* set XON2 value register, when LCR=0xBF and change to bank0 */
|
||||
#define MOXA_MUST_XON2_REGISTER 0x05
|
||||
|
||||
/* set XOFF1 value register, when LCR=0xBF and change to bank0 */
|
||||
#define MOXA_MUST_XOFF1_REGISTER 0x06
|
||||
|
||||
/* set XOFF2 value register, when LCR=0xBF and change to bank0 */
|
||||
#define MOXA_MUST_XOFF2_REGISTER 0x07
|
||||
|
||||
#define MOXA_MUST_RBRTL_REGISTER 0x04
|
||||
#define MOXA_MUST_RBRTH_REGISTER 0x05
|
||||
#define MOXA_MUST_RBRTI_REGISTER 0x06
|
||||
#define MOXA_MUST_THRTL_REGISTER 0x07
|
||||
#define MOXA_MUST_ENUM_REGISTER 0x04
|
||||
#define MOXA_MUST_HWID_REGISTER 0x05
|
||||
#define MOXA_MUST_ECR_REGISTER 0x06
|
||||
#define MOXA_MUST_CSR_REGISTER 0x07
|
||||
|
||||
/* good data mode enable */
|
||||
#define MOXA_MUST_FCR_GDA_MODE_ENABLE 0x20
|
||||
/* only good data put into RxFIFO */
|
||||
#define MOXA_MUST_FCR_GDA_ONLY_ENABLE 0x10
|
||||
|
||||
/* enable CTS interrupt */
|
||||
#define MOXA_MUST_IER_ECTSI 0x80
|
||||
/* enable RTS interrupt */
|
||||
#define MOXA_MUST_IER_ERTSI 0x40
|
||||
/* enable Xon/Xoff interrupt */
|
||||
#define MOXA_MUST_IER_XINT 0x20
|
||||
/* enable GDA interrupt */
|
||||
#define MOXA_MUST_IER_EGDAI 0x10
|
||||
|
||||
#define MOXA_MUST_RECV_ISR (UART_IER_RDI | MOXA_MUST_IER_EGDAI)
|
||||
|
||||
/* GDA interrupt pending */
|
||||
#define MOXA_MUST_IIR_GDA 0x1C
|
||||
#define MOXA_MUST_IIR_RDA 0x04
|
||||
#define MOXA_MUST_IIR_RTO 0x0C
|
||||
#define MOXA_MUST_IIR_LSR 0x06
|
||||
|
||||
/* recieved Xon/Xoff or specical interrupt pending */
|
||||
#define MOXA_MUST_IIR_XSC 0x10
|
||||
|
||||
/* RTS/CTS change state interrupt pending */
|
||||
#define MOXA_MUST_IIR_RTSCTS 0x20
|
||||
#define MOXA_MUST_IIR_MASK 0x3E
|
||||
|
||||
#define MOXA_MUST_MCR_XON_FLAG 0x40
|
||||
#define MOXA_MUST_MCR_XON_ANY 0x80
|
||||
#define MOXA_MUST_MCR_TX_XON 0x08
|
||||
|
||||
/* software flow control on chip mask value */
|
||||
#define MOXA_MUST_EFR_SF_MASK 0x0F
|
||||
/* send Xon1/Xoff1 */
|
||||
#define MOXA_MUST_EFR_SF_TX1 0x08
|
||||
/* send Xon2/Xoff2 */
|
||||
#define MOXA_MUST_EFR_SF_TX2 0x04
|
||||
/* send Xon1,Xon2/Xoff1,Xoff2 */
|
||||
#define MOXA_MUST_EFR_SF_TX12 0x0C
|
||||
/* don't send Xon/Xoff */
|
||||
#define MOXA_MUST_EFR_SF_TX_NO 0x00
|
||||
/* Tx software flow control mask */
|
||||
#define MOXA_MUST_EFR_SF_TX_MASK 0x0C
|
||||
/* don't receive Xon/Xoff */
|
||||
#define MOXA_MUST_EFR_SF_RX_NO 0x00
|
||||
/* receive Xon1/Xoff1 */
|
||||
#define MOXA_MUST_EFR_SF_RX1 0x02
|
||||
/* receive Xon2/Xoff2 */
|
||||
#define MOXA_MUST_EFR_SF_RX2 0x01
|
||||
/* receive Xon1,Xon2/Xoff1,Xoff2 */
|
||||
#define MOXA_MUST_EFR_SF_RX12 0x03
|
||||
/* Rx software flow control mask */
|
||||
#define MOXA_MUST_EFR_SF_RX_MASK 0x03
|
||||
|
||||
#endif
|
||||
1993
drivers/tty/nozomi.c
Normal file
1993
drivers/tty/nozomi.c
Normal file
File diff suppressed because it is too large
Load diff
3199
drivers/tty/rocket.c
Normal file
3199
drivers/tty/rocket.c
Normal file
File diff suppressed because it is too large
Load diff
111
drivers/tty/rocket.h
Normal file
111
drivers/tty/rocket.h
Normal file
|
|
@ -0,0 +1,111 @@
|
|||
/*
|
||||
* rocket.h --- the exported interface of the rocket driver to its configuration program.
|
||||
*
|
||||
* Written by Theodore Ts'o, Copyright 1997.
|
||||
* Copyright 1997 Comtrol Corporation.
|
||||
*
|
||||
*/
|
||||
|
||||
/* Model Information Struct */
|
||||
typedef struct {
|
||||
unsigned long model;
|
||||
char modelString[80];
|
||||
unsigned long numPorts;
|
||||
int loadrm2;
|
||||
int startingPortNumber;
|
||||
} rocketModel_t;
|
||||
|
||||
struct rocket_config {
|
||||
int line;
|
||||
int flags;
|
||||
int closing_wait;
|
||||
int close_delay;
|
||||
int port;
|
||||
int reserved[32];
|
||||
};
|
||||
|
||||
struct rocket_ports {
|
||||
int tty_major;
|
||||
int callout_major;
|
||||
rocketModel_t rocketModel[8];
|
||||
};
|
||||
|
||||
struct rocket_version {
|
||||
char rocket_version[32];
|
||||
char rocket_date[32];
|
||||
char reserved[64];
|
||||
};
|
||||
|
||||
/*
|
||||
* Rocketport flags
|
||||
*/
|
||||
/*#define ROCKET_CALLOUT_NOHUP 0x00000001 */
|
||||
#define ROCKET_FORCE_CD 0x00000002
|
||||
#define ROCKET_HUP_NOTIFY 0x00000004
|
||||
#define ROCKET_SPLIT_TERMIOS 0x00000008
|
||||
#define ROCKET_SPD_MASK 0x00000070
|
||||
#define ROCKET_SPD_HI 0x00000010 /* Use 56000 instead of 38400 bps */
|
||||
#define ROCKET_SPD_VHI 0x00000020 /* Use 115200 instead of 38400 bps */
|
||||
#define ROCKET_SPD_SHI 0x00000030 /* Use 230400 instead of 38400 bps */
|
||||
#define ROCKET_SPD_WARP 0x00000040 /* Use 460800 instead of 38400 bps */
|
||||
#define ROCKET_SAK 0x00000080
|
||||
#define ROCKET_SESSION_LOCKOUT 0x00000100
|
||||
#define ROCKET_PGRP_LOCKOUT 0x00000200
|
||||
#define ROCKET_RTS_TOGGLE 0x00000400
|
||||
#define ROCKET_MODE_MASK 0x00003000
|
||||
#define ROCKET_MODE_RS232 0x00000000
|
||||
#define ROCKET_MODE_RS485 0x00001000
|
||||
#define ROCKET_MODE_RS422 0x00002000
|
||||
#define ROCKET_FLAGS 0x00003FFF
|
||||
|
||||
#define ROCKET_USR_MASK 0x0071 /* Legal flags that non-privileged
|
||||
* users can set or reset */
|
||||
|
||||
/*
|
||||
* For closing_wait and closing_wait2
|
||||
*/
|
||||
#define ROCKET_CLOSING_WAIT_NONE ASYNC_CLOSING_WAIT_NONE
|
||||
#define ROCKET_CLOSING_WAIT_INF ASYNC_CLOSING_WAIT_INF
|
||||
|
||||
/*
|
||||
* Rocketport ioctls -- "RP"
|
||||
*/
|
||||
#define RCKP_GET_STRUCT 0x00525001
|
||||
#define RCKP_GET_CONFIG 0x00525002
|
||||
#define RCKP_SET_CONFIG 0x00525003
|
||||
#define RCKP_GET_PORTS 0x00525004
|
||||
#define RCKP_RESET_RM2 0x00525005
|
||||
#define RCKP_GET_VERSION 0x00525006
|
||||
|
||||
/* Rocketport Models */
|
||||
#define MODEL_RP32INTF 0x0001 /* RP 32 port w/external I/F */
|
||||
#define MODEL_RP8INTF 0x0002 /* RP 8 port w/external I/F */
|
||||
#define MODEL_RP16INTF 0x0003 /* RP 16 port w/external I/F */
|
||||
#define MODEL_RP8OCTA 0x0005 /* RP 8 port w/octa cable */
|
||||
#define MODEL_RP4QUAD 0x0004 /* RP 4 port w/quad cable */
|
||||
#define MODEL_RP8J 0x0006 /* RP 8 port w/RJ11 connectors */
|
||||
#define MODEL_RP4J 0x0007 /* RP 4 port w/RJ45 connectors */
|
||||
#define MODEL_RP8SNI 0x0008 /* RP 8 port w/ DB78 SNI connector */
|
||||
#define MODEL_RP16SNI 0x0009 /* RP 16 port w/ DB78 SNI connector */
|
||||
#define MODEL_RPP4 0x000A /* RP Plus 4 port */
|
||||
#define MODEL_RPP8 0x000B /* RP Plus 8 port */
|
||||
#define MODEL_RP2_232 0x000E /* RP Plus 2 port RS232 */
|
||||
#define MODEL_RP2_422 0x000F /* RP Plus 2 port RS232 */
|
||||
|
||||
/* Rocketmodem II Models */
|
||||
#define MODEL_RP6M 0x000C /* RM 6 port */
|
||||
#define MODEL_RP4M 0x000D /* RM 4 port */
|
||||
|
||||
/* Universal PCI boards */
|
||||
#define MODEL_UPCI_RP32INTF 0x0801 /* RP UPCI 32 port w/external I/F */
|
||||
#define MODEL_UPCI_RP8INTF 0x0802 /* RP UPCI 8 port w/external I/F */
|
||||
#define MODEL_UPCI_RP16INTF 0x0803 /* RP UPCI 16 port w/external I/F */
|
||||
#define MODEL_UPCI_RP8OCTA 0x0805 /* RP UPCI 8 port w/octa cable */
|
||||
#define MODEL_UPCI_RM3_8PORT 0x080C /* RP UPCI Rocketmodem III 8 port */
|
||||
#define MODEL_UPCI_RM3_4PORT 0x080C /* RP UPCI Rocketmodem III 4 port */
|
||||
|
||||
/* Compact PCI 16 port */
|
||||
#define MODEL_CPCI_RP16INTF 0x0903 /* RP Compact PCI 16 port w/external I/F */
|
||||
|
||||
/* All ISA boards */
|
||||
#define MODEL_ISA 0x1000
|
||||
1214
drivers/tty/rocket_int.h
Normal file
1214
drivers/tty/rocket_int.h
Normal file
File diff suppressed because it is too large
Load diff
8119
drivers/tty/synclink.c
Normal file
8119
drivers/tty/synclink.c
Normal file
File diff suppressed because it is too large
Load diff
5161
drivers/tty/synclink_gt.c
Normal file
5161
drivers/tty/synclink_gt.c
Normal file
File diff suppressed because it is too large
Load diff
5600
drivers/tty/synclinkmp.c
Normal file
5600
drivers/tty/synclinkmp.c
Normal file
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue