mirror of
https://github.com/a52xq-dev/kernel.git
synced 2026-10-18 21:58:11 +07:00
ARM: 32-bit SoC platform updates
Most of the SoC updates in this cycle are cleanups and moves to more
modern infrastructure:
- Davinci was moved to common clock framework
- OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
keyboard interface (bitbanged AT keyboard via GPIO).
- Removal of some stale code for Renesas platforms
- Power management improvements for i.MX6LL
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 32-bit SoC platform updates from Olof Johansson:
"Most of the SoC updates in this cycle are cleanups and moves to more
modern infrastructure:
- Davinci was moved to common clock framework
- OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
keyboard interface (bitbanged AT keyboard via GPIO).
- Removal of some stale code for Renesas platforms
- Power management improvements for i.MX6LL"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (112 commits)
ARM: uniphier: select RESET_CONTROLLER
arm64: uniphier: select RESET_CONTROLLER
ARM: uniphier: remove empty Makefile
ARM: exynos: Clear global variable on init error path
ARM: exynos: Remove outdated maintainer information
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
soc: r9a06g032: don't build SMP files for non-SMP config
ARM: shmobile: Add the R9A06G032 SMP enabler driver
ARM: at91: pm: configure wakeup sources for ULP1 mode
ARM: at91: pm: add PMC fast startup registers defines
ARM: at91: pm: Add ULP1 mode support
ARM: at91: pm: Use ULP0 naming instead of slow clock
ARM: hisi: handle of_iomap and fix missing of_node_put
ARM: hisi: check of_iomap and fix missing of_node_put
ARM: hisi: fix error handling and missing of_node_put
ARM: mx5: Set the DBGEN bit in ARM_GPC register
ARM: imx51: Configure M4IF to avoid visual artifacts
ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
ARM: imx: fix i.MX6SLL build
...
This commit is contained in:
commit
9e259f9352
133 changed files with 2432 additions and 5307 deletions
16
MAINTAINERS
16
MAINTAINERS
|
|
@ -1295,11 +1295,6 @@ F: arch/arm/mach-aspeed/
|
|||
F: arch/arm/boot/dts/aspeed-*
|
||||
N: aspeed
|
||||
|
||||
ARM/ATMEL AT91 Clock Support
|
||||
M: Boris Brezillon <boris.brezillon@bootlin.com>
|
||||
S: Maintained
|
||||
F: drivers/clk/at91
|
||||
|
||||
ARM/CALXEDA HIGHBANK ARCHITECTURE
|
||||
M: Rob Herring <robh@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
|
@ -1481,6 +1476,16 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
|
|||
F: arch/arm/mach-imx/*vf610*
|
||||
F: arch/arm/boot/dts/vf*
|
||||
|
||||
ARM/FREESCALE LAYERSCAPE ARM ARCHITECTURE
|
||||
M: Shawn Guo <shawnguo@kernel.org>
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
|
||||
F: arch/arm/boot/dts/ls1021a*
|
||||
F: arch/arm64/boot/dts/freescale/fsl-*
|
||||
F: arch/arm64/boot/dts/freescale/qoriq-*
|
||||
|
||||
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
|
@ -10571,6 +10576,7 @@ F: arch/arm/plat-omap/
|
|||
F: arch/arm/configs/omap1_defconfig
|
||||
F: drivers/i2c/busses/i2c-omap.c
|
||||
F: include/linux/platform_data/i2c-omap.h
|
||||
F: include/linux/platform_data/ams-delta-fiq.h
|
||||
|
||||
OMAP2+ SUPPORT
|
||||
M: Tony Lindgren <tony@atomide.com>
|
||||
|
|
|
|||
|
|
@ -603,13 +603,16 @@ config ARCH_S3C24XX
|
|||
config ARCH_DAVINCI
|
||||
bool "TI DaVinci"
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select CLKDEV_LOOKUP
|
||||
select COMMON_CLK
|
||||
select CPU_ARM926T
|
||||
select GENERIC_ALLOCATOR
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_IRQ_CHIP
|
||||
select GPIOLIB
|
||||
select HAVE_IDE
|
||||
select PM_GENERIC_DOMAINS if PM
|
||||
select PM_GENERIC_DOMAINS_OF if PM && OF
|
||||
select RESET_CONTROLLER
|
||||
select USE_OF
|
||||
select ZONE_DMA
|
||||
help
|
||||
|
|
|
|||
|
|
@ -204,6 +204,14 @@ choice
|
|||
depends on ARCH_BCM_HR2
|
||||
select DEBUG_UART_8250
|
||||
|
||||
config DEBUG_BCM_IPROC_UART3
|
||||
bool "Kernel low-level debugging on BCM IPROC UART3"
|
||||
depends on ARCH_BCM_CYGNUS
|
||||
select DEBUG_UART_8250
|
||||
help
|
||||
Say Y here if you want the debug print routines to direct
|
||||
their output to the third serial port on these devices.
|
||||
|
||||
config DEBUG_BCM_KONA_UART
|
||||
bool "Kernel low-level debugging messages via BCM KONA UART"
|
||||
depends on ARCH_BCM_MOBILE
|
||||
|
|
@ -1562,14 +1570,15 @@ config DEBUG_UART_PHYS
|
|||
default 0x18000400 if DEBUG_BCM_HR2
|
||||
default 0x18010000 if DEBUG_SIRFATLAS7_UART0
|
||||
default 0x18020000 if DEBUG_SIRFATLAS7_UART1
|
||||
default 0x18023000 if DEBUG_BCM_IPROC_UART3
|
||||
default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
|
||||
default 0x20001000 if DEBUG_HIP01_UART
|
||||
default 0x20060000 if DEBUG_RK29_UART0
|
||||
default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
|
||||
default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
|
||||
default 0x20201000 if DEBUG_BCM2835
|
||||
default 0x3f201000 if DEBUG_BCM2836
|
||||
default 0x3e000000 if DEBUG_BCM_KONA_UART
|
||||
default 0x3f201000 if DEBUG_BCM2836
|
||||
default 0x4000e400 if DEBUG_LL_UART_EFM32
|
||||
default 0x40028000 if DEBUG_AT91_SAMV7_USART1
|
||||
default 0x40081000 if DEBUG_LPC18XX_UART0
|
||||
|
|
@ -1682,6 +1691,7 @@ config DEBUG_UART_VIRT
|
|||
default 0xf1002000 if DEBUG_MT8127_UART0
|
||||
default 0xf1006000 if DEBUG_MT6589_UART0
|
||||
default 0xf1009000 if DEBUG_MT8135_UART3
|
||||
default 0xf1023000 if DEBUG_BCM_IPROC_UART3
|
||||
default 0xf11f1000 if DEBUG_VERSATILE
|
||||
default 0xf1600000 if DEBUG_INTEGRATOR
|
||||
default 0xf1c28000 if DEBUG_SUNXI_UART0
|
||||
|
|
@ -1797,7 +1807,7 @@ config DEBUG_UART_8250_WORD
|
|||
DEBUG_KEYSTONE_UART0 || DEBUG_KEYSTONE_UART1 || \
|
||||
DEBUG_ALPINE_UART0 || \
|
||||
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
|
||||
DEBUG_DAVINCI_DA8XX_UART2 || \
|
||||
DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_BCM_IPROC_UART3 || \
|
||||
DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2
|
||||
|
||||
config DEBUG_UART_8250_PALMCHIP
|
||||
|
|
|
|||
|
|
@ -219,7 +219,6 @@ machine-$(CONFIG_ARCH_TANGO) += tango
|
|||
machine-$(CONFIG_ARCH_TEGRA) += tegra
|
||||
machine-$(CONFIG_ARCH_U300) += u300
|
||||
machine-$(CONFIG_ARCH_U8500) += ux500
|
||||
machine-$(CONFIG_ARCH_UNIPHIER) += uniphier
|
||||
machine-$(CONFIG_ARCH_VERSATILE) += versatile
|
||||
machine-$(CONFIG_ARCH_VEXPRESS) += vexpress
|
||||
machine-$(CONFIG_ARCH_VT8500) += vt8500
|
||||
|
|
|
|||
|
|
@ -31,21 +31,25 @@
|
|||
|
||||
static unsigned long cpu_boot_addr;
|
||||
|
||||
static void __naked tf_generic_smc(u32 type, u32 arg1, u32 arg2)
|
||||
static void tf_generic_smc(u32 type, u32 arg1, u32 arg2)
|
||||
{
|
||||
register u32 r0 asm("r0") = type;
|
||||
register u32 r1 asm("r1") = arg1;
|
||||
register u32 r2 asm("r2") = arg2;
|
||||
|
||||
asm volatile(
|
||||
".arch_extension sec\n\t"
|
||||
"stmfd sp!, {r4 - r11, lr}\n\t"
|
||||
"stmfd sp!, {r4 - r11}\n\t"
|
||||
__asmeq("%0", "r0")
|
||||
__asmeq("%1", "r1")
|
||||
__asmeq("%2", "r2")
|
||||
"mov r3, #0\n\t"
|
||||
"mov r4, #0\n\t"
|
||||
"smc #0\n\t"
|
||||
"ldmfd sp!, {r4 - r11, pc}"
|
||||
"ldmfd sp!, {r4 - r11}\n\t"
|
||||
:
|
||||
: "r" (type), "r" (arg1), "r" (arg2)
|
||||
: "memory");
|
||||
: "r" (r0), "r" (r1), "r" (r2)
|
||||
: "memory", "r3", "r12", "lr");
|
||||
}
|
||||
|
||||
static int tf_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Renesas SCIF(A) debugging macro include header
|
||||
*
|
||||
|
|
@ -5,10 +6,6 @@
|
|||
*
|
||||
* Copyright (C) 2012-2013 Renesas Electronics Corporation
|
||||
* Copyright (C) 1994-1999 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#define SCIF_PHYS CONFIG_DEBUG_UART_PHYS
|
||||
|
|
|
|||
|
|
@ -40,15 +40,16 @@ extern void at91_pinctrl_gpio_resume(void);
|
|||
#endif
|
||||
|
||||
static const match_table_t pm_modes __initconst = {
|
||||
{ 0, "standby" },
|
||||
{ AT91_PM_SLOW_CLOCK, "ulp0" },
|
||||
{ AT91_PM_STANDBY, "standby" },
|
||||
{ AT91_PM_ULP0, "ulp0" },
|
||||
{ AT91_PM_ULP1, "ulp1" },
|
||||
{ AT91_PM_BACKUP, "backup" },
|
||||
{ -1, NULL },
|
||||
};
|
||||
|
||||
static struct at91_pm_data pm_data = {
|
||||
.standby_mode = 0,
|
||||
.suspend_mode = AT91_PM_SLOW_CLOCK,
|
||||
.standby_mode = AT91_PM_STANDBY,
|
||||
.suspend_mode = AT91_PM_ULP0,
|
||||
};
|
||||
|
||||
#define at91_ramc_read(id, field) \
|
||||
|
|
@ -79,6 +80,90 @@ static struct at91_pm_bu {
|
|||
phys_addr_t resume;
|
||||
} *pm_bu;
|
||||
|
||||
struct wakeup_source_info {
|
||||
unsigned int pmc_fsmr_bit;
|
||||
unsigned int shdwc_mr_bit;
|
||||
bool set_polarity;
|
||||
};
|
||||
|
||||
static const struct wakeup_source_info ws_info[] = {
|
||||
{ .pmc_fsmr_bit = AT91_PMC_FSTT(10), .set_polarity = true },
|
||||
{ .pmc_fsmr_bit = AT91_PMC_RTCAL, .shdwc_mr_bit = BIT(17) },
|
||||
{ .pmc_fsmr_bit = AT91_PMC_USBAL },
|
||||
{ .pmc_fsmr_bit = AT91_PMC_SDMMC_CD },
|
||||
};
|
||||
|
||||
static const struct of_device_id sama5d2_ws_ids[] = {
|
||||
{ .compatible = "atmel,sama5d2-gem", .data = &ws_info[0] },
|
||||
{ .compatible = "atmel,at91rm9200-rtc", .data = &ws_info[1] },
|
||||
{ .compatible = "atmel,sama5d3-udc", .data = &ws_info[2] },
|
||||
{ .compatible = "atmel,at91rm9200-ohci", .data = &ws_info[2] },
|
||||
{ .compatible = "usb-ohci", .data = &ws_info[2] },
|
||||
{ .compatible = "atmel,at91sam9g45-ehci", .data = &ws_info[2] },
|
||||
{ .compatible = "usb-ehci", .data = &ws_info[2] },
|
||||
{ .compatible = "atmel,sama5d2-sdhci", .data = &ws_info[3] },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static int at91_pm_config_ws(unsigned int pm_mode, bool set)
|
||||
{
|
||||
const struct wakeup_source_info *wsi;
|
||||
const struct of_device_id *match;
|
||||
struct platform_device *pdev;
|
||||
struct device_node *np;
|
||||
unsigned int mode = 0, polarity = 0, val = 0;
|
||||
|
||||
if (pm_mode != AT91_PM_ULP1)
|
||||
return 0;
|
||||
|
||||
if (!pm_data.pmc || !pm_data.shdwc)
|
||||
return -EPERM;
|
||||
|
||||
if (!set) {
|
||||
writel(mode, pm_data.pmc + AT91_PMC_FSMR);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* SHDWC.WUIR */
|
||||
val = readl(pm_data.shdwc + 0x0c);
|
||||
mode |= (val & 0x3ff);
|
||||
polarity |= ((val >> 16) & 0x3ff);
|
||||
|
||||
/* SHDWC.MR */
|
||||
val = readl(pm_data.shdwc + 0x04);
|
||||
|
||||
/* Loop through defined wakeup sources. */
|
||||
for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) {
|
||||
pdev = of_find_device_by_node(np);
|
||||
if (!pdev)
|
||||
continue;
|
||||
|
||||
if (device_may_wakeup(&pdev->dev)) {
|
||||
wsi = match->data;
|
||||
|
||||
/* Check if enabled on SHDWC. */
|
||||
if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))
|
||||
goto put_node;
|
||||
|
||||
mode |= wsi->pmc_fsmr_bit;
|
||||
if (wsi->set_polarity)
|
||||
polarity |= wsi->pmc_fsmr_bit;
|
||||
}
|
||||
|
||||
put_node:
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
if (mode) {
|
||||
writel(mode, pm_data.pmc + AT91_PMC_FSMR);
|
||||
writel(polarity, pm_data.pmc + AT91_PMC_FSPR);
|
||||
} else {
|
||||
pr_err("AT91: PM: no ULP1 wakeup sources found!");
|
||||
}
|
||||
|
||||
return mode ? 0 : -EPERM;
|
||||
}
|
||||
|
||||
/*
|
||||
* Called after processes are frozen, but before we shutdown devices.
|
||||
*/
|
||||
|
|
@ -97,7 +182,7 @@ static int at91_pm_begin(suspend_state_t state)
|
|||
pm_data.mode = -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return at91_pm_config_ws(pm_data.mode, true);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -145,7 +230,7 @@ static int at91_pm_verify_clocks(void)
|
|||
*/
|
||||
int at91_suspend_entering_slow_clock(void)
|
||||
{
|
||||
return (pm_data.mode >= AT91_PM_SLOW_CLOCK);
|
||||
return (pm_data.mode >= AT91_PM_ULP0);
|
||||
}
|
||||
EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
|
||||
|
||||
|
|
@ -186,7 +271,7 @@ static void at91_pm_suspend(suspend_state_t state)
|
|||
* event sources; and reduces DRAM power. But otherwise it's identical to
|
||||
* PM_SUSPEND_ON: cpu idle, and nothing fancy done with main or cpu clocks.
|
||||
*
|
||||
* AT91_PM_SLOW_CLOCK is like STANDBY plus slow clock mode, so drivers must
|
||||
* AT91_PM_ULP0 is like STANDBY plus slow clock mode, so drivers must
|
||||
* suspend more deeply, the master clock switches to the clk32k and turns off
|
||||
* the main oscillator
|
||||
*
|
||||
|
|
@ -204,7 +289,7 @@ static int at91_pm_enter(suspend_state_t state)
|
|||
/*
|
||||
* Ensure that clocks are in a valid state.
|
||||
*/
|
||||
if ((pm_data.mode >= AT91_PM_SLOW_CLOCK) &&
|
||||
if (pm_data.mode >= AT91_PM_ULP0 &&
|
||||
!at91_pm_verify_clocks())
|
||||
goto error;
|
||||
|
||||
|
|
@ -233,6 +318,7 @@ error:
|
|||
*/
|
||||
static void at91_pm_end(void)
|
||||
{
|
||||
at91_pm_config_ws(pm_data.mode, false);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -478,31 +564,28 @@ static void __init at91_pm_sram_init(void)
|
|||
&at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
|
||||
}
|
||||
|
||||
static void __init at91_pm_backup_init(void)
|
||||
static bool __init at91_is_pm_mode_active(int pm_mode)
|
||||
{
|
||||
return (pm_data.standby_mode == pm_mode ||
|
||||
pm_data.suspend_mode == pm_mode);
|
||||
}
|
||||
|
||||
static int __init at91_pm_backup_init(void)
|
||||
{
|
||||
struct gen_pool *sram_pool;
|
||||
struct device_node *np;
|
||||
struct platform_device *pdev = NULL;
|
||||
int ret = -ENODEV;
|
||||
|
||||
if ((pm_data.standby_mode != AT91_PM_BACKUP) &&
|
||||
(pm_data.suspend_mode != AT91_PM_BACKUP))
|
||||
return;
|
||||
if (!at91_is_pm_mode_active(AT91_PM_BACKUP))
|
||||
return 0;
|
||||
|
||||
pm_bu = NULL;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc");
|
||||
if (!np) {
|
||||
pr_warn("%s: failed to find shdwc!\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
pm_data.shdwc = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu");
|
||||
if (!np) {
|
||||
pr_warn("%s: failed to find sfrbu!\n", __func__);
|
||||
goto sfrbu_fail;
|
||||
return ret;
|
||||
}
|
||||
|
||||
pm_data.sfrbu = of_iomap(np, 0);
|
||||
|
|
@ -529,6 +612,7 @@ static void __init at91_pm_backup_init(void)
|
|||
pm_bu = (void *)gen_pool_alloc(sram_pool, sizeof(struct at91_pm_bu));
|
||||
if (!pm_bu) {
|
||||
pr_warn("%s: unable to alloc securam!\n", __func__);
|
||||
ret = -ENOMEM;
|
||||
goto securam_fail;
|
||||
}
|
||||
|
||||
|
|
@ -536,19 +620,60 @@ static void __init at91_pm_backup_init(void)
|
|||
pm_bu->canary = __pa_symbol(&canary);
|
||||
pm_bu->resume = __pa_symbol(cpu_resume);
|
||||
|
||||
return;
|
||||
return 0;
|
||||
|
||||
sfrbu_fail:
|
||||
iounmap(pm_data.shdwc);
|
||||
pm_data.shdwc = NULL;
|
||||
securam_fail:
|
||||
iounmap(pm_data.sfrbu);
|
||||
pm_data.sfrbu = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (pm_data.standby_mode == AT91_PM_BACKUP)
|
||||
pm_data.standby_mode = AT91_PM_SLOW_CLOCK;
|
||||
if (pm_data.suspend_mode == AT91_PM_BACKUP)
|
||||
pm_data.suspend_mode = AT91_PM_SLOW_CLOCK;
|
||||
static void __init at91_pm_use_default_mode(int pm_mode)
|
||||
{
|
||||
if (pm_mode != AT91_PM_ULP1 && pm_mode != AT91_PM_BACKUP)
|
||||
return;
|
||||
|
||||
if (pm_data.standby_mode == pm_mode)
|
||||
pm_data.standby_mode = AT91_PM_ULP0;
|
||||
if (pm_data.suspend_mode == pm_mode)
|
||||
pm_data.suspend_mode = AT91_PM_ULP0;
|
||||
}
|
||||
|
||||
static void __init at91_pm_modes_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
int ret;
|
||||
|
||||
if (!at91_is_pm_mode_active(AT91_PM_BACKUP) &&
|
||||
!at91_is_pm_mode_active(AT91_PM_ULP1))
|
||||
return;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc");
|
||||
if (!np) {
|
||||
pr_warn("%s: failed to find shdwc!\n", __func__);
|
||||
goto ulp1_default;
|
||||
}
|
||||
|
||||
pm_data.shdwc = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
|
||||
ret = at91_pm_backup_init();
|
||||
if (ret) {
|
||||
if (!at91_is_pm_mode_active(AT91_PM_ULP1))
|
||||
goto unmap;
|
||||
else
|
||||
goto backup_default;
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
unmap:
|
||||
iounmap(pm_data.shdwc);
|
||||
pm_data.shdwc = NULL;
|
||||
ulp1_default:
|
||||
at91_pm_use_default_mode(AT91_PM_ULP1);
|
||||
backup_default:
|
||||
at91_pm_use_default_mode(AT91_PM_BACKUP);
|
||||
}
|
||||
|
||||
struct pmc_info {
|
||||
|
|
@ -644,7 +769,7 @@ void __init sama5d2_pm_init(void)
|
|||
if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
|
||||
return;
|
||||
|
||||
at91_pm_backup_init();
|
||||
at91_pm_modes_init();
|
||||
sama5_pm_init();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,8 +21,10 @@
|
|||
#define AT91_MEMCTRL_SDRAMC 1
|
||||
#define AT91_MEMCTRL_DDRSDR 2
|
||||
|
||||
#define AT91_PM_SLOW_CLOCK 0x01
|
||||
#define AT91_PM_BACKUP 0x02
|
||||
#define AT91_PM_STANDBY 0x00
|
||||
#define AT91_PM_ULP0 0x01
|
||||
#define AT91_PM_ULP1 0x02
|
||||
#define AT91_PM_BACKUP 0x03
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
struct at91_pm_data {
|
||||
|
|
|
|||
|
|
@ -41,6 +41,15 @@ tmp2 .req r5
|
|||
beq 1b
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Wait for main oscillator selection is done
|
||||
*/
|
||||
.macro wait_moscsels
|
||||
1: ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
tst tmp1, #AT91_PMC_MOSCSELS
|
||||
beq 1b
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Wait until PLLA has locked.
|
||||
*/
|
||||
|
|
@ -112,19 +121,20 @@ ENTRY(at91_pm_suspend_in_sram)
|
|||
bl at91_sramc_self_refresh
|
||||
|
||||
ldr r0, .pm_mode
|
||||
cmp r0, #AT91_PM_SLOW_CLOCK
|
||||
beq slow_clock
|
||||
cmp r0, #AT91_PM_STANDBY
|
||||
beq standby
|
||||
cmp r0, #AT91_PM_BACKUP
|
||||
beq backup_mode
|
||||
|
||||
bl at91_ulp_mode
|
||||
b exit_suspend
|
||||
|
||||
standby:
|
||||
/* Wait for interrupt */
|
||||
ldr pmc, .pmc_base
|
||||
at91_cpu_idle
|
||||
b exit_suspend
|
||||
|
||||
slow_clock:
|
||||
bl at91_slowck_mode
|
||||
b exit_suspend
|
||||
backup_mode:
|
||||
bl at91_backup_mode
|
||||
b exit_suspend
|
||||
|
|
@ -151,7 +161,102 @@ ENTRY(at91_backup_mode)
|
|||
str tmp1, [r0, #0]
|
||||
ENDPROC(at91_backup_mode)
|
||||
|
||||
ENTRY(at91_slowck_mode)
|
||||
.macro at91_pm_ulp0_mode
|
||||
ldr pmc, .pmc_base
|
||||
|
||||
/* Turn off the crystal oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
bic tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
/* Wait for interrupt */
|
||||
at91_cpu_idle
|
||||
|
||||
/* Turn on the crystal oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
orr tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
wait_moscrdy
|
||||
.endm
|
||||
|
||||
/**
|
||||
* Note: This procedure only applies on the platform which uses
|
||||
* the external crystal oscillator as a main clock source.
|
||||
*/
|
||||
.macro at91_pm_ulp1_mode
|
||||
ldr pmc, .pmc_base
|
||||
|
||||
/* Switch the main clock source to 12-MHz RC oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
bic tmp1, tmp1, #AT91_PMC_MOSCSEL
|
||||
bic tmp1, tmp1, #AT91_PMC_KEY_MASK
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
wait_moscsels
|
||||
|
||||
/* Disable the crystal oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
bic tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
bic tmp1, tmp1, #AT91_PMC_KEY_MASK
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
/* Switch the master clock source to main clock */
|
||||
ldr tmp1, [pmc, #AT91_PMC_MCKR]
|
||||
bic tmp1, tmp1, #AT91_PMC_CSS
|
||||
orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
|
||||
str tmp1, [pmc, #AT91_PMC_MCKR]
|
||||
|
||||
wait_mckrdy
|
||||
|
||||
/* Enter the ULP1 mode by set WAITMODE bit in CKGR_MOR */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
orr tmp1, tmp1, #AT91_PMC_WAITMODE
|
||||
bic tmp1, tmp1, #AT91_PMC_KEY_MASK
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
wait_mckrdy
|
||||
|
||||
/* Enable the crystal oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
orr tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
bic tmp1, tmp1, #AT91_PMC_KEY_MASK
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
wait_moscrdy
|
||||
|
||||
/* Switch the master clock source to slow clock */
|
||||
ldr tmp1, [pmc, #AT91_PMC_MCKR]
|
||||
bic tmp1, tmp1, #AT91_PMC_CSS
|
||||
str tmp1, [pmc, #AT91_PMC_MCKR]
|
||||
|
||||
wait_mckrdy
|
||||
|
||||
/* Switch main clock source to crystal oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
orr tmp1, tmp1, #AT91_PMC_MOSCSEL
|
||||
bic tmp1, tmp1, #AT91_PMC_KEY_MASK
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
wait_moscsels
|
||||
|
||||
/* Switch the master clock source to main clock */
|
||||
ldr tmp1, [pmc, #AT91_PMC_MCKR]
|
||||
bic tmp1, tmp1, #AT91_PMC_CSS
|
||||
orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
|
||||
str tmp1, [pmc, #AT91_PMC_MCKR]
|
||||
|
||||
wait_mckrdy
|
||||
.endm
|
||||
|
||||
ENTRY(at91_ulp_mode)
|
||||
ldr pmc, .pmc_base
|
||||
|
||||
/* Save Master clock setting */
|
||||
|
|
@ -174,22 +279,19 @@ ENTRY(at91_slowck_mode)
|
|||
orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
|
||||
str tmp1, [pmc, #AT91_CKGR_PLLAR]
|
||||
|
||||
/* Turn off the main oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
bic tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
ldr r0, .pm_mode
|
||||
cmp r0, #AT91_PM_ULP1
|
||||
beq ulp1_mode
|
||||
|
||||
/* Wait for interrupt */
|
||||
at91_cpu_idle
|
||||
at91_pm_ulp0_mode
|
||||
b ulp_exit
|
||||
|
||||
/* Turn on the main oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
orr tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
ulp1_mode:
|
||||
at91_pm_ulp1_mode
|
||||
b ulp_exit
|
||||
|
||||
wait_moscrdy
|
||||
ulp_exit:
|
||||
ldr pmc, .pmc_base
|
||||
|
||||
/* Restore PLLA setting */
|
||||
ldr tmp1, .saved_pllar
|
||||
|
|
@ -212,7 +314,7 @@ ENTRY(at91_slowck_mode)
|
|||
wait_mckrdy
|
||||
|
||||
mov pc, lr
|
||||
ENDPROC(at91_slowck_mode)
|
||||
ENDPROC(at91_ulp_mode)
|
||||
|
||||
/*
|
||||
* void at91_sramc_self_refresh(unsigned int is_active)
|
||||
|
|
|
|||
|
|
@ -59,6 +59,7 @@ config MACH_DA8XX_DT
|
|||
default y
|
||||
depends on ARCH_DAVINCI_DA850
|
||||
select PINCTRL
|
||||
select TIMER_OF
|
||||
help
|
||||
Say y here to include support for TI DaVinci DA850 based using
|
||||
Flattened Device Tree. More information at Documentation/devicetree
|
||||
|
|
@ -231,18 +232,6 @@ config DAVINCI_MUX_WARNINGS
|
|||
to change the pin multiplexing setup. When there are no warnings
|
||||
printed, it's safe to deselect DAVINCI_MUX for your product.
|
||||
|
||||
config DAVINCI_RESET_CLOCKS
|
||||
bool "Reset unused clocks during boot"
|
||||
depends on ARCH_DAVINCI
|
||||
help
|
||||
Say Y if you want to reset unused clocks during boot.
|
||||
This option saves power, but assumes all drivers are
|
||||
using the clock framework. Broken drivers that do not
|
||||
yet use clock framework may not work with this option.
|
||||
If you are booting from another operating system, you
|
||||
probably do not want this option enabled until your
|
||||
device drivers work properly.
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -5,8 +5,8 @@
|
|||
#
|
||||
|
||||
# Common objects
|
||||
obj-y := time.o clock.o serial.o psc.o \
|
||||
usb.o common.o sram.o aemif.o
|
||||
obj-y := time.o serial.o usb.o \
|
||||
common.o sram.o
|
||||
|
||||
obj-$(CONFIG_DAVINCI_MUX) += mux.o
|
||||
|
||||
|
|
|
|||
|
|
@ -1,218 +0,0 @@
|
|||
/*
|
||||
* AEMIF support for DaVinci SoCs
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/time.h>
|
||||
|
||||
#include <linux/platform_data/mtd-davinci-aemif.h>
|
||||
#include <linux/platform_data/mtd-davinci.h>
|
||||
|
||||
/* Timing value configuration */
|
||||
|
||||
#define TA(x) ((x) << 2)
|
||||
#define RHOLD(x) ((x) << 4)
|
||||
#define RSTROBE(x) ((x) << 7)
|
||||
#define RSETUP(x) ((x) << 13)
|
||||
#define WHOLD(x) ((x) << 17)
|
||||
#define WSTROBE(x) ((x) << 20)
|
||||
#define WSETUP(x) ((x) << 26)
|
||||
|
||||
#define TA_MAX 0x3
|
||||
#define RHOLD_MAX 0x7
|
||||
#define RSTROBE_MAX 0x3f
|
||||
#define RSETUP_MAX 0xf
|
||||
#define WHOLD_MAX 0x7
|
||||
#define WSTROBE_MAX 0x3f
|
||||
#define WSETUP_MAX 0xf
|
||||
|
||||
#define TIMING_MASK (TA(TA_MAX) | \
|
||||
RHOLD(RHOLD_MAX) | \
|
||||
RSTROBE(RSTROBE_MAX) | \
|
||||
RSETUP(RSETUP_MAX) | \
|
||||
WHOLD(WHOLD_MAX) | \
|
||||
WSTROBE(WSTROBE_MAX) | \
|
||||
WSETUP(WSETUP_MAX))
|
||||
|
||||
static inline unsigned int davinci_aemif_readl(void __iomem *base, int offset)
|
||||
{
|
||||
return readl_relaxed(base + offset);
|
||||
}
|
||||
|
||||
static inline void davinci_aemif_writel(void __iomem *base,
|
||||
int offset, unsigned long value)
|
||||
{
|
||||
writel_relaxed(value, base + offset);
|
||||
}
|
||||
|
||||
/*
|
||||
* aemif_calc_rate - calculate timing data.
|
||||
* @wanted: The cycle time needed in nanoseconds.
|
||||
* @clk: The input clock rate in kHz.
|
||||
* @max: The maximum divider value that can be programmed.
|
||||
*
|
||||
* On success, returns the calculated timing value minus 1 for easy
|
||||
* programming into AEMIF timing registers, else negative errno.
|
||||
*/
|
||||
static int aemif_calc_rate(int wanted, unsigned long clk, int max)
|
||||
{
|
||||
int result;
|
||||
|
||||
result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
|
||||
|
||||
pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted);
|
||||
|
||||
/* It is generally OK to have a more relaxed timing than requested... */
|
||||
if (result < 0)
|
||||
result = 0;
|
||||
|
||||
/* ... But configuring tighter timings is not an option. */
|
||||
else if (result > max)
|
||||
result = -EINVAL;
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* davinci_aemif_setup_timing - setup timing values for a given AEMIF interface
|
||||
* @t: timing values to be progammed
|
||||
* @base: The virtual base address of the AEMIF interface
|
||||
* @cs: chip-select to program the timing values for
|
||||
* @clkrate: the AEMIF clkrate
|
||||
*
|
||||
* This function programs the given timing values (in real clock) into the
|
||||
* AEMIF registers taking the AEMIF clock into account.
|
||||
*
|
||||
* This function does not use any locking while programming the AEMIF
|
||||
* because it is expected that there is only one user of a given
|
||||
* chip-select.
|
||||
*
|
||||
* Returns 0 on success, else negative errno.
|
||||
*/
|
||||
static int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
|
||||
void __iomem *base, unsigned cs,
|
||||
unsigned long clkrate)
|
||||
{
|
||||
unsigned set, val;
|
||||
int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
|
||||
unsigned offset = A1CR_OFFSET + cs * 4;
|
||||
|
||||
if (!t)
|
||||
return 0; /* Nothing to do */
|
||||
|
||||
clkrate /= 1000; /* turn clock into kHz for ease of use */
|
||||
|
||||
ta = aemif_calc_rate(t->ta, clkrate, TA_MAX);
|
||||
rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX);
|
||||
rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX);
|
||||
rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX);
|
||||
whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX);
|
||||
wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX);
|
||||
wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX);
|
||||
|
||||
if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
|
||||
whold < 0 || wstrobe < 0 || wsetup < 0) {
|
||||
pr_err("%s: cannot get suitable timings\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
|
||||
WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
|
||||
|
||||
val = __raw_readl(base + offset);
|
||||
val &= ~TIMING_MASK;
|
||||
val |= set;
|
||||
__raw_writel(val, base + offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* davinci_aemif_setup - setup AEMIF interface by davinci_nand_pdata
|
||||
* @pdev - link to platform device to setup settings for
|
||||
*
|
||||
* This function does not use any locking while programming the AEMIF
|
||||
* because it is expected that there is only one user of a given
|
||||
* chip-select.
|
||||
*
|
||||
* Returns 0 on success, else negative errno.
|
||||
*/
|
||||
int davinci_aemif_setup(struct platform_device *pdev)
|
||||
{
|
||||
struct davinci_nand_pdata *pdata = dev_get_platdata(&pdev->dev);
|
||||
uint32_t val;
|
||||
unsigned long clkrate;
|
||||
struct resource *res;
|
||||
void __iomem *base;
|
||||
struct clk *clk;
|
||||
int ret = 0;
|
||||
|
||||
clk = clk_get(&pdev->dev, "aemif");
|
||||
if (IS_ERR(clk)) {
|
||||
ret = PTR_ERR(clk);
|
||||
dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(clk);
|
||||
if (ret < 0) {
|
||||
dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
|
||||
ret);
|
||||
goto err_put;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
||||
if (!res) {
|
||||
dev_err(&pdev->dev, "cannot get IORESOURCE_MEM\n");
|
||||
ret = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
base = ioremap(res->start, resource_size(res));
|
||||
if (!base) {
|
||||
dev_err(&pdev->dev, "ioremap failed for resource %pR\n", res);
|
||||
ret = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Setup Async configuration register in case we did not boot
|
||||
* from NAND and so bootloader did not bother to set it up.
|
||||
*/
|
||||
val = davinci_aemif_readl(base, A1CR_OFFSET + pdata->core_chipsel * 4);
|
||||
/*
|
||||
* Extended Wait is not valid and Select Strobe mode is not
|
||||
* used
|
||||
*/
|
||||
val &= ~(ACR_ASIZE_MASK | ACR_EW_MASK | ACR_SS_MASK);
|
||||
if (pdata->options & NAND_BUSWIDTH_16)
|
||||
val |= 0x1;
|
||||
|
||||
davinci_aemif_writel(base, A1CR_OFFSET + pdata->core_chipsel * 4, val);
|
||||
|
||||
clkrate = clk_get_rate(clk);
|
||||
|
||||
if (pdata->timing)
|
||||
ret = davinci_aemif_setup_timing(pdata->timing, base,
|
||||
pdata->core_chipsel, clkrate);
|
||||
|
||||
if (ret < 0)
|
||||
dev_dbg(&pdev->dev, "NAND timing values setup fail\n");
|
||||
|
||||
iounmap(base);
|
||||
err:
|
||||
clk_disable_unprepare(clk);
|
||||
err_put:
|
||||
clk_put(clk);
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -28,6 +28,7 @@
|
|||
#include <linux/platform_data/mtd-davinci-aemif.h>
|
||||
#include <linux/platform_data/spi-davinci.h>
|
||||
#include <linux/platform_data/usb-davinci.h>
|
||||
#include <linux/platform_data/ti-aemif.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
|
@ -110,15 +111,9 @@ static __init void da830_evm_usb_init(void)
|
|||
{
|
||||
int ret;
|
||||
|
||||
/* USB_REFCLKIN is not used. */
|
||||
ret = da8xx_register_usb20_phy_clk(false);
|
||||
ret = da8xx_register_usb_phy_clocks();
|
||||
if (ret)
|
||||
pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
|
||||
__func__, ret);
|
||||
|
||||
ret = da8xx_register_usb11_phy_clk(false);
|
||||
if (ret)
|
||||
pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
|
||||
pr_warn("%s: USB PHY CLK registration failed: %d\n",
|
||||
__func__, ret);
|
||||
|
||||
ret = da8xx_register_usb_phy();
|
||||
|
|
@ -339,14 +334,48 @@ static struct resource da830_evm_nand_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device da830_evm_nand_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &da830_evm_nand_pdata,
|
||||
static struct platform_device da830_evm_aemif_devices[] = {
|
||||
{
|
||||
.name = "davinci_nand",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &da830_evm_nand_pdata,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(da830_evm_nand_resources),
|
||||
.resource = da830_evm_nand_resources,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(da830_evm_nand_resources),
|
||||
.resource = da830_evm_nand_resources,
|
||||
};
|
||||
|
||||
static struct resource da830_evm_aemif_resource[] = {
|
||||
{
|
||||
.start = DA8XX_AEMIF_CTL_BASE,
|
||||
.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_abus_data da830_evm_aemif_abus_data[] = {
|
||||
{
|
||||
.cs = 3,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_platform_data da830_evm_aemif_pdata = {
|
||||
.abus_data = da830_evm_aemif_abus_data,
|
||||
.num_abus_data = ARRAY_SIZE(da830_evm_aemif_abus_data),
|
||||
.sub_devices = da830_evm_aemif_devices,
|
||||
.num_sub_devices = ARRAY_SIZE(da830_evm_aemif_devices),
|
||||
.cs_offset = 2,
|
||||
};
|
||||
|
||||
static struct platform_device da830_evm_aemif_device = {
|
||||
.name = "ti-aemif",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &da830_evm_aemif_pdata,
|
||||
},
|
||||
.resource = da830_evm_aemif_resource,
|
||||
.num_resources = ARRAY_SIZE(da830_evm_aemif_resource),
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -377,12 +406,9 @@ static inline void da830_evm_init_nand(int mux_mode)
|
|||
if (ret)
|
||||
pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
|
||||
|
||||
ret = platform_device_register(&da830_evm_nand_device);
|
||||
ret = platform_device_register(&da830_evm_aemif_device);
|
||||
if (ret)
|
||||
pr_warn("%s: NAND device not registered\n", __func__);
|
||||
|
||||
if (davinci_aemif_setup(&da830_evm_nand_device))
|
||||
pr_warn("%s: Cannot configure AEMIF\n", __func__);
|
||||
pr_warn("%s: AEMIF device not registered\n", __func__);
|
||||
|
||||
gpio_direction_output(mux_mode, 1);
|
||||
}
|
||||
|
|
@ -557,6 +583,8 @@ static __init void da830_evm_init(void)
|
|||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
int ret;
|
||||
|
||||
da830_register_clocks();
|
||||
|
||||
ret = da830_register_gpio();
|
||||
if (ret)
|
||||
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@
|
|||
#include <linux/platform_data/gpio-davinci.h>
|
||||
#include <linux/platform_data/mtd-davinci.h>
|
||||
#include <linux/platform_data/mtd-davinci-aemif.h>
|
||||
#include <linux/platform_data/ti-aemif.h>
|
||||
#include <linux/platform_data/spi-davinci.h>
|
||||
#include <linux/platform_data/uio_pruss.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
|
@ -185,16 +186,6 @@ static struct resource da850_evm_norflash_resource[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device da850_evm_norflash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &da850_evm_norflash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = da850_evm_norflash_resource,
|
||||
};
|
||||
|
||||
/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
|
||||
* (128K blocks). It may be used instead of the (default) SPI flash
|
||||
* to boot, using TI's tools to install the secondary boot loader
|
||||
|
|
@ -266,37 +257,58 @@ static struct resource da850_evm_nandflash_resource[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device da850_evm_nandflash_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &da850_evm_nandflash_data,
|
||||
static struct resource da850_evm_aemif_resource[] = {
|
||||
{
|
||||
.start = DA8XX_AEMIF_CTL_BASE,
|
||||
.end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct aemif_abus_data da850_evm_aemif_abus_data[] = {
|
||||
{
|
||||
.cs = 3,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device da850_evm_aemif_devices[] = {
|
||||
{
|
||||
.name = "davinci_nand",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &da850_evm_nandflash_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
|
||||
.resource = da850_evm_nandflash_resource,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
|
||||
.resource = da850_evm_nandflash_resource,
|
||||
{
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &da850_evm_norflash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = da850_evm_norflash_resource,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device *da850_evm_devices[] = {
|
||||
&da850_evm_nandflash_device,
|
||||
&da850_evm_norflash_device,
|
||||
static struct aemif_platform_data da850_evm_aemif_pdata = {
|
||||
.cs_offset = 2,
|
||||
.abus_data = da850_evm_aemif_abus_data,
|
||||
.num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data),
|
||||
.sub_devices = da850_evm_aemif_devices,
|
||||
.num_sub_devices = ARRAY_SIZE(da850_evm_aemif_devices),
|
||||
};
|
||||
|
||||
#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
|
||||
#define DA8XX_AEMIF_ASIZE_16BIT 0x1
|
||||
|
||||
static void __init da850_evm_init_nor(void)
|
||||
{
|
||||
void __iomem *aemif_addr;
|
||||
|
||||
aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
|
||||
|
||||
/* Configure data bus width of CS2 to 16 bit */
|
||||
writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
|
||||
DA8XX_AEMIF_ASIZE_16BIT,
|
||||
aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
|
||||
|
||||
iounmap(aemif_addr);
|
||||
}
|
||||
static struct platform_device da850_evm_aemif_device = {
|
||||
.name = "ti-aemif",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &da850_evm_aemif_pdata,
|
||||
},
|
||||
.resource = da850_evm_aemif_resource,
|
||||
.num_resources = ARRAY_SIZE(da850_evm_aemif_resource),
|
||||
};
|
||||
|
||||
static const short da850_evm_nand_pins[] = {
|
||||
DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
|
||||
|
|
@ -339,13 +351,10 @@ static inline void da850_evm_setup_nor_nand(void)
|
|||
pr_warn("%s: NOR mux setup failed: %d\n",
|
||||
__func__, ret);
|
||||
|
||||
da850_evm_init_nor();
|
||||
|
||||
platform_add_devices(da850_evm_devices,
|
||||
ARRAY_SIZE(da850_evm_devices));
|
||||
|
||||
if (davinci_aemif_setup(&da850_evm_nandflash_device))
|
||||
pr_warn("%s: Cannot configure AEMIF.\n", __func__);
|
||||
ret = platform_device_register(&da850_evm_aemif_device);
|
||||
if (ret)
|
||||
pr_warn("%s: registering aemif failed: %d\n",
|
||||
__func__, ret);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1340,6 +1349,8 @@ static __init void da850_evm_init(void)
|
|||
{
|
||||
int ret;
|
||||
|
||||
da850_register_clocks();
|
||||
|
||||
ret = da850_register_gpio();
|
||||
if (ret)
|
||||
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
|
||||
|
|
|
|||
|
|
@ -394,6 +394,8 @@ static __init void dm355_evm_init(void)
|
|||
struct clk *aemif;
|
||||
int ret;
|
||||
|
||||
dm355_register_clocks();
|
||||
|
||||
ret = dm355_gpio_register();
|
||||
if (ret)
|
||||
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
|
||||
|
|
|
|||
|
|
@ -234,6 +234,8 @@ static __init void dm355_leopard_init(void)
|
|||
struct clk *aemif;
|
||||
int ret;
|
||||
|
||||
dm355_register_clocks();
|
||||
|
||||
ret = dm355_gpio_register();
|
||||
if (ret)
|
||||
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/eeprom.h>
|
||||
#include <linux/v4l2-dv-timings.h>
|
||||
#include <linux/platform_data/ti-aemif.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
@ -159,16 +160,49 @@ static struct resource davinci_nand_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device davinci_nand_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(davinci_nand_resources),
|
||||
.resource = davinci_nand_resources,
|
||||
.dev = {
|
||||
.platform_data = &davinci_nand_data,
|
||||
static struct platform_device davinci_aemif_devices[] = {
|
||||
{
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(davinci_nand_resources),
|
||||
.resource = davinci_nand_resources,
|
||||
.dev = {
|
||||
.platform_data = &davinci_nand_data,
|
||||
},
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource davinci_aemif_resources[] = {
|
||||
{
|
||||
.start = DM365_ASYNC_EMIF_CONTROL_BASE,
|
||||
.end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_abus_data da850_evm_aemif_abus_data[] = {
|
||||
{
|
||||
.cs = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_platform_data davinci_aemif_pdata = {
|
||||
.abus_data = da850_evm_aemif_abus_data,
|
||||
.num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data),
|
||||
.sub_devices = davinci_aemif_devices,
|
||||
.num_sub_devices = ARRAY_SIZE(davinci_aemif_devices),
|
||||
};
|
||||
|
||||
static struct platform_device davinci_aemif_device = {
|
||||
.name = "ti-aemif",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &davinci_aemif_pdata,
|
||||
},
|
||||
.resource = davinci_aemif_resources,
|
||||
.num_resources = ARRAY_SIZE(davinci_aemif_resources),
|
||||
};
|
||||
|
||||
static struct at24_platform_data eeprom_info = {
|
||||
.byte_len = (256*1024) / 8,
|
||||
.page_size = 64,
|
||||
|
|
@ -537,10 +571,6 @@ static void __init evm_init_i2c(void)
|
|||
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
|
||||
}
|
||||
|
||||
static struct platform_device *dm365_evm_nand_devices[] __initdata = {
|
||||
&davinci_nand_device,
|
||||
};
|
||||
|
||||
static inline int have_leds(void)
|
||||
{
|
||||
#ifdef CONFIG_LEDS_CLASS
|
||||
|
|
@ -628,6 +658,7 @@ static void __init evm_init_cpld(void)
|
|||
u8 mux, resets;
|
||||
const char *label;
|
||||
struct clk *aemif_clk;
|
||||
int rc;
|
||||
|
||||
/* Make sure we can configure the CPLD through CS1. Then
|
||||
* leave it on for later access to MMC and LED registers.
|
||||
|
|
@ -660,8 +691,10 @@ fail:
|
|||
/* external keypad mux */
|
||||
mux |= BIT(7);
|
||||
|
||||
platform_add_devices(dm365_evm_nand_devices,
|
||||
ARRAY_SIZE(dm365_evm_nand_devices));
|
||||
rc = platform_device_register(&davinci_aemif_device);
|
||||
if (rc)
|
||||
pr_warn("%s(): error registering the aemif device: %d\n",
|
||||
__func__, rc);
|
||||
} else {
|
||||
/* no OneNAND support yet */
|
||||
}
|
||||
|
|
@ -742,6 +775,8 @@ static __init void dm365_evm_init(void)
|
|||
{
|
||||
int ret;
|
||||
|
||||
dm365_register_clocks();
|
||||
|
||||
ret = dm365_gpio_register();
|
||||
if (ret)
|
||||
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
|
||||
|
|
|
|||
|
|
@ -42,6 +42,7 @@
|
|||
#include <linux/platform_data/mmc-davinci.h>
|
||||
#include <linux/platform_data/usb-davinci.h>
|
||||
#include <linux/platform_data/mtd-davinci-aemif.h>
|
||||
#include <linux/platform_data/ti-aemif.h>
|
||||
|
||||
#include "davinci.h"
|
||||
|
||||
|
|
@ -174,14 +175,47 @@ static struct resource davinci_evm_nandflash_resource[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device davinci_evm_nandflash_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &davinci_evm_nandflash_data,
|
||||
static struct resource davinci_evm_aemif_resource[] = {
|
||||
{
|
||||
.start = DM644X_ASYNC_EMIF_CONTROL_BASE,
|
||||
.end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
|
||||
.resource = davinci_evm_nandflash_resource,
|
||||
};
|
||||
|
||||
static struct aemif_abus_data davinci_evm_aemif_abus_data[] = {
|
||||
{
|
||||
.cs = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device davinci_evm_nandflash_devices[] = {
|
||||
{
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &davinci_evm_nandflash_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
|
||||
.resource = davinci_evm_nandflash_resource,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_platform_data davinci_evm_aemif_pdata = {
|
||||
.abus_data = davinci_evm_aemif_abus_data,
|
||||
.num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data),
|
||||
.sub_devices = davinci_evm_nandflash_devices,
|
||||
.num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices),
|
||||
};
|
||||
|
||||
static struct platform_device davinci_evm_aemif_device = {
|
||||
.name = "ti-aemif",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &davinci_evm_aemif_pdata,
|
||||
},
|
||||
.resource = davinci_evm_aemif_resource,
|
||||
.num_resources = ARRAY_SIZE(davinci_evm_aemif_resource),
|
||||
};
|
||||
|
||||
static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
|
||||
|
|
@ -773,6 +807,8 @@ static __init void davinci_evm_init(void)
|
|||
struct clk *aemif_clk;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
|
||||
dm644x_register_clocks();
|
||||
|
||||
dm644x_init_devices();
|
||||
|
||||
ret = dm644x_gpio_register();
|
||||
|
|
@ -793,12 +829,7 @@ static __init void davinci_evm_init(void)
|
|||
|
||||
/* only one device will be jumpered and detected */
|
||||
if (HAS_NAND) {
|
||||
platform_device_register(&davinci_evm_nandflash_device);
|
||||
|
||||
if (davinci_aemif_setup(&davinci_evm_nandflash_device))
|
||||
pr_warn("%s: Cannot configure AEMIF\n",
|
||||
__func__);
|
||||
|
||||
platform_device_register(&davinci_evm_aemif_device);
|
||||
#ifdef CONFIG_I2C
|
||||
evm_leds[7].default_trigger = "nand-disk";
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/platform_data/at24.h>
|
||||
#include <linux/platform_data/pcf857x.h>
|
||||
#include <linux/platform_data/ti-aemif.h>
|
||||
|
||||
#include <media/i2c/tvp514x.h>
|
||||
#include <media/i2c/adv7343.h>
|
||||
|
|
@ -106,18 +107,49 @@ static struct resource davinci_nand_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device davinci_nand_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
|
||||
.num_resources = ARRAY_SIZE(davinci_nand_resources),
|
||||
.resource = davinci_nand_resources,
|
||||
|
||||
.dev = {
|
||||
.platform_data = &davinci_nand_data,
|
||||
static struct platform_device davinci_aemif_devices[] = {
|
||||
{
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(davinci_nand_resources),
|
||||
.resource = davinci_nand_resources,
|
||||
.dev = {
|
||||
.platform_data = &davinci_nand_data,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource davinci_aemif_resources[] = {
|
||||
{
|
||||
.start = DM646X_ASYNC_EMIF_CONTROL_BASE,
|
||||
.end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_abus_data davinci_aemif_abus_data[] = {
|
||||
{
|
||||
.cs = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_platform_data davinci_aemif_pdata = {
|
||||
.abus_data = davinci_aemif_abus_data,
|
||||
.num_abus_data = ARRAY_SIZE(davinci_aemif_abus_data),
|
||||
.sub_devices = davinci_aemif_devices,
|
||||
.num_sub_devices = ARRAY_SIZE(davinci_aemif_devices),
|
||||
};
|
||||
|
||||
static struct platform_device davinci_aemif_device = {
|
||||
.name = "ti-aemif",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &davinci_aemif_pdata,
|
||||
},
|
||||
.resource = davinci_aemif_resources,
|
||||
.num_resources = ARRAY_SIZE(davinci_aemif_resources),
|
||||
};
|
||||
|
||||
#define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
|
||||
IS_ENABLED(CONFIG_PATA_BK3710))
|
||||
|
||||
|
|
@ -776,6 +808,8 @@ static __init void evm_init(void)
|
|||
int ret;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
|
||||
dm646x_register_clocks();
|
||||
|
||||
ret = dm646x_gpio_register();
|
||||
if (ret)
|
||||
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
|
||||
|
|
@ -791,10 +825,8 @@ static __init void evm_init(void)
|
|||
if (machine_is_davinci_dm6467tevm())
|
||||
davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
|
||||
|
||||
platform_device_register(&davinci_nand_device);
|
||||
|
||||
if (davinci_aemif_setup(&davinci_nand_device))
|
||||
pr_warn("%s: Cannot configure AEMIF.\n", __func__);
|
||||
if (platform_device_register(&davinci_aemif_device))
|
||||
pr_warn("%s: Cannot register AEMIF device.\n", __func__);
|
||||
|
||||
dm646x_init_edma(dm646x_edma_rsv);
|
||||
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
#include <mach/da8xx.h>
|
||||
#include <linux/platform_data/mtd-davinci.h>
|
||||
#include <linux/platform_data/mtd-davinci-aemif.h>
|
||||
#include <linux/platform_data/ti-aemif.h>
|
||||
#include <mach/mux.h>
|
||||
#include <linux/platform_data/spi-davinci.h>
|
||||
|
||||
|
|
@ -422,27 +423,53 @@ static struct resource mityomapl138_nandflash_resource[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device mityomapl138_nandflash_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &mityomapl138_nandflash_data,
|
||||
static struct platform_device mityomapl138_aemif_devices[] = {
|
||||
{
|
||||
.name = "davinci_nand",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &mityomapl138_nandflash_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource),
|
||||
.resource = mityomapl138_nandflash_resource,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource),
|
||||
.resource = mityomapl138_nandflash_resource,
|
||||
};
|
||||
|
||||
static struct platform_device *mityomapl138_devices[] __initdata = {
|
||||
&mityomapl138_nandflash_device,
|
||||
static struct resource mityomapl138_aemif_resources[] = {
|
||||
{
|
||||
.start = DA8XX_AEMIF_CTL_BASE,
|
||||
.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_abus_data mityomapl138_aemif_abus_data[] = {
|
||||
{
|
||||
.cs = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct aemif_platform_data mityomapl138_aemif_pdata = {
|
||||
.abus_data = mityomapl138_aemif_abus_data,
|
||||
.num_abus_data = ARRAY_SIZE(mityomapl138_aemif_abus_data),
|
||||
.sub_devices = mityomapl138_aemif_devices,
|
||||
.num_sub_devices = ARRAY_SIZE(mityomapl138_aemif_devices),
|
||||
};
|
||||
|
||||
static struct platform_device mityomapl138_aemif_device = {
|
||||
.name = "ti-aemif",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &mityomapl138_aemif_pdata,
|
||||
},
|
||||
.resource = mityomapl138_aemif_resources,
|
||||
.num_resources = ARRAY_SIZE(mityomapl138_aemif_resources),
|
||||
};
|
||||
|
||||
static void __init mityomapl138_setup_nand(void)
|
||||
{
|
||||
platform_add_devices(mityomapl138_devices,
|
||||
ARRAY_SIZE(mityomapl138_devices));
|
||||
|
||||
if (davinci_aemif_setup(&mityomapl138_nandflash_device))
|
||||
pr_warn("%s: Cannot configure AEMIF\n", __func__);
|
||||
if (platform_device_register(&mityomapl138_aemif_device))
|
||||
pr_warn("%s: Cannot register AEMIF device\n", __func__);
|
||||
}
|
||||
|
||||
static const short mityomap_mii_pins[] = {
|
||||
|
|
@ -503,6 +530,8 @@ static void __init mityomapl138_init(void)
|
|||
{
|
||||
int ret;
|
||||
|
||||
da850_register_clocks();
|
||||
|
||||
/* for now, no special EDMA channels are reserved */
|
||||
ret = da850_register_edma(NULL);
|
||||
if (ret)
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue