mirror of
https://github.com/a52xq-dev/kernel.git
synced 2026-10-18 21:58:11 +07:00
This is the 4.19.122 stable release
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAl63u5UACgkQONu9yGCS aT7RVg//R5c/j20EeNgajbroWic+Ljf/oUyH1ybE+W1ITYr1iB8f9dRrsXOoO4LS USmmzhcdC1UXNdqY+LDzsJ6ybKptfrRDlxGpbpOWyQziC2XYn4QiBt6Lp87Irsd3 ZLWiDtSJRXVApLa/8iDtLqaR4V2w2bYNuuBlRJJxRHtWMDbi7Qj21zF74Ey0EtqI /lBLg/GJxGlNc7qi6USzflPOSj8zPBJsmmOhScGFDvk33HsNnU0d4dXckqAX5pt4 ZIUA9ID13djY0X4tw5aTO8nrYm5ok9B4BSsFaLtkpT4A5JpHbXQ8FDM+cwuHbNYw AXeeJM/91obOS71JmJQ5wmilE4JHS8BWNfz1fMqyiIGaYZFwL9deKLPCB/NExzRb kzXe6ppVtibze9HwQXVjOj6VP9LlbSbQnCmGeAASL5g80HhbTIvKR5/KEnHoXG+M toPjfSCZDIXoJX5BJ10iKSD3QXLO05roefZz532b3I9wo6h+uLmEEpTu9BM7czJr onrXpuwqIxstwQrB//N3vNqyyhjj91YJJexF24gHXmvWjpkGs0+xFgNZrZCWCLJc J5JL76kLwdTfToaNxbrY20t6nOqARNAgeHVE3ZPinqk8oML/AhWfayqUlYPy63Z6 bl9zHi6SR4Ye8F23KJlzpSnuTdAPioIQjbNT9PRPM73s49mVwVI= =t5+R -----END PGP SIGNATURE----- Merge 4.19.122 into android-4.19 Changes in 4.19.122 vhost: vsock: kick send_pkt worker once device is started powerpc/pci/of: Parse unassigned resources ASoC: topology: Check return value of pcm_new_ver selftests/ipc: Fix test failure seen after initial test run ASoC: sgtl5000: Fix VAG power-on handling usb: dwc3: gadget: Properly set maxpacket limit ASoC: rsnd: Fix parent SSI start/stop in multi-SSI mode ASoC: rsnd: Fix HDMI channel mapping for multi-SSI mode ASoC: codecs: hdac_hdmi: Fix incorrect use of list_for_each_entry drm/amdgpu: Correctly initialize thermal controller for GPUs with Powerplay table v0 (e.g Hawaii) wimax/i2400m: Fix potential urb refcnt leak net: stmmac: fix enabling socfpga's ptp_ref_clock net: stmmac: Fix sub-second increment ASoC: rsnd: Don't treat master SSI in multi SSI setup as parent ASoC: rsnd: Fix "status check failed" spam for multi-SSI cifs: protect updating server->dstaddr with a spinlock s390/ftrace: fix potential crashes when switching tracers scripts/config: allow colons in option strings for sed lib/mpi: Fix building for powerpc with clang net: bcmgenet: suppress warnings on failed Rx SKB allocations net: systemport: suppress warnings on failed Rx SKB allocations sctp: Fix SHUTDOWN CTSN Ack in the peer restart case drm/amdgpu: Fix oops when pp_funcs is unset in ACPI event lib: devres: add a helper function for ioremap_uc mfd: intel-lpss: Use devm_ioremap_uc for MMIO hexagon: clean up ioremap hexagon: define ioremap_uc ALSA: hda: Match both PCI ID and SSID for driver blacklist platform/x86: GPD pocket fan: Fix error message when temp-limits are out of range mac80211: add ieee80211_is_any_nullfunc() cgroup, netclassid: remove double cond_resched drm/atomic: Take the atomic toys away from X Linux 4.19.122 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I7257fc5afa0c25d3ba2f6884822ec315d556426a
This commit is contained in:
commit
9179fe9802
41 changed files with 249 additions and 85 deletions
2
Makefile
2
Makefile
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|
@ -1,7 +1,7 @@
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|||
# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
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PATCHLEVEL = 19
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SUBLEVEL = 121
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SUBLEVEL = 122
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EXTRAVERSION =
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NAME = "People's Front"
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@ -186,16 +186,10 @@ static inline void writel(u32 data, volatile void __iomem *addr)
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#define mmiowb()
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/*
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* Need an mtype somewhere in here, for cache type deals?
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* This is probably too long for an inline.
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*/
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void __iomem *ioremap_nocache(unsigned long phys_addr, unsigned long size);
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void __iomem *ioremap(unsigned long phys_addr, unsigned long size);
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#define ioremap_nocache ioremap
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#define ioremap_uc(X, Y) ioremap((X), (Y))
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static inline void __iomem *ioremap(unsigned long phys_addr, unsigned long size)
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{
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return ioremap_nocache(phys_addr, size);
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}
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static inline void iounmap(volatile void __iomem *addr)
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{
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@ -33,7 +33,7 @@ EXPORT_SYMBOL(__vmgetie);
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EXPORT_SYMBOL(__vmsetie);
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EXPORT_SYMBOL(__vmyield);
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EXPORT_SYMBOL(empty_zero_page);
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EXPORT_SYMBOL(ioremap_nocache);
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EXPORT_SYMBOL(ioremap);
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EXPORT_SYMBOL(memcpy);
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EXPORT_SYMBOL(memset);
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@ -22,7 +22,7 @@
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#include <linux/vmalloc.h>
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#include <linux/mm.h>
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void __iomem *ioremap_nocache(unsigned long phys_addr, unsigned long size)
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void __iomem *ioremap(unsigned long phys_addr, unsigned long size)
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{
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unsigned long last_addr, addr;
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unsigned long offset = phys_addr & ~PAGE_MASK;
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@ -82,10 +82,16 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
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const __be32 *addrs;
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u32 i;
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int proplen;
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bool mark_unset = false;
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addrs = of_get_property(node, "assigned-addresses", &proplen);
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if (!addrs)
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return;
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if (!addrs || !proplen) {
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addrs = of_get_property(node, "reg", &proplen);
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if (!addrs || !proplen)
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return;
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mark_unset = true;
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}
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pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
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for (; proplen >= 20; proplen -= 20, addrs += 5) {
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flags = pci_parse_of_flags(of_read_number(addrs, 1), 0);
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@ -110,6 +116,8 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
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continue;
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}
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res->flags = flags;
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if (mark_unset)
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res->flags |= IORESOURCE_UNSET;
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res->name = pci_name(dev);
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region.start = base;
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region.end = base + size - 1;
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@ -128,7 +128,7 @@ void diag_stat_inc(enum diag_stat_enum nr)
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}
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EXPORT_SYMBOL(diag_stat_inc);
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void diag_stat_inc_norecursion(enum diag_stat_enum nr)
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void notrace diag_stat_inc_norecursion(enum diag_stat_enum nr)
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{
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this_cpu_inc(diag_stat.counter[nr]);
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trace_s390_diagnose_norecursion(diag_map[nr].code);
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@ -393,7 +393,7 @@ int smp_find_processor_id(u16 address)
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return -1;
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}
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bool arch_vcpu_is_preempted(int cpu)
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bool notrace arch_vcpu_is_preempted(int cpu)
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{
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if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
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return false;
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@ -403,7 +403,7 @@ bool arch_vcpu_is_preempted(int cpu)
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}
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EXPORT_SYMBOL(arch_vcpu_is_preempted);
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void smp_yield_cpu(int cpu)
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void notrace smp_yield_cpu(int cpu)
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{
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if (MACHINE_HAS_DIAG9C) {
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diag_stat_inc_norecursion(DIAG_STAT_X09C);
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|
|
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@ -14,7 +14,7 @@ EXPORT_TRACEPOINT_SYMBOL(s390_diagnose);
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static DEFINE_PER_CPU(unsigned int, diagnose_trace_depth);
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void trace_s390_diagnose_norecursion(int diag_nr)
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void notrace trace_s390_diagnose_norecursion(int diag_nr)
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{
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unsigned long flags;
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unsigned int *depth;
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|
|
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@ -71,7 +71,8 @@ void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
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adev->pm.ac_power = true;
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else
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adev->pm.ac_power = false;
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if (adev->powerplay.pp_funcs->enable_bapm)
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if (adev->powerplay.pp_funcs &&
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adev->powerplay.pp_funcs->enable_bapm)
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amdgpu_dpm_enable_bapm(adev, adev->pm.ac_power);
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mutex_unlock(&adev->pm.mutex);
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}
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|
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@ -983,6 +983,32 @@ static int init_thermal_controller(
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struct pp_hwmgr *hwmgr,
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const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
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{
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hwmgr->thermal_controller.ucType =
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powerplay_table->sThermalController.ucType;
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hwmgr->thermal_controller.ucI2cLine =
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powerplay_table->sThermalController.ucI2cLine;
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hwmgr->thermal_controller.ucI2cAddress =
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powerplay_table->sThermalController.ucI2cAddress;
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hwmgr->thermal_controller.fanInfo.bNoFan =
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(0 != (powerplay_table->sThermalController.ucFanParameters &
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ATOM_PP_FANPARAMETERS_NOFAN));
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hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution =
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powerplay_table->sThermalController.ucFanParameters &
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ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK;
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hwmgr->thermal_controller.fanInfo.ulMinRPM
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= powerplay_table->sThermalController.ucFanMinRPM * 100UL;
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hwmgr->thermal_controller.fanInfo.ulMaxRPM
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= powerplay_table->sThermalController.ucFanMaxRPM * 100UL;
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set_hw_cap(hwmgr,
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ATOM_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
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PHM_PlatformCaps_ThermalController);
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hwmgr->thermal_controller.use_hw_fan_control = 1;
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return 0;
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}
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@ -321,7 +321,12 @@ drm_setclientcap(struct drm_device *dev, void *data, struct drm_file *file_priv)
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case DRM_CLIENT_CAP_ATOMIC:
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if (!drm_core_check_feature(dev, DRIVER_ATOMIC))
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return -EINVAL;
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if (req->value > 1)
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/* The modesetting DDX has a totally broken idea of atomic. */
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if (current->comm[0] == 'X' && req->value == 1) {
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pr_info("broken atomic modeset userspace detected, disabling atomic\n");
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return -EOPNOTSUPP;
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}
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if (req->value > 2)
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return -EINVAL;
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file_priv->atomic = req->value;
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file_priv->universal_planes = req->value;
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@ -397,7 +397,7 @@ int intel_lpss_probe(struct device *dev,
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if (!lpss)
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return -ENOMEM;
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lpss->priv = devm_ioremap(dev, info->mem->start + LPSS_PRIV_OFFSET,
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lpss->priv = devm_ioremap_uc(dev, info->mem->start + LPSS_PRIV_OFFSET,
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LPSS_PRIV_SIZE);
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if (!lpss->priv)
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return -ENOMEM;
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@ -677,7 +677,8 @@ static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
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dma_addr_t mapping;
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/* Allocate a new SKB for a new packet */
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skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
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skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
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GFP_ATOMIC | __GFP_NOWARN);
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if (!skb) {
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priv->mib.alloc_rx_buff_failed++;
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netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
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@ -1699,7 +1699,8 @@ static struct sk_buff *bcmgenet_rx_refill(struct bcmgenet_priv *priv,
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dma_addr_t mapping;
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/* Allocate a new Rx skb */
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skb = netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT);
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skb = __netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT,
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GFP_ATOMIC | __GFP_NOWARN);
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if (!skb) {
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priv->mib.alloc_rx_buff_failed++;
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netif_err(priv, rx_err, priv->dev,
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@ -274,16 +274,19 @@ static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
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phymode == PHY_INTERFACE_MODE_MII ||
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phymode == PHY_INTERFACE_MODE_GMII ||
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phymode == PHY_INTERFACE_MODE_SGMII) {
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ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
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regmap_read(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
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&module);
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module |= (SYSMGR_FPGAGRP_MODULE_EMAC << (reg_shift / 2));
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regmap_write(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
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module);
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} else {
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ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2));
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}
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if (dwmac->f2h_ptp_ref_clk)
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ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
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else
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ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK <<
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(reg_shift / 2));
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regmap_write(sys_mgr_base_addr, reg_offset, ctrl);
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/* Deassert reset for the phy configuration to be sampled by
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|
|
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|
@ -36,12 +36,16 @@ static void config_sub_second_increment(void __iomem *ioaddr,
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unsigned long data;
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u32 reg_value;
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/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
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* formula = (1/ptp_clock) * 1000000000
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* where ptp_clock is 50MHz if fine method is used to update system
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/* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second
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* increment to twice the number of nanoseconds of a clock cycle.
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* The calculation of the default_addend value by the caller will set it
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* to mid-range = 2^31 when the remainder of this division is zero,
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* which will make the accumulator overflow once every 2 ptp_clock
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* cycles, adding twice the number of nanoseconds of a clock cycle :
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* 2000000000ULL / ptp_clock.
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*/
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if (value & PTP_TCR_TSCFUPDT)
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data = (1000000000ULL / 50000000);
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data = (2000000000ULL / ptp_clock);
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else
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data = (1000000000ULL / ptp_clock);
|
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|
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|
|
|
|||
|
|
@ -354,6 +354,7 @@ out:
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usb_autopm_put_interface(i2400mu->usb_iface);
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d_fnend(8, dev, "(i2400m %p ack %p size %zu) = %ld\n",
|
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i2400m, ack, ack_size, (long) result);
|
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usb_put_urb(¬if_urb);
|
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return result;
|
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|
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error_exceeded:
|
||||
|
|
|
|||
|
|
@ -128,7 +128,7 @@ static int gpd_pocket_fan_probe(struct platform_device *pdev)
|
|||
|
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for (i = 0; i < ARRAY_SIZE(temp_limits); i++) {
|
||||
if (temp_limits[i] < 20000 || temp_limits[i] > 90000) {
|
||||
dev_err(&pdev->dev, "Invalid temp-limit %d (must be between 40000 and 70000)\n",
|
||||
dev_err(&pdev->dev, "Invalid temp-limit %d (must be between 20000 and 90000)\n",
|
||||
temp_limits[i]);
|
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temp_limits[0] = TEMP_LIMIT0_DEFAULT;
|
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temp_limits[1] = TEMP_LIMIT1_DEFAULT;
|
||||
|
|
|
|||
|
|
@ -300,6 +300,10 @@
|
|||
#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff)
|
||||
#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000)
|
||||
|
||||
/* Global RX Fifo Size Register */
|
||||
#define DWC31_GRXFIFOSIZ_RXFDEP(n) ((n) & 0x7fff) /* DWC_usb31 only */
|
||||
#define DWC3_GRXFIFOSIZ_RXFDEP(n) ((n) & 0xffff)
|
||||
|
||||
/* Global Event Size Registers */
|
||||
#define DWC3_GEVNTSIZ_INTMASK BIT(31)
|
||||
#define DWC3_GEVNTSIZ_SIZE(n) ((n) & 0xffff)
|
||||
|
|
|
|||
|
|
@ -2032,7 +2032,6 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep)
|
|||
{
|
||||
struct dwc3 *dwc = dep->dwc;
|
||||
int mdwidth;
|
||||
int kbytes;
|
||||
int size;
|
||||
|
||||
mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
|
||||
|
|
@ -2048,17 +2047,17 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep)
|
|||
/* FIFO Depth is in MDWDITH bytes. Multiply */
|
||||
size *= mdwidth;
|
||||
|
||||
kbytes = size / 1024;
|
||||
if (kbytes == 0)
|
||||
kbytes = 1;
|
||||
|
||||
/*
|
||||
* FIFO sizes account an extra MDWIDTH * (kbytes + 1) bytes for
|
||||
* internal overhead. We don't really know how these are used,
|
||||
* but documentation say it exists.
|
||||
* To meet performance requirement, a minimum TxFIFO size of 3x
|
||||
* MaxPacketSize is recommended for endpoints that support burst and a
|
||||
* minimum TxFIFO size of 2x MaxPacketSize for endpoints that don't
|
||||
* support burst. Use those numbers and we can calculate the max packet
|
||||
* limit as below.
|
||||
*/
|
||||
size -= mdwidth * (kbytes + 1);
|
||||
size /= kbytes;
|
||||
if (dwc->maximum_speed >= USB_SPEED_SUPER)
|
||||
size /= 3;
|
||||
else
|
||||
size /= 2;
|
||||
|
||||
usb_ep_set_maxpacket_limit(&dep->endpoint, size);
|
||||
|
||||
|
|
@ -2076,8 +2075,39 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep)
|
|||
static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep)
|
||||
{
|
||||
struct dwc3 *dwc = dep->dwc;
|
||||
int mdwidth;
|
||||
int size;
|
||||
|
||||
usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
|
||||
mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
|
||||
|
||||
/* MDWIDTH is represented in bits, convert to bytes */
|
||||
mdwidth /= 8;
|
||||
|
||||
/* All OUT endpoints share a single RxFIFO space */
|
||||
size = dwc3_readl(dwc->regs, DWC3_GRXFIFOSIZ(0));
|
||||
if (dwc3_is_usb31(dwc))
|
||||
size = DWC31_GRXFIFOSIZ_RXFDEP(size);
|
||||
else
|
||||
size = DWC3_GRXFIFOSIZ_RXFDEP(size);
|
||||
|
||||
/* FIFO depth is in MDWDITH bytes */
|
||||
size *= mdwidth;
|
||||
|
||||
/*
|
||||
* To meet performance requirement, a minimum recommended RxFIFO size
|
||||
* is defined as follow:
|
||||
* RxFIFO size >= (3 x MaxPacketSize) +
|
||||
* (3 x 8 bytes setup packets size) + (16 bytes clock crossing margin)
|
||||
*
|
||||
* Then calculate the max packet limit as below.
|
||||
*/
|
||||
size -= (3 * 8) + 16;
|
||||
if (size < 0)
|
||||
size = 0;
|
||||
else
|
||||
size /= 3;
|
||||
|
||||
usb_ep_set_maxpacket_limit(&dep->endpoint, size);
|
||||
dep->endpoint.max_streams = 15;
|
||||
dep->endpoint.ops = &dwc3_gadget_ep_ops;
|
||||
list_add_tail(&dep->endpoint.ep_list,
|
||||
|
|
|
|||
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Reference in a new issue