mirror of
https://github.com/a52xq-dev/kernel.git
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This is the 4.19.36 stable release
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IB/mlx4: Fix race condition between catas error reset and aliasguid flows i40iw: Avoid panic when handling the inetdev event mmc: davinci: remove extraneous __init annotation ALSA: opl3: fix mismatch between snd_opl3_drum_switch definition and declaration thermal/intel_powerclamp: fix __percpu declaration of worker_data thermal: samsung: Fix incorrect check after code merge thermal: bcm2835: Fix crash in bcm2835_thermal_debugfs thermal/int340x_thermal: Add additional UUIDs thermal/int340x_thermal: fix mode setting thermal/intel_powerclamp: fix truncated kthread name scsi: iscsi: flush running unbind operations when removing a session sched/cpufreq: Fix 32-bit math overflow sched/core: Fix buffer overflow in cgroup2 property cpu.max x86/mm: Don't leak kernel addresses tools/power turbostat: return the exit status of a command perf list: Don't forget to drop the reference to the allocated thread_map perf config: Fix an error in the config template documentation perf config: Fix a memory leak in collect_config() perf build-id: Fix memory leak in print_sdt_events() perf top: Fix error handling in cmd_top() perf hist: Add missing map__put() in error case perf evsel: Free evsel->counts in perf_evsel__exit() perf tests: Fix a memory leak of cpu_map object in the openat_syscall_event_on_all_cpus test perf tests: Fix memory leak by expr__find_other() in test__expr() perf tests: Fix a memory leak in test__perf_evsel__tp_sched_test() ACPI / utils: Drop reference in test for device presence PM / Domains: Avoid a potential deadlock blk-iolatency: #include "blk.h" drm/exynos/mixer: fix MIXER shadow registry synchronisation code irqchip/stm32: Don't clear rising/falling config registers at init irqchip/mbigen: Don't clear eventid when freeing an MSI x86/hpet: Prevent potential NULL pointer dereference x86/hyperv: Prevent potential NULL pointer dereference x86/cpu/cyrix: Use correct macros for Cyrix calls on Geode processors drm/nouveau/debugfs: Fix check of pm_runtime_get_sync failure iommu/vt-d: Check capability before disabling protected memory x86/hw_breakpoints: Make default case in hw_breakpoint_arch_parse() return an error fix incorrect error code mapping for OBJECTID_NOT_FOUND x86/gart: Exclude GART aperture from kcore ext4: prohibit fstrim in norecovery mode drm/cirrus: Use drm_framebuffer_put to avoid kernel oops in clean-up gpio: pxa: handle corner case of unprobed device rsi: improve kernel thread handling to fix kernel panic f2fs: fix to avoid NULL pointer dereference on se->discard_map 9p: do not trust pdu content for stat item size 9p locks: add mount option for lock retry interval ASoC: Fix UBSAN warning at snd_soc_get/put_volsw_sx() f2fs: fix to do sanity check with current segment number netfilter: xt_cgroup: shrink size of v2 path serial: uartps: console_setup() can't be placed to init section powerpc/pseries: Remove prrn_work workqueue media: au0828: cannot kfree dev before usb disconnect Bluetooth: Fix debugfs NULL pointer dereference HID: i2c-hid: override HID descriptors for certain devices pinctrl: core: make sure strcmp() doesn't get a null parameter ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms usbip: fix vhci_hcd controller counting ACPI / SBS: Fix GPE storm on recent MacBookPro's HID: usbhid: Add quirk for Redragon/Dragonrise Seymur 2 KVM: nVMX: restore host state in nested_vmx_vmexit for VMFail compiler.h: update definition of unreachable() netfilter: nf_flow_table: remove flowtable hook flush routine in netns exit routine f2fs: cleanup dirty pages if recover failed net: stmmac: Set OWN bit for jumbo frames cifs: fallback to older infolevels on findfirst queryinfo retry kernel: hung_task.c: disable on suspend platform/x86: Add Intel AtomISP2 dummy / power-management driver drm/ttm: Fix bo_global and mem_global kfree error ALSA: hda: fix front speakers on Huawei MBXP ACPI: EC / PM: Disable non-wakeup GPEs for suspend-to-idle net/rds: fix warn in rds_message_alloc_sgs xfrm: destroy xfrm_state synchronously on net exit path crypto: sha256/arm - fix crash bug in Thumb2 build crypto: sha512/arm - fix crash bug in Thumb2 build net: ip6_gre: fix possible NULL pointer dereference in ip6erspan_set_version iommu/dmar: Fix buffer overflow during PCI bus notification scsi: core: Avoid that system resume triggers a kernel warning soc/tegra: pmc: Drop locking from tegra_powergate_is_powered() lkdtm: Print real addresses lkdtm: Add tests for NULL pointer dereference drm/panel: panel-innolux: set display off in innolux_panel_unprepare crypto: axis - fix for recursive locking from bottom half Revert "ACPI / EC: Remove old CLEAR_ON_RESUME quirk" coresight: cpu-debug: Support for CA73 CPUs PCI: Blacklist power management of Gigabyte X299 DESIGNARE EX PCIe ports drm/nouveau/volt/gf117: fix speedo readout register ARM: 8839/1: kprobe: make patch_lock a raw_spinlock_t drm/amdkfd: use init_mqd function to allocate object for hid_mqd (CI) appletalk: Fix use-after-free in atalk_proc_exit lib/div64.c: off by one in shift rxrpc: Fix client call connect/disconnect race f2fs: fix to dirty inode for i_mode recovery include/linux/swap.h: use offsetof() instead of custom __swapoffset macro bpf: fix use after free in bpf_evict_inode IB/hfi1: Failed to drain send queue when QP is put into error state mm: hide incomplete nr_indirectly_reclaimable in /proc/zoneinfo mm: hide incomplete nr_indirectly_reclaimable in sysfs appletalk: Fix compile regression Linux 4.19.36 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
commit
10f41ccfc7
138 changed files with 1765 additions and 483 deletions
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|
@ -7320,6 +7320,12 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Supported
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F: sound/soc/intel/
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INTEL ATOMISP2 DUMMY / POWER-MANAGEMENT DRIVER
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M: Hans de Goede <hdegoede@redhat.com>
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L: platform-driver-x86@vger.kernel.org
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S: Maintained
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F: drivers/platform/x86/intel_atomisp2_pm.c
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INTEL C600 SERIES SAS CONTROLLER DRIVER
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M: Intel SCU Linux support <intel-linux-scu@intel.com>
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M: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
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2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
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PATCHLEVEL = 19
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SUBLEVEL = 35
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SUBLEVEL = 36
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EXTRAVERSION =
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NAME = "People's Front"
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@ -8,6 +8,7 @@ CONFIG_NAMESPACES=y
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# CONFIG_UTS_NS is not set
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# CONFIG_PID_NS is not set
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_BLK_DEV_RAM=y
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CONFIG_EMBEDDED=y
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CONFIG_PERF_EVENTS=y
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# CONFIG_VM_EVENT_COUNTERS is not set
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@ -107,6 +107,7 @@ ENTRY(stext)
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; r2 = pointer to uboot provided cmdline or external DTB in mem
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; These are handled later in handle_uboot_args()
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st r0, [@uboot_tag]
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st r1, [@uboot_magic]
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st r2, [@uboot_arg]
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#endif
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@ -35,6 +35,7 @@ unsigned int intr_to_DE_cnt;
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/* Part of U-boot ABI: see head.S */
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int __initdata uboot_tag;
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int __initdata uboot_magic;
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char __initdata *uboot_arg;
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const struct machine_desc *machine_desc;
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@ -484,6 +485,8 @@ static inline bool uboot_arg_invalid(unsigned long addr)
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#define UBOOT_TAG_NONE 0
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#define UBOOT_TAG_CMDLINE 1
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#define UBOOT_TAG_DTB 2
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/* We always pass 0 as magic from U-boot */
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#define UBOOT_MAGIC_VALUE 0
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void __init handle_uboot_args(void)
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{
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@ -499,6 +502,11 @@ void __init handle_uboot_args(void)
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goto ignore_uboot_args;
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}
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if (uboot_magic != UBOOT_MAGIC_VALUE) {
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pr_warn(IGNORE_ARGS "non zero uboot magic\n");
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goto ignore_uboot_args;
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}
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if (uboot_tag != UBOOT_TAG_NONE &&
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uboot_arg_invalid((unsigned long)uboot_arg)) {
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pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
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@ -212,10 +212,11 @@ K256:
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.global sha256_block_data_order
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.type sha256_block_data_order,%function
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sha256_block_data_order:
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.Lsha256_block_data_order:
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#if __ARM_ARCH__<7
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sub r3,pc,#8 @ sha256_block_data_order
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#else
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adr r3,sha256_block_data_order
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adr r3,.Lsha256_block_data_order
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#endif
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#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
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ldr r12,.LOPENSSL_armcap
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@ -93,10 +93,11 @@ K256:
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.global sha256_block_data_order
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.type sha256_block_data_order,%function
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sha256_block_data_order:
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.Lsha256_block_data_order:
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#if __ARM_ARCH__<7
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sub r3,pc,#8 @ sha256_block_data_order
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#else
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adr r3,sha256_block_data_order
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adr r3,.Lsha256_block_data_order
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#endif
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#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
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ldr r12,.LOPENSSL_armcap
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@ -274,10 +274,11 @@ WORD64(0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817)
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.global sha512_block_data_order
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.type sha512_block_data_order,%function
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sha512_block_data_order:
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.Lsha512_block_data_order:
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#if __ARM_ARCH__<7
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sub r3,pc,#8 @ sha512_block_data_order
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#else
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adr r3,sha512_block_data_order
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adr r3,.Lsha512_block_data_order
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#endif
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#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
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ldr r12,.LOPENSSL_armcap
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@ -141,10 +141,11 @@ WORD64(0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817)
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.global sha512_block_data_order
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.type sha512_block_data_order,%function
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sha512_block_data_order:
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.Lsha512_block_data_order:
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#if __ARM_ARCH__<7
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sub r3,pc,#8 @ sha512_block_data_order
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#else
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adr r3,sha512_block_data_order
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adr r3,.Lsha512_block_data_order
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#endif
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#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
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ldr r12,.LOPENSSL_armcap
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@ -16,7 +16,7 @@ struct patch {
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unsigned int insn;
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};
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static DEFINE_SPINLOCK(patch_lock);
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static DEFINE_RAW_SPINLOCK(patch_lock);
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static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags)
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__acquires(&patch_lock)
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@ -33,7 +33,7 @@ static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags)
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return addr;
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if (flags)
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spin_lock_irqsave(&patch_lock, *flags);
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raw_spin_lock_irqsave(&patch_lock, *flags);
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else
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__acquire(&patch_lock);
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@ -48,7 +48,7 @@ static void __kprobes patch_unmap(int fixmap, unsigned long *flags)
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clear_fixmap(fixmap);
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if (flags)
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spin_unlock_irqrestore(&patch_lock, *flags);
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raw_spin_unlock_irqrestore(&patch_lock, *flags);
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else
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__release(&patch_lock);
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}
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@ -256,7 +256,7 @@ config S3C_PM_DEBUG_LED_SMDK
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config SAMSUNG_PM_CHECK
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bool "S3C2410 PM Suspend Memory CRC"
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depends on PM
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depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210)
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select CRC32
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help
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Enable the PM code's memory area checksum over sleep. This option
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@ -274,27 +274,16 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
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}
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#ifdef CONFIG_PPC_PSERIES
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static s32 prrn_update_scope;
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static void prrn_work_fn(struct work_struct *work)
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static void handle_prrn_event(s32 scope)
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{
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/*
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* For PRRN, we must pass the negative of the scope value in
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* the RTAS event.
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*/
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pseries_devicetree_update(-prrn_update_scope);
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pseries_devicetree_update(-scope);
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numa_update_cpu_topology(false);
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}
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static DECLARE_WORK(prrn_work, prrn_work_fn);
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static void prrn_schedule_update(u32 scope)
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{
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flush_work(&prrn_work);
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prrn_update_scope = scope;
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schedule_work(&prrn_work);
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}
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static void handle_rtas_event(const struct rtas_error_log *log)
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{
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if (rtas_error_type(log) != RTAS_TYPE_PRRN || !prrn_is_enabled())
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@ -303,7 +292,7 @@ static void handle_rtas_event(const struct rtas_error_log *log)
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/* For PRRN Events the extended log length is used to denote
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* the scope for calling rtas update-nodes.
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*/
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prrn_schedule_update(rtas_error_extended_log_length(log));
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handle_prrn_event(rtas_error_extended_log_length(log));
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}
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#else
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@ -101,9 +101,13 @@ static int hv_cpu_init(unsigned int cpu)
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u64 msr_vp_index;
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struct hv_vp_assist_page **hvp = &hv_vp_assist_page[smp_processor_id()];
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void **input_arg;
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struct page *pg;
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input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
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*input_arg = page_address(alloc_page(GFP_KERNEL));
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pg = alloc_page(GFP_KERNEL);
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if (unlikely(!pg))
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return -ENOMEM;
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*input_arg = page_address(pg);
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hv_get_vp_index(msr_vp_index);
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@ -14,6 +14,7 @@
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#define pr_fmt(fmt) "AGP: " fmt
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#include <linux/kernel.h>
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#include <linux/kcore.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/memblock.h>
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@ -57,7 +58,7 @@ int fallback_aper_force __initdata;
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int fix_aperture __initdata = 1;
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#ifdef CONFIG_PROC_VMCORE
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#if defined(CONFIG_PROC_VMCORE) || defined(CONFIG_PROC_KCORE)
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/*
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* If the first kernel maps the aperture over e820 RAM, the kdump kernel will
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* use the same range because it will remain configured in the northbridge.
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@ -66,20 +67,25 @@ int fix_aperture __initdata = 1;
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*/
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static unsigned long aperture_pfn_start, aperture_page_count;
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static int gart_oldmem_pfn_is_ram(unsigned long pfn)
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static int gart_mem_pfn_is_ram(unsigned long pfn)
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{
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return likely((pfn < aperture_pfn_start) ||
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(pfn >= aperture_pfn_start + aperture_page_count));
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}
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static void exclude_from_vmcore(u64 aper_base, u32 aper_order)
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static void __init exclude_from_core(u64 aper_base, u32 aper_order)
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{
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aperture_pfn_start = aper_base >> PAGE_SHIFT;
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aperture_page_count = (32 * 1024 * 1024) << aper_order >> PAGE_SHIFT;
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WARN_ON(register_oldmem_pfn_is_ram(&gart_oldmem_pfn_is_ram));
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#ifdef CONFIG_PROC_VMCORE
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WARN_ON(register_oldmem_pfn_is_ram(&gart_mem_pfn_is_ram));
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#endif
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#ifdef CONFIG_PROC_KCORE
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WARN_ON(register_mem_pfn_is_ram(&gart_mem_pfn_is_ram));
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#endif
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}
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#else
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static void exclude_from_vmcore(u64 aper_base, u32 aper_order)
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static void exclude_from_core(u64 aper_base, u32 aper_order)
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{
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}
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#endif
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@ -469,7 +475,7 @@ out:
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* may have allocated the range over its e820 RAM
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* and fixed up the northbridge
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*/
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exclude_from_vmcore(last_aper_base, last_aper_order);
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exclude_from_core(last_aper_base, last_aper_order);
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return 1;
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}
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|
|
@ -515,7 +521,7 @@ out:
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* overlap with the first kernel's memory. We can't access the
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* range through vmcore even though it should be part of the dump.
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*/
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exclude_from_vmcore(aper_alloc, aper_order);
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exclude_from_core(aper_alloc, aper_order);
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/* Fix up the north bridges */
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for (i = 0; i < amd_nb_bus_dev_ranges[i].dev_limit; i++) {
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|
|
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|
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@ -124,7 +124,7 @@ static void set_cx86_reorder(void)
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setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
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/* Load/Store Serialize to mem access disable (=reorder it) */
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setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80);
|
||||
setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80);
|
||||
/* set load/store serialize from 1GB to 4GB */
|
||||
ccr3 |= 0xe0;
|
||||
setCx86(CX86_CCR3, ccr3);
|
||||
|
|
@ -135,11 +135,11 @@ static void set_cx86_memwb(void)
|
|||
pr_info("Enable Memory-Write-back mode on Cyrix/NSC processor.\n");
|
||||
|
||||
/* CCR2 bit 2: unlock NW bit */
|
||||
setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) & ~0x04);
|
||||
setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);
|
||||
/* set 'Not Write-through' */
|
||||
write_cr0(read_cr0() | X86_CR0_NW);
|
||||
/* CCR2 bit 2: lock NW bit and set WT1 */
|
||||
setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x14);
|
||||
setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -153,14 +153,14 @@ static void geode_configure(void)
|
|||
local_irq_save(flags);
|
||||
|
||||
/* Suspend on halt power saving and enable #SUSP pin */
|
||||
setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x88);
|
||||
setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
|
||||
|
||||
ccr3 = getCx86(CX86_CCR3);
|
||||
setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
|
||||
|
||||
|
||||
/* FPU fast, DTE cache, Mem bypass */
|
||||
setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x38);
|
||||
setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38);
|
||||
setCx86(CX86_CCR3, ccr3); /* disable MAPEN */
|
||||
|
||||
set_cx86_memwb();
|
||||
|
|
@ -296,7 +296,7 @@ static void init_cyrix(struct cpuinfo_x86 *c)
|
|||
/* GXm supports extended cpuid levels 'ala' AMD */
|
||||
if (c->cpuid_level == 2) {
|
||||
/* Enable cxMMX extensions (GX1 Datasheet 54) */
|
||||
setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7) | 1);
|
||||
setCx86(CX86_CCR7, getCx86(CX86_CCR7) | 1);
|
||||
|
||||
/*
|
||||
* GXm : 0x30 ... 0x5f GXm datasheet 51
|
||||
|
|
@ -319,7 +319,7 @@ static void init_cyrix(struct cpuinfo_x86 *c)
|
|||
if (dir1 > 7) {
|
||||
dir0_msn++; /* M II */
|
||||
/* Enable MMX extensions (App note 108) */
|
||||
setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7)|1);
|
||||
setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1);
|
||||
} else {
|
||||
/* A 6x86MX - it has the bug. */
|
||||
set_cpu_bug(c, X86_BUG_COMA);
|
||||
|
|
|
|||
|
|
@ -909,6 +909,8 @@ int __init hpet_enable(void)
|
|||
return 0;
|
||||
|
||||
hpet_set_mapping();
|
||||
if (!hpet_virt_address)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Read the period and check for a sane value:
|
||||
|
|
|
|||
|
|
@ -357,6 +357,7 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
|
|||
#endif
|
||||
default:
|
||||
WARN_ON_ONCE(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -599,8 +599,8 @@ static int __init smp_scan_config(unsigned long base, unsigned long length)
|
|||
mpf_base = base;
|
||||
mpf_found = true;
|
||||
|
||||
pr_info("found SMP MP-table at [mem %#010lx-%#010lx] mapped at [%p]\n",
|
||||
base, base + sizeof(*mpf) - 1, mpf);
|
||||
pr_info("found SMP MP-table at [mem %#010lx-%#010lx]\n",
|
||||
base, base + sizeof(*mpf) - 1);
|
||||
|
||||
memblock_reserve(base, sizeof(*mpf));
|
||||
if (mpf->physptr)
|
||||
|
|
|
|||
|
|
@ -13181,24 +13181,6 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
|
|||
kvm_clear_interrupt_queue(vcpu);
|
||||
}
|
||||
|
||||
static void load_vmcs12_mmu_host_state(struct kvm_vcpu *vcpu,
|
||||
struct vmcs12 *vmcs12)
|
||||
{
|
||||
u32 entry_failure_code;
|
||||
|
||||
nested_ept_uninit_mmu_context(vcpu);
|
||||
|
||||
/*
|
||||
* Only PDPTE load can fail as the value of cr3 was checked on entry and
|
||||
* couldn't have changed.
|
||||
*/
|
||||
if (nested_vmx_load_cr3(vcpu, vmcs12->host_cr3, false, &entry_failure_code))
|
||||
nested_vmx_abort(vcpu, VMX_ABORT_LOAD_HOST_PDPTE_FAIL);
|
||||
|
||||
if (!enable_ept)
|
||||
vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
|
||||
}
|
||||
|
||||
/*
|
||||
* A part of what we need to when the nested L2 guest exits and we want to
|
||||
* run its L1 parent, is to reset L1's guest state to the host state specified
|
||||
|
|
@ -13212,6 +13194,7 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
|
|||
struct vmcs12 *vmcs12)
|
||||
{
|
||||
struct kvm_segment seg;
|
||||
u32 entry_failure_code;
|
||||
|
||||
if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER)
|
||||
vcpu->arch.efer = vmcs12->host_ia32_efer;
|
||||
|
|
@ -13238,7 +13221,17 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
|
|||
vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK);
|
||||
vmx_set_cr4(vcpu, vmcs12->host_cr4);
|
||||
|
||||
load_vmcs12_mmu_host_state(vcpu, vmcs12);
|
||||
nested_ept_uninit_mmu_context(vcpu);
|
||||
|
||||
/*
|
||||
* Only PDPTE load can fail as the value of cr3 was checked on entry and
|
||||
* couldn't have changed.
|
||||
*/
|
||||
if (nested_vmx_load_cr3(vcpu, vmcs12->host_cr3, false, &entry_failure_code))
|
||||
nested_vmx_abort(vcpu, VMX_ABORT_LOAD_HOST_PDPTE_FAIL);
|
||||
|
||||
if (!enable_ept)
|
||||
vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
|
||||
|
||||
/*
|
||||
* If vmcs01 don't use VPID, CPU flushes TLB on every
|
||||
|
|
@ -13334,6 +13327,140 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
|
|||
nested_vmx_abort(vcpu, VMX_ABORT_LOAD_HOST_MSR_FAIL);
|
||||
}
|
||||
|
||||
static inline u64 nested_vmx_get_vmcs01_guest_efer(struct vcpu_vmx *vmx)
|
||||
{
|
||||
struct shared_msr_entry *efer_msr;
|
||||
unsigned int i;
|
||||
|
||||
if (vm_entry_controls_get(vmx) & VM_ENTRY_LOAD_IA32_EFER)
|
||||
return vmcs_read64(GUEST_IA32_EFER);
|
||||
|
||||
if (cpu_has_load_ia32_efer)
|
||||
return host_efer;
|
||||
|
||||
for (i = 0; i < vmx->msr_autoload.guest.nr; ++i) {
|
||||
if (vmx->msr_autoload.guest.val[i].index == MSR_EFER)
|
||||
return vmx->msr_autoload.guest.val[i].value;
|
||||
}
|
||||
|
||||
efer_msr = find_msr_entry(vmx, MSR_EFER);
|
||||
if (efer_msr)
|
||||
return efer_msr->data;
|
||||
|
||||
return host_efer;
|
||||
}
|
||||
|
||||
static void nested_vmx_restore_host_state(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
|
||||
struct vcpu_vmx *vmx = to_vmx(vcpu);
|
||||
struct vmx_msr_entry g, h;
|
||||
struct msr_data msr;
|
||||
gpa_t gpa;
|
||||
u32 i, j;
|
||||
|
||||
vcpu->arch.pat = vmcs_read64(GUEST_IA32_PAT);
|
||||
|
||||
if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_DEBUG_CONTROLS) {
|
||||
/*
|
||||
* L1's host DR7 is lost if KVM_GUESTDBG_USE_HW_BP is set
|
||||
* as vmcs01.GUEST_DR7 contains a userspace defined value
|
||||
* and vcpu->arch.dr7 is not squirreled away before the
|
||||
* nested VMENTER (not worth adding a variable in nested_vmx).
|
||||
*/
|
||||
if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
|
||||
kvm_set_dr(vcpu, 7, DR7_FIXED_1);
|
||||
else
|
||||
WARN_ON(kvm_set_dr(vcpu, 7, vmcs_readl(GUEST_DR7)));
|
||||
}
|
||||
|
||||
/*
|
||||
* Note that calling vmx_set_{efer,cr0,cr4} is important as they
|
||||
* handle a variety of side effects to KVM's software model.
|
||||
*/
|
||||
vmx_set_efer(vcpu, nested_vmx_get_vmcs01_guest_efer(vmx));
|
||||
|
||||
vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS;
|
||||
vmx_set_cr0(vcpu, vmcs_readl(CR0_READ_SHADOW));
|
||||
|
||||
vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK);
|
||||
vmx_set_cr4(vcpu, vmcs_readl(CR4_READ_SHADOW));
|
||||
|
||||
nested_ept_uninit_mmu_context(vcpu);
|
||||
vcpu->arch.cr3 = vmcs_readl(GUEST_CR3);
|
||||
__set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
|
||||
|
||||
/*
|
||||
* Use ept_save_pdptrs(vcpu) to load the MMU's cached PDPTRs
|
||||
* from vmcs01 (if necessary). The PDPTRs are not loaded on
|
||||
* VMFail, like everything else we just need to ensure our
|
||||
* software model is up-to-date.
|
||||
*/
|
||||
ept_save_pdptrs(vcpu);
|
||||
|
||||
kvm_mmu_reset_context(vcpu);
|
||||
|
||||
if (cpu_has_vmx_msr_bitmap())
|
||||
vmx_update_msr_bitmap(vcpu);
|
||||
|
||||
/*
|
||||
* This nasty bit of open coding is a compromise between blindly
|
||||
* loading L1's MSRs using the exit load lists (incorrect emulation
|
||||
* of VMFail), leaving the nested VM's MSRs in the software model
|
||||
* (incorrect behavior) and snapshotting the modified MSRs (too
|
||||
* expensive since the lists are unbound by hardware). For each
|
||||
* MSR that was (prematurely) loaded from the nested VMEntry load
|
||||
* list, reload it from the exit load list if it exists and differs
|
||||
* from the guest value. The intent is to stuff host state as
|
||||
* silently as possible, not to fully process the exit load list.
|
||||
*/
|
||||
msr.host_initiated = false;
|
||||
for (i = 0; i < vmcs12->vm_entry_msr_load_count; i++) {
|
||||
gpa = vmcs12->vm_entry_msr_load_addr + (i * sizeof(g));
|
||||
if (kvm_vcpu_read_guest(vcpu, gpa, &g, sizeof(g))) {
|
||||
pr_debug_ratelimited(
|
||||
"%s read MSR index failed (%u, 0x%08llx)\n",
|
||||
__func__, i, gpa);
|
||||
goto vmabort;
|
||||
}
|
||||
|
||||
for (j = 0; j < vmcs12->vm_exit_msr_load_count; j++) {
|
||||
gpa = vmcs12->vm_exit_msr_load_addr + (j * sizeof(h));
|
||||
if (kvm_vcpu_read_guest(vcpu, gpa, &h, sizeof(h))) {
|
||||
pr_debug_ratelimited(
|
||||
"%s read MSR failed (%u, 0x%08llx)\n",
|
||||
__func__, j, gpa);
|
||||
goto vmabort;
|
||||
}
|
||||
if (h.index != g.index)
|
||||
continue;
|
||||
if (h.value == g.value)
|
||||
break;
|
||||
|
||||
if (nested_vmx_load_msr_check(vcpu, &h)) {
|
||||
pr_debug_ratelimited(
|
||||
"%s check failed (%u, 0x%x, 0x%x)\n",
|
||||
__func__, j, h.index, h.reserved);
|
||||
goto vmabort;
|
||||
}
|
||||
|
||||
msr.index = h.index;
|
||||
msr.data = h.value;
|
||||
if (kvm_set_msr(vcpu, &msr)) {
|
||||
pr_debug_ratelimited(
|
||||
"%s WRMSR failed (%u, 0x%x, 0x%llx)\n",
|
||||
__func__, j, h.index, h.value);
|
||||
goto vmabort;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
vmabort:
|
||||
nested_vmx_abort(vcpu, VMX_ABORT_LOAD_HOST_MSR_FAIL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Emulate an exit from nested guest (L2) to L1, i.e., prepare to run L1
|
||||
* and modify vmcs12 to make it see what it would expect to see there if
|
||||
|
|
@ -13478,7 +13605,13 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
|
|||
*/
|
||||
nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
|
||||
|
||||
load_vmcs12_mmu_host_state(vcpu, vmcs12);
|
||||
/*
|
||||
* Restore L1's host state to KVM's software model. We're here
|
||||
* because a consistency check was caught by hardware, which
|
||||
* means some amount of guest state has been propagated to KVM's
|
||||
* model and needs to be unwound to the host's state.
|
||||
*/
|
||||
nested_vmx_restore_host_state(vcpu);
|
||||
|
||||
/*
|
||||
* The emulated instruction was already skipped in
|
||||
|
|
|
|||
|
|
@ -75,6 +75,7 @@
|
|||
#include <linux/blk-mq.h>
|
||||
#include "blk-rq-qos.h"
|
||||
#include "blk-stat.h"
|
||||
#include "blk.h"
|
||||
|
||||
#define DEFAULT_SCALE_COOKIE 1000000U
|
||||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue