android_kernel_sony_sdm845/include/dt-bindings/reset
Repository files (latest commit first)
Filename Latest commit message Latest commit date
Martin Blumenstingl 1a087b517c dt-bindings: reset: meson8b: fix duplicate reset IDs
commit 4881873f4cc1460f63d85fa81363d56be328ccdc upstream.

According to the public S805 datasheet the RESET2 register uses the
following bits for the PIC_DC, PSC and NAND reset lines:
- PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3)
- PSC is at bit 4 (meaning: RESET_VD_RMEM + 4)
- NAND is at bit 5 (meaning: RESET_VD_RMEM + 4)

Update the reset IDs of these three reset lines so they don't conflict
with PIC_DC and map to the actual hardware reset lines.

Fixes: 79795e20a1 ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-23 08:19:38 +01:00
..
altr,rst-mgr-a10.h dt-bindings: Add reset manager offsets for Arria10 2015-08-09 21:58:33 -05:00
altr,rst-mgr.h ARM: socfpga: dts: add reset-controller 2014-05-05 22:33:18 -05:00
amlogic,meson-gxbb-reset.h dt-bindings: reset: Add bindings for the Meson SoC Reset Controller 2016-06-01 08:21:12 +02:00
amlogic,meson8b-reset.h dt-bindings: reset: meson8b: fix duplicate reset IDs 2020-01-23 08:19:38 +01:00
gxbb-aoclkc.h dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings 2016-08-19 12:49:00 -07:00
hisi,hi6220-resets.h arm64: dts: hi6220: Add media subsystem reset dts 2016-06-29 23:39:08 +02:00
mt2701-resets.h reset: mediatek: Add MT2701 reset controller dt-binding file 2016-08-19 12:47:20 -07:00
mt8135-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
mt8173-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
pistachio-resets.h reset: img: Add Pistachio reset controller driver 2016-02-05 16:41:20 +01:00
qcom,gcc-apq8084.h clk: qcom: Add APQ8084 Global Clock Controller support 2014-07-11 13:22:00 -07:00
qcom,gcc-ipq806x.h clk: qcom: Add support for NSS/GMAC clocks and resets 2015-05-30 17:04:36 -07:00
qcom,gcc-mdm9615.h dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC 2016-08-15 15:51:18 -07:00
qcom,gcc-msm8660.h clk: qcom: Add support for MSM8660's global clock controller (GCC) 2014-01-16 12:01:05 -08:00
qcom,gcc-msm8916.h dt-bindings: Add #defines for MSM8916 clocks and resets 2015-03-23 16:09:20 -07:00
qcom,gcc-msm8960.h clk: qcom: Fully support apq8064 global clock control 2014-07-11 13:21:22 -07:00
qcom,gcc-msm8974.h clk: qcom: Add support for MSM8974's global clock controller (GCC) 2014-01-16 12:01:04 -08:00
qcom,mmcc-apq8084.h clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support 2014-07-15 16:38:57 -07:00
qcom,mmcc-msm8960.h clk: qcom: Add support for APQ8064 multimedia clocks 2014-07-15 16:39:03 -07:00
qcom,mmcc-msm8974.h clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC) 2014-01-16 12:01:05 -08:00
stih407-resets.h ARM: STi: Add DT defines for co-processor reset lines 2015-11-16 09:23:47 +01:00
stih415-resets.h ARM: STi: DT: Move reset controller constants into common location 2015-08-03 13:13:44 +02:00
stih416-resets.h ARM: STi: DT: Move reset controller constants into common location 2015-08-03 13:13:44 +02:00
sun6i-a31-ccu.h clk: sunxi-ng: Add A31/A31s clocks 2016-08-25 22:31:43 +02:00
sun8i-a23-a33-ccu.h clk: sunxi-ng: Add A33 CCU support 2016-09-10 11:41:19 +02:00
sun8i-h3-ccu.h clk: sunxi-ng: Add H3 clocks 2016-07-08 18:05:12 -07:00
tegra124-car.h clk: tegra: Add DFLL DVCO reset control for Tegra124 2015-07-16 09:32:48 +02:00
ti-syscon.h Documentation: dt: reset: Add TI syscon reset binding 2016-06-29 23:39:10 +02:00