android_kernel_sony_sdm845/drivers/pinctrl/intel
Repository files (latest commit first)
Filename Latest commit message Latest commit date
Grace Kao e965c55d4e pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler
[ Upstream commit 69388e15f5078c961b9e5319e22baea4c57deff1 ]

According to Braswell NDA Specification Update (#557593),
concurrent read accesses may result in returning 0xffffffff and write
instructions may be dropped. We have an established format for the
commit references, i.e.
cdca06e4e859 ("pinctrl: baytrail: Add missing spinlock usage in
byt_gpio_irq_handler")

Fixes: 0bd50d719b ("pinctrl: cherryview: prevent concurrent access to GPIO controllers")
Signed-off-by: Grace Kao <grace.kao@intel.com>
Reported-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-05-20 08:15:35 +02:00
..
Kconfig pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
Makefile pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
pinctrl-baytrail.c pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pins 2020-02-28 15:42:19 +01:00
pinctrl-broxton.c pinctrl: broxton: Use correct PADCFGLOCK offset 2017-02-01 08:33:12 +01:00
pinctrl-cherryview.c pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler 2020-05-20 08:15:35 +02:00
pinctrl-intel.c pinctrl: intel: Read back TX buffer state 2018-08-06 16:23:02 +02:00
pinctrl-intel.h pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00
pinctrl-merrifield.c pinctrl: intel: merrifield: Correct UART pin lists 2017-08-16 13:43:23 -07:00
pinctrl-sunrisepoint.c pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00