Message	SHA1
arch/tile: Save and restore extra user state for tilegx ... During context switch, save and restore a couple of additional bits of tilegx user state that can be persistently modified by userspace. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Chris Metcalf   commited 2010-09-15 11:16:10 -04:00	a802fc6854
arch/tile: Enable more sophisticated IRQ model for 32-bit chips. ... This model is based on the on-chip interrupt model used by the TILE-Gx next-generation hardware, and interacts much more cleanly with the Linux generic IRQ layer. The change includes modifications to the Tilera hypervisor, which are reflected in the hypervisor headers in arch/tile/include/arch/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Chris Metcalf   commited 2010-07-06 13:34:01 -04:00	fb702b942b
arch/tile: core support for Tilera 32-bit chips. ... This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Paul Mundt <lethal@linux-sh.org> Chris Metcalf   commited 2010-06-04 17:11:18 -04:00	867e359b97