These changes are specific to some driver that may be used by multiple
boards or socs. The most significant change in here is the move of the
samsung iommu code from a platform specific in-kernel interface to the
generic iommu subsystem.
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Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc driver specific updates from Olof Johansson:
"These changes are specific to some driver that may be used by multiple
boards or socs. The most significant change in here is the move of
the samsung iommu code from a platform specific in-kernel interface to
the generic iommu subsystem."
Fix up trivial conflicts in arch/arm/mach-exynos/Kconfig
* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits)
mmc: dt: Consolidate DT bindings
iommu/exynos: Add iommu driver for EXYNOS Platforms
ARM: davinci: optimize the DMA ISR
ARM: davinci: implement DEBUG_LL port choice
ARM: tegra: Add SMMU enabler in AHB
ARM: tegra: Add Tegra AHB driver
Input: pxa27x_keypad add choice to set direct_key_mask
Input: pxa27x_keypad direct key may be low active
Input: pxa27x_keypad bug fix for direct_key_mask
Input: pxa27x_keypad keep clock on as wakeup source
ARM: dt: tegra: pinmux changes for USB ULPI
ARM: tegra: add USB ULPI PHY reset GPIO to device tree
ARM: tegra: don't hard-code USB ULPI PHY reset_gpio
ARM: tegra: change pll_p_out4's rate to 24MHz
ARM: tegra: fix pclk rate
ARM: tegra: reparent sclk to pll_c_out1
ARM: tegra: Add pllc clock init table
ARM: dt: tegra cardhu: basic audio support
ARM: dt: tegra30.dtsi: Add audio-related nodes
ARM: tegra: add AUXDATA required for audio
...
* drivers/mmc:
mmc: dt: Consolidate DT bindings
Also pulls in the omap/dt-missed-3.4 branch as a dependency.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch unifies the current DT MMC bindings documentation and code,
adds generic MMC DT bindings documentation, and updates .dts files for
consistency.
[cjb: typo fixes, addition of max-frequency property]
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The association in the decice tree between PCI and MSI
using fsl,msi property was an artificial one and it does
not reflect the actual hardware.
Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diana CRACIUNauthored and Kumar Galacommited 2012-03-29 08:14:15 -05:00
Pull powerpc merge from Benjamin Herrenschmidt:
"Here's the powerpc batch for this merge window. It is going to be a
bit more nasty than usual as in touching things outside of
arch/powerpc mostly due to the big iSeriesectomy :-) We finally got
rid of the bugger (legacy iSeries support) which was a PITA to
maintain and that nobody really used anymore.
Here are some of the highlights:
- Legacy iSeries is gone. Thanks Stephen ! There's still some bits
and pieces remaining if you do a grep -ir series arch/powerpc but
they are harmless and will be removed in the next few weeks
hopefully.
- The 'fadump' functionality (Firmware Assisted Dump) replaces the
previous (equivalent) "pHyp assisted dump"... it's a rewrite of a
mechanism to get the hypervisor to do crash dumps on pSeries, the
new implementation hopefully being much more reliable. Thanks
Mahesh Salgaonkar.
- The "EEH" code (pSeries PCI error handling & recovery) got a big
spring cleaning, motivated by the need to be able to implement a
new backend for it on top of some new different type of firwmare.
The work isn't complete yet, but a good chunk of the cleanups is
there. Note that this adds a field to struct device_node which is
not very nice and which Grant objects to. I will have a patch soon
that moves that to a powerpc private data structure (hopefully
before rc1) and we'll improve things further later on (hopefully
getting rid of the need for that pointer completely). Thanks Gavin
Shan.
- I dug into our exception & interrupt handling code to improve the
way we do lazy interrupt handling (and make it work properly with
"edge" triggered interrupt sources), and while at it found & fixed
a wagon of issues in those areas, including adding support for page
fault retry & fatal signals on page faults.
- Your usual random batch of small fixes & updates, including a bunch
of new embedded boards, both Freescale and APM based ones, etc..."
I fixed up some conflicts with the generalized irq-domain changes from
Grant Likely, hopefully correctly.
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (141 commits)
powerpc/ps3: Do not adjust the wrapper load address
powerpc: Remove the rest of the legacy iSeries include files
powerpc: Remove the remaining CONFIG_PPC_ISERIES pieces
init: Remove CONFIG_PPC_ISERIES
powerpc: Remove FW_FEATURE ISERIES from arch code
tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable
powerpc/spufs: Fix double unlocks
powerpc/5200: convert mpc5200 to use of_platform_populate()
powerpc/mpc5200: add options to mpc5200_defconfig
powerpc/mpc52xx: add a4m072 board support
powerpc/mpc5200: update mpc5200_defconfig to fit for charon board
Documentation/powerpc/mpc52xx.txt: Checkpatch cleanup
powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board
powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board
MAINTAINERS: Update PowerPC 4xx tree
powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board
powerpc: document the FSL MPIC message register binding
powerpc: add support for MPIC message register API
powerpc/fsl: Added aliased MSIIR register address to MSI node in dts
powerpc/85xx: mpc8548cds - add 36-bit dts
...
Commit c55aef0e5b "powerpc/boot: Change the load address for the wrapper
to fit the kernel" adjusted the laod address if the uncompressed kernel
was too large. Ps3 does not compress the kernel and uses a different
linker script, so do not adjust the load address in that case.
fixes this build error:
powerpc64-linux-ld: section .text loaded at [0000000000e00000,0000000000e0721b] overlaps section .kernel:dtb loaded at [0000000000e00000,0000000000e0066f]
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Stephen Rothwellauthored and Benjamin Herrenschmidtcommited 2012-03-21 11:16:13 +11:00
Add DTS file for a4m072 board and add its name to the list
of the supported boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Grant Likely <grant.likely@secretlab.ca>
cc: devicetree-discuss@ozlabs.org
cc: Wolfgang Denk <wd@denx.de>
cc: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Heiko Schocherauthored and Benjamin Herrenschmidtcommited 2012-03-21 10:40:26 +11:00
The MSIIR register for each MSI bank is aliased to a different
address. The MSI node reg property was updated to contain this
address:
e.g. reg = <0x41600 0x200 0x44140 4>;
The first region contains the address and length of the MSI
register set and the second region contains the address of
the aliased MSIIR register at 0x44140.
Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diana CRACIUNauthored and Kumar Galacommited 2012-03-16 16:15:19 -05:00
Create mpc8548cds_36b.dts. Support 36-bit mode.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Zhao Chenhuiauthored and Kumar Galacommited 2012-03-16 15:58:22 -05:00
* Create mpc8548cds.dtsi
* Move lbc, soc and pci0 nodes to mpc8548cds_32b.dtsi
* Change cuImage.mpc8548cds to cuImage.mpc8548cds_32b
* Rename mpc8548cds.dts to mpc8548cds_32b.dts
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Zhao Chenhuiauthored and Kumar Galacommited 2012-03-16 15:58:21 -05:00
Remove FPGA(CADMUS) macros in code. Move it to dts.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
chenhui zhaoauthored and Kumar Galacommited 2012-03-16 15:58:21 -05:00
Correct ethernet1 and add ethernet2 and ethernet3.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Zhao Chenhuiauthored and Kumar Galacommited 2012-03-16 15:58:20 -05:00
Enable RapidIO and add rapidio and rmu nodes to dts.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
chenhui zhaoauthored and Kumar Galacommited 2012-03-16 15:58:20 -05:00
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
chenhui zhaoauthored and Kumar Galacommited 2012-03-16 15:58:20 -05:00
Fix the compatible string of sec 4.0 to match with CAAM driver according
to Documentation/devicetree/bindings/crypto/fsl-sec4.txt
Signed-off-by: Liu Shuo <shuo.liu@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Liu Shuoauthored and Kumar Galacommited 2012-03-16 14:50:44 -05:00
The mpc836x_mds platform has been broken since the commit
6fe3264945
"netdev/phy: Use mdiobus_read() so that proper locks are taken"
which caused the fsl_pq_mdio TBI autoprobe to oops. The oops
was "fixed" in commit 28d8ea2d56
"fsl_pq_mdio: Clean up tbi address configuration"
by simply removing the the autoscan code, and making tbi nodes
mandatory. Some of the newer reference platforms were updated
to have tbi nodes in 220669495b
"powerpc: Add TBI PHY node to first MDIO bus"
but the older mpc836x didn't get one and hence was just failing
with -EBUSY as follows:
fsl-pq_mdio: probe of e0102120.mdio failed with error -16
...
net eth0: Could not attach to PHY
eth0: Cannot initialize PHY, aborting.
Add a TBI node and use the 1st free address for it.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmakerauthored and Kumar Galacommited 2012-03-16 14:34:19 -05:00
Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020
processor.
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Martyn Welchauthored and Kumar Galacommited 2012-03-16 11:15:48 -05:00
P1020RDB-PC Overview
------------------
1Gbyte DDR3 SDRAM
32 Mbyte NAND flash
10 16Mbyte NOR flash
16 Mbyte SPI flash
SD connector to interface with the SD memory card
Real-time clock on I2C bus
PCIe:
- x1 PCIe slot
- x1 mini-PCIe slot
10/100/1000 BaseT Ethernet ports:
- eTSEC1, RGMII: one 10/100/1000 port using VitesseTM VSC7385 L2 switch
- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221
- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021
USB 2.0 port:
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
Dual RJ45 UART ports:
- DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Zhicheng Fanauthored and Kumar Galacommited 2012-03-16 11:03:44 -05:00
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Jia Hongtaoauthored and Kumar Galacommited 2012-03-16 10:46:33 -05:00
The Freescale P1022 has a unique pin muxing "feature" where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to memory-mapped devices like NOR flash and the pixis FPGA.
Therefore, if the DIU is going to be enabled, then memory-mapped devices on
the localbus, like NOR flash, need to be disabled.
This also means that the localbus is not a 'simple-bus' any more, so remove
that string from the compatible node.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabiauthored and Kumar Galacommited 2012-03-16 10:46:33 -05:00
Create a 32-bit address space version of p1022ds.dts. To avoid confusion,
p1022ds.dts is renamed to p1022ds_36b.dts. We also create p1022ds.dtsi
to store some common nodes.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabiauthored and Kumar Galacommited 2012-03-16 10:46:33 -05:00
The properties indicates that the hardware supports waking up via magic
packet.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Xie Xiaoboauthored and Kumar Galacommited 2012-03-16 10:46:32 -05:00
Fix typo introduced by "powerpc: Add TBI PHY node to first MDIO bus"
from Andy Fleming.
It's device_type rather than device-type, which causes the mdio probe to
fail thus making all gianfar ethernet interfaces unusable.
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Gustavo Zacariasauthored and Kumar Galacommited 2012-03-16 10:46:31 -05:00
This is here most likely since the FSL bsp. Back in the FSL bsp it was
set to 50Mhz and working. However the driver divided the SoC freq. only
by 2. According to the TRM the platform clock (which the manual refers
in its formula) is the system clock divided by two. So in the end it has
to divide by 4 and this is what the fsl-spi driver in tree is doing.
Since then the flash is not wokring I guess. After chaning the freq from
50Mhz to 40Mhz like others do then I can access the flash.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Sebastian Andrzej Siewiorauthored and Kumar Galacommited 2012-03-16 10:46:31 -05:00
It is not at 0xffa00000. According to current u-boot source the NAND
controller is always at 0xff800000 and it is either at CS0 or CS1
depending on NAND or NAND+NOR mode. In 36bit mode it is shifted to
0xfff800000 but it has always an eight there and never an A.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Sebastian Andrzej Siewiorauthored and Kumar Galacommited 2012-03-16 10:46:30 -05:00
P1025RDB Overview
------------------
1Gbyte DDR3 SDRAM
32 Mbyte NAND flash
16Mbyte NOR flash
16 Mbyte SPI flash
SD connector to interface with the SD memory card
Real-time clock on I2C bus
PCIe:
- x1 PCIe slot
- x1 mini-PCIe slot
10/100/1000 BaseT Ethernet ports:
- eTSEC1, RGMII: one 10/100/1000 port using AtherosTM AR8021
- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221
- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021
USB 2.0 port:
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
Dual RJ45 UART ports:
- DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Zhicheng Fanauthored and Kumar Galacommited 2012-03-16 10:46:29 -05:00
Add usb controller version info for the following:
MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,
P3041, P3060, P5020
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Ramneek Mehreshauthored and Kumar Galacommited 2012-03-16 10:46:13 -05:00
P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic’s GL850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Xu Jiuchengauthored and Kumar Galacommited 2012-03-16 09:44:59 -05:00
This compatible value will be used to distinguish some special features of APM821XX EMAC: no half duplex mode support, configuring jumbo frame.
Signed-off-by: Duc Dang <dhdang@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Duc Dangauthored and David S. Millercommited 2012-03-06 17:06:07 -05:00
The FreeScale PowerQUICC-III-compatible (mpc85xx/mpc86xx) MPICs do not
correctly report the number of hardware interrupt sources, so software
needs to override the detected value with "256".
To avoid needing to write custom board-specific code to detect that
scenario, allow it to be easily overridden in the device-tree.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kyle Moffettauthored and Benjamin Herrenschmidtcommited 2012-02-23 10:50:00 +11:00
The Freescale MPIC (and perhaps others in the future) is incapable of
routing non-IPI interrupts to more than once CPU at a time. Currently
all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to
mpic_alloc(), but that information should really be present in the
device-tree.
Older board code can't rely on the device-tree having the property set,
but newer platforms won't need it manually specified in the code.
[BenH: Remove unrelated changes, folded in a different patch]
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kyle Moffettauthored and Benjamin Herrenschmidtcommited 2012-02-23 10:49:59 +11:00
The MPIC code checks for a "big-endian" property and sets the flag
MPIC_BIG_ENDIAN if one is present, although prior to the "mpic->flags"
fixup that would never have worked anways.
Unfortunately, even now that it works properly, the Freescale mpic
device-node (the "PowerQUICC-III"-compatible one) does not specify it,
so all of the board ports need to manually pass it to mpic_alloc().
Document the flag and add it to the pq3 device tree. Existing code will
still need to pass the MPIC_BIG_ENDIAN flag because their dtb may not
have this property, but new platforms shouldn't need to do so.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kyle Moffettauthored and Benjamin Herrenschmidtcommited 2012-02-23 10:49:58 +11:00
Enable USB2 controller node for P1020RDB. USB2 controller is used only
when board boots from SPI or SD as it is muxed with eLBC
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Ramneek Mehreshauthored and Kumar Galacommited 2012-01-18 08:05:36 -06:00
According to latest kernel, the auto-cmd12 property should be
"sdhci,auto-cmd12", and according to the SDHC binding and the workaround for
the special chip, add the chip compatible for eSDHC: "fsl,p1022-esdhc",
"fsl,mpc8536-esdhc", "fsl,p1020-esdhc", "fsl,p2020-esdhc" and
"fsl,p1010-esdhc".
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Jerry Huangauthored and Kumar Galacommited 2012-01-18 08:01:53 -06:00
* 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:
Kbuild: Use dtc's -d (dependency) option
dtc: Implement -d option to write out a dependency file
kbuild: Fix comment in Makefile.lib
scripts/genksyms: clean lex/yacc generated files
kbuild: Correctly deal with make options which contain an "s"
This hooks dtc into Kbuild's dependency system.
Thus, for example, "make dtbs" will rebuild tegra-harmony.dtb if only
tegra20.dtsi has changed yet tegra-harmony.dts has not. The previous
lack of this feature recently caused me to have very confusing "git
bisect" results.
For ARM, it's obvious what to add to $(targets). I'm not familiar enough
with other architectures to know what to add there. Powerpc appears to
already add various .dtb files into $(targets), but the other archs may
need something added to $(targets) to work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
[mmarek: Dropped arch/c6x part to avoid merging commits from the middle
of the merge window]
Signed-off-by: Michal Marek <mmarek@suse.cz>
Stephen Warrenauthored and Michal Marekcommited 2012-01-15 00:04:35 +01:00
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (185 commits)
powerpc: fix compile error with 85xx/p1010rdb.c
powerpc: fix compile error with 85xx/p1023_rds.c
powerpc/fsl: add MSI support for the Freescale hypervisor
arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
powerpc/fsl: Add support for Integrated Flash Controller
powerpc/fsl: update compatiable on fsl 16550 uart nodes
powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defconfig
powerpc/fsl: Update defconfigs to enable some standard FSL HW features
powerpc: Add TBI PHY node to first MDIO bus
sbc834x: put full compat string in board match check
powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit
offb: Fix setting of the pseudo-palette for >8bpp
offb: Add palette hack for qemu "standard vga" framebuffer
offb: Fix bug in calculating requested vram size
powerpc/boot: Change the WARN to INFO for boot wrapper overlap message
powerpc/44x: Fix build error on currituck platform
powerpc/boot: Change the load address for the wrapper to fit the kernel
powerpc/44x: Enable CRASH_DUMP for 440x
...
Fix up a trivial conflict in arch/powerpc/include/asm/cputime.h due to
the additional sparse-checking code for cputime_t.
The Freescale serial port's are pretty much a 16550, however there are
some FSL specific bugs and features. Add a "fsl,ns16550" compatiable
string to allow code to handle those FSL specific issues.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Linus Torvalds
commited 
Arnd Bergmann
commited 
Mai La
authored and
Josh Boyer
commited 
Mingkai Hu
authored and
Kumar Gala
commited 
Diana CRACIUN
authored and
Jerry Huang
authored and
Stephen Rothwell
authored and
Benjamin Herrenschmidt
commited 
Heiko Schocher
authored and
Vinh Nguyen Huu Tuong
authored and
Zhao Chenhui
authored and
Liu Shuo
authored and
Paul Gortmaker
authored and
Martyn Welch
authored and
Zhicheng Fan
authored and
Jia Hongtao
authored and
Timur Tabi
authored and
Xie Xiaobo
authored and
Gustavo Zacarias
authored and
Sebastian Andrzej Siewior
authored and
Ramneek Mehresh
authored and
Tang Yuantian
authored and
Xu Jiucheng
authored and
Duc Dang
authored and
David S. Miller
commited 
Kyle Moffett
authored and
Stephen Warren
authored and
Michal Marek
commited