Commit graph android_kernel_sony_sdm845/arch/arm/include/asm/pgalloc.h
Message SHA1
ARM: LPAE: Page table maintenance for the 3-level format
This patch modifies the pgd/pmd/pte manipulation functions to support
the 3-level page table format. Since there is no need for an 'ext'
argument to cpu_set_pte_ext(), this patch conditionally defines a
different prototype for this function when CONFIG_ARM_LPAE.

The patch also introduces the L_PGD_SWAPPER flag to mark pgd entries
pointing to pmd tables pre-allocated in the swapper_pg_dir and avoid
trying to free them at run-time. This flag is 0 with the classic page
table format.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Catalin Marinas   commited 2011-12-08 10:30:39 +00:00
da02877987
ARM: pgtable: switch to use pgtable-nopud.h
Nick Piggin noted upon introducing 4level-fixup.h:

| Add a temporary "fallback" header so architectures can run with
| the 4level pagetables patch without modification. All architectures
| should be converted to use the folding headers (include/asm-generic/
| pgtable-nop?d.h) as soon as possible, and the fallback header removed.

This makes ARM compliant with this statement.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Russell King   authored and   Catalin Marinas   commited 2011-12-08 10:30:36 +00:00
a32618d28d
ARM: 7076/1: LPAE: Add (pte|pmd)val_t type definitions as u32
This patch defines the (pte|pmd)val_t as u32 and changes the page table
types to be based on these. The PMD bits are converted to the
corresponding type using the _AT macro.

The flush_pmd_entry/clean_pmd_entry argument was changed to (void *) to
allow them to be used with both PGD and PMD pointers and avoid code
duplication.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Catalin Marinas   authored and   Russell King   commited 2011-10-06 15:40:05 +01:00
442e70c0b3
ARM: 6757/1: fix tlb.h induced linux/swap.h build failure
Commit

	06824ba (ARM: tlb: delay page freeing for SMP and ARMv7 CPUs)

introduced a build failure for builds with CONFIG_SWAP=n:

	In file included from arch/arm/mm/init.c:27:
	arch/arm/include/asm/tlb.h: In function 'tlb_flush_mmu':
	arch/arm/include/asm/tlb.h:101: error: implicit declaration of function 'release_pages'
	arch/arm/include/asm/tlb.h: In function 'tlb_remove_page':
	arch/arm/include/asm/tlb.h:165: error: implicit declaration of function 'page_cache_release'

as linux/swap.h doesn't include linux/pagemap.h but actually needs it
(see comments in linux/swap.h as to why this is.)

Fix that by #including <linux/pagemap.h> in <asm/pgalloc.h> as it's done
by x86.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Uwe Kleine-König   authored and   Russell King   commited 2011-02-23 16:19:21 +00:00
97594b0f35
ARM: pgtable: switch order of Linux vs hardware page tables
This switches the ordering of the Linux vs hardware page tables in
each page, thereby eliminating some of the arithmetic in the page
table walks.  As we now place the Linux page table at the beginning
of the page, we can deal with the offset in the pgt by simply masking
it away, along with the other control bits.

This also makes the arithmetic all be positive, rather than a mixture.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Russell King   commited 2010-12-22 11:05:32 +00:00
d30e45eeab
ARM: pgtable: use phys_addr_t for physical addresses
Ensure that physical addresses are typed as phys_addr_t

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Russell King   commited 2010-11-26 20:45:46 +00:00
97092e0c56
ARM: pgtable: get rid of get_pgd_slow()/free_pgd_slow()
These old names are just aliases for pgd_alloc/pgd_free.  Just use the
new names.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Russell King   commited 2010-11-26 20:45:45 +00:00
b0d03745b1
ARM: implement highpte
Add the ARM implementation of highpte, which allows PTE tables to be
placed in highmem.  Unfortunately, we do not offer highpte support
when support for L2 cache is enabled.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Russell King   commited 2009-08-17 20:02:06 +01:00
65cec8e3db
[ARM] move include/asm-arm to arch/arm/include/asm
Move platform independent header files to arch/arm/include/asm, leaving
those in asm/arch* and asm/plat* alone.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Russell King   commited 2008-08-02 21:32:35 +01:00
4baa992243
Renamed from include/asm-arm/pgalloc.h (Browse further)