Commit graph android_kernel_sony_sdm845/include/asm-mips/mach-ip27
Message SHA1
[MIPS] IP27: Fix build bug due to missing include
asm-mips/mach-ip27/topology.h must #include <asm-generic/topology.h>
This fixes the following compile error:

...
  CC      kernel/sched.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c: In function 'find_next_best_node':
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7015: error: implicit declaration of function 'node_to_cpumask_ptr'
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7015: error: '__tmp__' undeclared (first use in this function)
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7015: error: (Each undeclared identifier is reported only once
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7015: error: for each function it appears in.)
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c: In function 'sched_domain_node_span':
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7047: error: 'nodemask' undeclared (first use in this function)
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7048: warning: ISO C90 forbids mixed declarations and code
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7059: error: implicit declaration of function 'node_to_cpumask_ptr_next'
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c: In function '__build_sched_domains':
/home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/sched.c:7605: error: 'pnodemask' undeclared (first use in this function)
make[2]: *** [kernel/sched.o] Error 1

<--  snip  -->

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Adrian Bunk   authored and   Ralf Baechle   commited 2008-04-28 17:14:32 +01:00
a4a8f70d2d
[MIPS] IP27: Tighten up CPU description to fix warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2008-03-12 14:14:41 +00:00
1af0eea214
[MIPS] IP27: Add missing ~ in DMA code.
Harmless since this function is not being called on I/O coherent systems
such as IP27.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2008-02-19 17:01:30 +00:00
eaf7943cc5
[MIPS] Always do the ARC64_TWIDDLE_PC thing.
Always jump to the place where the kernel is linked to. This helps where
the bootloaders/proms ignores the start address inside the ELF header.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Thomas Bogendoerfer   authored and   Ralf Baechle   commited 2007-10-18 18:11:46 +01:00
15ad838d28
[MIPS] checkfiles: Fix "need space after that ','" errors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-10-11 23:46:15 +01:00
21a151d8ca
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-10-11 23:46:09 +01:00
7bcf7717b6
[MIPS] Split up war.h
It was getting a little big, ugly and a primary source for merge conflicts.
Also the old method was a bit too forgiving in that the workaround did
default to off, so now there is an explicit #error forcing platform
maintainers to think if they should enable a workaround for a particular
platform.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-10-11 23:46:07 +01:00
baf22c1e7a
[MIPS] Remove IP27 specific structures from struct cpuinfo_mips
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-10-11 23:46:05 +01:00
cc6e8e0812
[MIPS] Disable UserLocal runtime detection on platforms which never have it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-07-20 18:57:39 +01:00
ed203dadcd
[MIPS] Disable MT runtime detection on platforms which never support MT.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-07-20 18:57:39 +01:00
798d9023e4
[MIPS] Allow generic spaces.h to be included by platform specific ones
Before this patch, when a platform needed to customize one constant in
spaces.h, they need to redefine all of them.

Now they can just redefine one constant and include the generic file
header at the end:

	#include <asm/mach-generic/spaces.h>

This patch doesn't allow to redefine CAC_BASE, IO_BASE and UNCAC_BASE
for 32 bits platforms because there's no need to do so.

This will avoid some macro duplications. It's important specially if
we'll add complex macros.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 include/asm-mips/mach-ip32/spaces.h

Franck Bui-Huu   authored and   Ralf Baechle   commited 2007-07-10 17:32:57 +01:00
09bb9ce15f
[MIPS] IP27, IP35: Fix warnings.
include/asm-mips/mach-ip27/dma-coherence.h:22: warning: 'plat_map_dma_mem' defined but not used
include/asm-mips/mach-ip27/dma-coherence.h:41: warning: 'plat_unmap_dma_mem' defined but not used
include/asm-mips/mach-ip32/dma-coherence.h:30: warning: 'plat_map_dma_mem' defined but not used
include/asm-mips/mach-ip32/dma-coherence.h:63: warning: 'plat_unmap_dma_mem' defined but not used

These functions are meant to be inlined anyway.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-03-17 01:03:24 +00:00
f1dbf8e718
[PATCH] sched: remove SMT nice
Remove the SMT-nice feature which idles sibling cpus on SMT cpus to
facilitiate nice working properly where cpu power is shared.  The idling of
cpus in the presence of runnable tasks is considered too fragile, easy to
break with outside code, and the complexity of managing this system if an
architecture comes along with many logical cores sharing cpu power will be
unworkable.

Remove the associated per_cpu_gain variable in sched_domains used only by
this code.

Also:

  The reason is that with dynticks enabled, this code breaks without yet
  further tweaks so dynticks brought on the rapid demise of this code.  So
  either we tweak this code or kill it off entirely.  It was Ingo's preference
  to kill it off.  Either way this needs to happen for 2.6.21 since dynticks
  has gone in.

Signed-off-by: Con Kolivas <kernel@kolivas.org>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Con Kolivas   authored and   Linus Torvalds   commited 2007-03-05 07:57:51 -08:00
69f7c0a1be
[MIPS] Unify dma-{coherent,noncoherent.ip27,ip32}
Platforms will now have to supply a function dma_device_is_coherent which
returns if a particular device participates in the coherence domain.  For
most platforms this function will always return 0 or 1.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2007-02-13 22:40:50 +00:00
9a88cbb522
[MIPS] IP27: Don't drag <asm/sn/arch.h> into topology.h.
Another way that old SGI types were getting dragged into generic code.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2006-12-12 01:46:24 +00:00
8b2f35504d
[MIPS] IP27: Don't include <asm/sn/arch.h>.
Nothing <asm/sn/arch.h> defines is used.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2006-12-12 01:46:24 +00:00
2f3643aecd
[PATCH] sched: introduce child field in sched_domain
Introduce the child field in sched_domain struct and use it in
sched_balance_self().

We will also use this field in cleaning up the sched group cpu_power
setup(done in a different patch) code.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Nick Piggin <nickpiggin@yahoo.com.au>
Cc: Paul Jackson <pj@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Siddha, Suresh B   authored and   Linus Torvalds   commited 2006-10-03 08:04:06 -07:00
1a84887080
[MIPS] Use the proper technical term for naming some of the cache macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2006-07-13 21:26:04 +01:00
fc5d2d279f
[MIPS] Add Missing R4K Cache Macros to IP27 & IP32
Keeping in accordance with other machines, IP27 and IP32 lack a few
macros.  IP27 lacks cpu_has_4kex & cpu_has_4k_cache macros while IP32
lacks just the cpu_has_4k_cache macro.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Kumba   authored and   Ralf Baechle   commited 2006-06-19 17:39:26 +01:00
2493921c28
[MIPS] Make I/O helpers more customizable
1. Move ioswab*() and __mem_ioswab*() to mangle-port.h.  This gets rid
   of CONFIG_SGI_IP22 from include/asm-mips/io.h.
    
2. Pass a virtual address to *ioswab*().  Then we can provide
   mach-specific *ioswab*() and can do every evil thing based on its
   argument.  It could be useful on machines which have regions with
   different endian conversion scheme.
    
3. Call __swizzle_addr*() _after_ adding mips_io_port_base.  This
   unifies the meaning of the argument of __swizzle_addr*() (always
   virtual address).  Then mach-specific __swizzle_addr*() can do every
   evil thing based on the argument.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Atsushi Nemoto   authored and   Ralf Baechle   commited 2006-03-21 13:27:45 +00:00
a8433137ea
[PATCH] scheduler cache-hot-autodetect
)

From: Ingo Molnar <mingo@elte.hu>

This is the latest version of the scheduler cache-hot-auto-tune patch.

The first problem was that detection time scaled with O(N^2), which is
unacceptable on larger SMP and NUMA systems. To solve this:

- I've added a 'domain distance' function, which is used to cache
  measurement results. Each distance is only measured once. This means
  that e.g. on NUMA distances of 0, 1 and 2 might be measured, on HT
  distances 0 and 1, and on SMP distance 0 is measured. The code walks
  the domain tree to determine the distance, so it automatically follows
  whatever hierarchy an architecture sets up. This cuts down on the boot
  time significantly and removes the O(N^2) limit. The only assumption
  is that migration costs can be expressed as a function of domain
  distance - this covers the overwhelming majority of existing systems,
  and is a good guess even for more assymetric systems.

  [ People hacking systems that have assymetries that break this
    assumption (e.g. different CPU speeds) should experiment a bit with
    the cpu_distance() function. Adding a ->migration_distance factor to
    the domain structure would be one possible solution - but lets first
    see the problem systems, if they exist at all. Lets not overdesign. ]

Another problem was that only a single cache-size was used for measuring
the cost of migration, and most architectures didnt set that variable
up. Furthermore, a single cache-size does not fit NUMA hierarchies with
L3 caches and does not fit HT setups, where different CPUs will often
have different 'effective cache sizes'. To solve this problem:

- Instead of relying on a single cache-size provided by the platform and
  sticking to it, the code now auto-detects the 'effective migration
  cost' between two measured CPUs, via iterating through a wide range of
  cachesizes. The code searches for the maximum migration cost, which
  occurs when the working set of the test-workload falls just below the
  'effective cache size'. I.e. real-life optimized search is done for
  the maximum migration cost, between two real CPUs.

  This, amongst other things, has the positive effect hat if e.g. two
  CPUs share a L2/L3 cache, a different (and accurate) migration cost
  will be found than between two CPUs on the same system that dont share
  any caches.

(The reliable measurement of migration costs is tricky - see the source
for details.)

Furthermore i've added various boot-time options to override/tune
migration behavior.

Firstly, there's a blanket override for autodetection:

	migration_cost=1000,2000,3000

will override the depth 0/1/2 values with 1msec/2msec/3msec values.

Secondly, there's a global factor that can be used to increase (or
decrease) the autodetected values:

	migration_factor=120

will increase the autodetected values by 20%. This option is useful to
tune things in a workload-dependent way - e.g. if a workload is
cache-insensitive then CPU utilization can be maximized by specifying
migration_factor=0.

I've tested the autodetection code quite extensively on x86, on 3
P3/Xeon/2MB, and the autodetected values look pretty good:

Dual Celeron (128K L2 cache):

 ---------------------
 migration cost matrix (max_cache_size: 131072, cpu: 467 MHz):
 ---------------------
           [00]    [01]
 [00]:     -     1.7(1)
 [01]:   1.7(1)    -
 ---------------------
 cacheflush times [2]: 0.0 (0) 1.7 (1784008)
 ---------------------

Here the slow memory subsystem dominates system performance, and even
though caches are small, the migration cost is 1.7 msecs.

Dual HT P4 (512K L2 cache):

 ---------------------
 migration cost matrix (max_cache_size: 524288, cpu: 2379 MHz):
 ---------------------
           [00]    [01]    [02]    [03]
 [00]:     -     0.4(1)  0.0(0)  0.4(1)
 [01]:   0.4(1)    -     0.4(1)  0.0(0)
 [02]:   0.0(0)  0.4(1)    -     0.4(1)
 [03]:   0.4(1)  0.0(0)  0.4(1)    -
 ---------------------
 cacheflush times [2]: 0.0 (33900) 0.4 (448514)
 ---------------------

Here it can be seen that there is no migration cost between two HT
siblings (CPU#0/2 and CPU#1/3 are separate physical CPUs). A fast memory
system makes inter-physical-CPU migration pretty cheap: 0.4 msecs.

8-way P3/Xeon [2MB L2 cache]:

 ---------------------
 migration cost matrix (max_cache_size: 2097152, cpu: 700 MHz):
 ---------------------
           [00]    [01]    [02]    [03]    [04]    [05]    [06]    [07]
 [00]:     -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [01]:  19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [02]:  19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [03]:  19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1)
 [04]:  19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1)
 [05]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1)
 [06]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1)
 [07]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -
 ---------------------
 cacheflush times [2]: 0.0 (0) 19.2 (19281756)
 ---------------------

This one has huge caches and a relatively slow memory subsystem - so the
migration cost is 19 msecs.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Cc: <wilder@us.ibm.com>
Signed-off-by: John Hawkes <hawkes@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

akpm@osdl.org   authored and   Linus Torvalds   commited 2006-01-12 09:08:50 -08:00
198e2f1811
MIPS: Introduce machinery for testing for MIPSxxR1/2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   authored and     commited 2006-01-10 13:39:06 +00:00
b4672d3729
Fix ARCH_KMALLOC_MINALIGN values on MIPS
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2005-10-29 19:32:30 +01:00
0015365cc6
Define pcibus_to_node() for IP27.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2005-10-29 19:32:21 +01:00
9dbdfce85c
Move Origin crapola into a machine-specific header file.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2005-10-29 19:31:52 +01:00
7e35952baa
Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2005-10-29 19:31:17 +01:00
e50c0a8fa6
HUB interrupts are allocated per node, not per slice. Make
manipulation of the interrupt mask register atomic by disabling
interrupts.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2005-10-29 19:30:59 +01:00
7c2740f1c1
Define MAP_BASE for IP27
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Ralf Baechle   commited 2005-10-29 19:30:42 +01:00
1f82bdb11b
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

Linus Torvalds   commited 2005-04-16 15:20:36 -07:00
1da177e4c3