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Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Ralf Baechle
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39b8d52542 | |
It is not being used by Malta and shouldn't be needed for MIPSsim.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Chris Dearman
authored and
Ralf Baechle
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0bfa130e74 | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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87353d8ac3 | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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0ab7aefc4d | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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49a89efbbb | |
MIPS doesn't do CPU hotplugging yet but since many of the functions don't even have an __init let's fix this right. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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428ab280a0 | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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8c976e3451 | |
Support for performance counter overflow interrupt that is on a separate interrupt from the timer. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Chris Dearman
authored and
Ralf Baechle
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ffe9ee4709 | |
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make
them customizable. This will save a few cycle on each CPU interrupt.
A good side effect is removing some dependencies to MALTA in generic
SMTC code.
Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it. So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
Testing this patch on those platforms is greatly appreciated. Thank
you.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Atsushi Nemoto
authored and
Ralf Baechle
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97dcb82de6 | |
Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Atsushi Nemoto
authored and
Ralf Baechle
commited |
1417836e81 | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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70e46f48cb | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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781b0f8d4f | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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937a801576 | |
Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an immediate exception when starting the second VPE. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Chris Dearman
authored and
Ralf Baechle
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847b9dfcca | |
Use the new IRQF_ constants and remove the SA_INTERRUPT define Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org> 
Thomas Gleixner
authored and
 Linus Torvalds
commited |
f40298fddc | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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f088fc84f9 | |
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle
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41c594ab65 |
Renamed from arch/mips/kernel/smp_mt.c (Browse further)