PCI: replace struct pci_bus secondary/subordinate with busn_res
Replace the struct pci_bus secondary/subordinate members with the struct resource busn_res. Later we'll build a resource tree of these bus numbers. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
92f0243093
commit
b918c62e08
31 changed files with 117 additions and 117 deletions
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@ -359,7 +359,7 @@ common_init_pci(void)
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hose, &resources);
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hose->bus = bus;
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hose->need_domain_info = need_domain_info;
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next_busno = bus->subordinate + 1;
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next_busno = bus->busn_res.end + 1;
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/* Don't allow 8-bit bus number overflow inside the hose -
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reserve some space for bridges. */
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if (next_busno > 224) {
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@ -461,7 +461,7 @@ static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head)
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if (!sys->bus)
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panic("PCI: unable to scan bus!");
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busnr = sys->bus->subordinate + 1;
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busnr = sys->bus->busn_res.end + 1;
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list_add(&sys->node, head);
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} else {
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@ -384,7 +384,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
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return NULL;
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}
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pbus->subordinate = pci_scan_child_bus(pbus);
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pbus->busn_res.end = pci_scan_child_bus(pbus);
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return pbus;
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out3:
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@ -1506,10 +1506,10 @@ static void __devinit pcibios_scan_phb(struct pci_controller *hose)
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pci_free_resource_list(&resources);
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return;
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}
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bus->secondary = hose->first_busno;
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bus->busn_res.start = hose->first_busno;
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hose->bus = bus;
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hose->last_busno = bus->subordinate;
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hose->last_busno = bus->busn_res.end;
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}
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static int __init pcibios_init(void)
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@ -102,7 +102,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
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need_domain_info = need_domain_info || hose->index;
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hose->need_domain_info = need_domain_info;
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if (bus) {
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next_busno = bus->subordinate + 1;
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next_busno = bus->busn_res.end + 1;
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/* Don't allow 8-bit bus number overflow inside the hose -
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reserve some space for bridges. */
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if (next_busno > 224) {
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@ -1646,7 +1646,7 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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pci_free_resource_list(&resources);
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return;
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}
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bus->secondary = hose->first_busno;
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bus->busn_res.start = hose->first_busno;
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hose->bus = bus;
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/* Get probe mode and perform scan */
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@ -1655,12 +1655,12 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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mode = ppc_md.pci_probe_mode(bus);
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pr_debug(" probe mode: %d\n", mode);
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if (mode == PCI_PROBE_DEVTREE) {
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bus->subordinate = hose->last_busno;
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bus->busn_res.end = hose->last_busno;
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of_scan_bus(node, bus);
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}
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if (mode == PCI_PROBE_NORMAL)
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hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
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hose->last_busno = bus->busn_res.end = pci_scan_child_bus(bus);
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/* Platform gets a chance to do some global fixups before
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* we proceed to resource allocation
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@ -236,7 +236,7 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
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for (ln = pci_root_buses.next; ln != &pci_root_buses; ln = ln->next) {
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bus = pci_bus_b(ln);
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if (in_bus >= bus->number && in_bus <= bus->subordinate)
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if (in_bus >= bus->number && in_bus <= bus->busn_res.end)
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break;
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bus = NULL;
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}
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@ -240,7 +240,7 @@ void __devinit of_scan_pci_bridge(struct pci_dev *dev)
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}
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bus->primary = dev->bus->number;
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bus->subordinate = busrange[1];
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bus->busn_res.end = busrange[1];
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bus->bridge_ctl = 0;
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/* parse ranges property */
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@ -589,7 +589,7 @@ static int __devinit pnv_ioda_configure_pe(struct pnv_phb *phb,
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dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER;
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fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER;
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parent = pe->pbus->self;
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count = pe->pbus->subordinate - pe->pbus->secondary + 1;
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count = pe->pbus->busn_res.end - pe->pbus->busn_res.start + 1;
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switch(count) {
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case 1: bcomp = OpalPciBusAll; break;
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case 2: bcomp = OpalPciBus7Bits; break;
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@ -816,11 +816,11 @@ static void __devinit pnv_ioda_setup_bus_PE(struct pci_dev *dev,
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pe->pdev = NULL;
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pe->tce32_seg = -1;
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pe->mve_number = -1;
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pe->rid = bus->secondary << 8;
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pe->rid = bus->busn_res.start << 8;
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pe->dma_weight = 0;
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pe_info(pe, "Secondary busses %d..%d associated with PE\n",
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bus->secondary, bus->subordinate);
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pe_info(pe, "Secondary busses %pR associated with PE\n",
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&bus->busn_res);
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if (pnv_ioda_configure_pe(phb, pe)) {
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/* XXX What do we do here ? */
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@ -121,7 +121,7 @@ void pcibios_add_pci_devices(struct pci_bus * bus)
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if (!num)
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return;
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pcibios_setup_bus_devices(bus);
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max = bus->secondary;
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max = bus->busn_res.start;
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for (pass=0; pass < 2; pass++)
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list_for_each_entry(dev, &bus->devices, bus_list) {
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if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
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@ -59,7 +59,7 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
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need_domain_info = need_domain_info || hose->index;
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hose->need_domain_info = need_domain_info;
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if (bus) {
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next_busno = bus->subordinate + 1;
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next_busno = bus->busn_res.end + 1;
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/* Don't allow 8-bit bus number overflow inside the hose -
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reserve some space for bridges. */
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if (next_busno > 224) {
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@ -535,7 +535,7 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
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}
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bus->primary = dev->bus->number;
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bus->subordinate = busrange[1];
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bus->busn_res.end = busrange[1];
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bus->bridge_ctl = 0;
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/* parse ranges property, or cook one up by hand for Simba */
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@ -693,8 +693,8 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
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pci_free_resource_list(&resources);
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return NULL;
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}
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bus->secondary = pbm->pci_first_busno;
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bus->subordinate = pbm->pci_last_busno;
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bus->busn_res.start = pbm->pci_first_busno;
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bus->busn_res.end = pbm->pci_last_busno;
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pci_of_scan_bus(pbm, node, bus);
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pci_bus_add_devices(bus);
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@ -329,7 +329,7 @@ int __init pcibios_init(void)
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*/
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bus = pci_scan_bus(0, controller->ops, controller);
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controller->root_bus = bus;
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controller->last_busno = bus->subordinate;
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controller->last_busno = bus->busn_res.end;
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}
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}
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@ -366,7 +366,7 @@ int __init pcibios_init(void)
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*/
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI &&
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(PCI_SLOT(dev->devfn) == 0)) {
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next_bus = dev->subordinate;
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next_bus = dev->busn_res.end;
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controllers[i].mem_resources[0] =
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*next_bus->resource[0];
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controllers[i].mem_resources[1] =
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@ -440,7 +440,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
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bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd,
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&resources);
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if (bus) {
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bus->subordinate = pci_scan_child_bus(bus);
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bus->busn_res.end = pci_scan_child_bus(bus);
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pci_set_host_bridge_release(
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to_pci_host_bridge(bus->bridge),
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release_pci_root_info, info);
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@ -187,7 +187,7 @@ static int __init pcibios_init(void)
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bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
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pci_ctrl->ops, pci_ctrl, &resources);
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pci_ctrl->bus = bus;
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pci_ctrl->last_busno = bus->subordinate;
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pci_ctrl->last_busno = bus->busn_res.end;
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if (next_busno <= pci_ctrl->last_busno)
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next_busno = pci_ctrl->last_busno+1;
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}
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@ -661,7 +661,7 @@ static struct intel_iommu *device_to_iommu(int segment, u8 bus, u8 devfn)
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if (drhd->devices[i] &&
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drhd->devices[i]->subordinate &&
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drhd->devices[i]->subordinate->number <= bus &&
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drhd->devices[i]->subordinate->subordinate >= bus)
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drhd->devices[i]->subordinate->busn_res.end >= bus)
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return drhd->iommu;
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}
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@ -14168,7 +14168,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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if (bridge->subordinate &&
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(bridge->subordinate->number <=
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tp->pdev->bus->number) &&
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(bridge->subordinate->subordinate >=
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(bridge->subordinate->busn_res.end >=
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tp->pdev->bus->number)) {
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tg3_flag_set(tp, 5701_DMA_BUG);
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pci_dev_put(bridge);
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@ -14196,7 +14196,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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if (bridge && bridge->subordinate &&
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(bridge->subordinate->number <=
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tp->pdev->bus->number) &&
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(bridge->subordinate->subordinate >=
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(bridge->subordinate->busn_res.end >=
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tp->pdev->bus->number)) {
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tg3_flag_set(tp, 40BIT_DMA_BUG);
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pci_dev_put(bridge);
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@ -174,7 +174,7 @@ static int dino_cfg_read(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 *val)
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{
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struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge));
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary;
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
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u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3);
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void __iomem *base_addr = d->hba.base_addr;
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unsigned long flags;
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@ -209,7 +209,7 @@ static int dino_cfg_write(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 val)
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{
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struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge));
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary;
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
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u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3);
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void __iomem *base_addr = d->hba.base_addr;
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unsigned long flags;
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@ -554,7 +554,7 @@ dino_fixup_bus(struct pci_bus *bus)
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struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
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DBG(KERN_WARNING "%s(0x%p) bus %d platform_data 0x%p\n",
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__func__, bus, bus->secondary,
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__func__, bus, bus->busn_res.start,
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bus->bridge->platform_data);
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/* Firmware doesn't set up card-mode dino, so we have to */
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@ -998,12 +998,12 @@ static int __init dino_probe(struct parisc_device *dev)
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return 0;
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}
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bus->subordinate = pci_scan_child_bus(bus);
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bus->busn_res.end = pci_scan_child_bus(bus);
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/* This code *depends* on scanning being single threaded
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* if it isn't, this global bus number count will fail
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*/
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dino_current_bus = bus->subordinate + 1;
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dino_current_bus = bus->busn_res.end + 1;
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pci_bus_assign_resources(bus);
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pci_bus_add_devices(bus);
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return 0;
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@ -532,7 +532,7 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev)
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intr_slot = PCI_SLOT(pcidev->devfn);
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}
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DBG_IRT("iosapic_xlate_pin: bus %d slot %d pin %d\n",
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pcidev->bus->secondary, intr_slot, intr_pin);
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pcidev->bus->busn_res.start, intr_slot, intr_pin);
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return irt_find_irqline(isi, intr_slot, intr_pin);
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}
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@ -189,8 +189,8 @@ lba_dump_res(struct resource *r, int d)
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static int lba_device_present(u8 bus, u8 dfn, struct lba_device *d)
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{
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u8 first_bus = d->hba.hba_bus->secondary;
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u8 last_sub_bus = d->hba.hba_bus->subordinate;
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u8 first_bus = d->hba.hba_bus->busn_res.start;
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u8 last_sub_bus = d->hba.hba_bus->busn_res.end;
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if ((bus < first_bus) ||
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(bus > last_sub_bus) ||
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@ -364,7 +364,7 @@ lba_rd_cfg(struct lba_device *d, u32 tok, u8 reg, u32 size)
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static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int size, u32 *data)
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{
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struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge));
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary;
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
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u32 tok = LBA_CFG_TOK(local_bus, devfn);
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void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA;
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@ -380,7 +380,7 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
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return 0;
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}
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if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->secondary, devfn, d)) {
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if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->busn_res.start, devfn, d)) {
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DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __func__, tok, pos);
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/* either don't want to look or know device isn't present. */
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*data = ~0U;
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@ -431,7 +431,7 @@ lba_wr_cfg(struct lba_device *d, u32 tok, u8 reg, u32 data, u32 size)
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static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int size, u32 data)
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{
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struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge));
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary;
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
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u32 tok = LBA_CFG_TOK(local_bus,devfn);
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if ((pos > 255) || (devfn > 255))
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@ -444,7 +444,7 @@ static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int
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return 0;
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}
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if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->secondary, devfn, d))) {
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if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->busn_res.start, devfn, d))) {
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DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __func__, tok, pos,data);
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return 1; /* New Workaround */
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}
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@ -481,7 +481,7 @@ static struct pci_ops elroy_cfg_ops = {
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static int mercury_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int size, u32 *data)
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{
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struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge));
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary;
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
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u32 tok = LBA_CFG_TOK(local_bus, devfn);
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void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA;
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@ -514,7 +514,7 @@ static int mercury_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, i
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{
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struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge));
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void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA;
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary;
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u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
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u32 tok = LBA_CFG_TOK(local_bus,devfn);
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if ((pos > 255) || (devfn > 255))
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@ -636,7 +636,7 @@ lba_fixup_bus(struct pci_bus *bus)
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struct lba_device *ldev = LBA_DEV(parisc_walk_tree(bus->bridge));
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DBG("lba_fixup_bus(0x%p) bus %d platform_data 0x%p\n",
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||||
bus, bus->secondary, bus->bridge->platform_data);
|
||||
bus, (int)bus->busn_res.start, bus->bridge->platform_data);
|
||||
|
||||
/*
|
||||
** Properly Setup MMIO resources for this bus.
|
||||
|
|
@ -1511,7 +1511,7 @@ lba_driver_probe(struct parisc_device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
lba_bus->subordinate = pci_scan_child_bus(lba_bus);
|
||||
lba_bus->busn_res.end = pci_scan_child_bus(lba_bus);
|
||||
|
||||
/* This is in lieu of calling pci_assign_unassigned_resources() */
|
||||
if (is_pdc_pat()) {
|
||||
|
|
@ -1541,7 +1541,7 @@ lba_driver_probe(struct parisc_device *dev)
|
|||
lba_dev->flags |= LBA_FLAG_SKIP_PROBE;
|
||||
}
|
||||
|
||||
lba_next_bus = lba_bus->subordinate + 1;
|
||||
lba_next_bus = lba_res->busn_res.end + 1;
|
||||
pci_bus_add_devices(lba_bus);
|
||||
|
||||
/* Whew! Finally done! Tell services we got this one covered. */
|
||||
|
|
|
|||
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Reference in a new issue