SCSI for-linus on 20141007
This patch set consists of the usual driver updates (megaraid_sas, arcmsr, be2iscsi, lpfc, mpt2sas, mpt3sas, qla2xxx, ufs) plus several assorted fixes and miscellaneous updates (including the pci_msix_enable_range() changes that have been pending for a while). Signed-off-by: James Bottomley <JBottomley@Parallels.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJUNHvtAAoJEDeqqVYsXL0MzaoIAJ/R2JW/Xm50rD6iUj6RfjEc 6OOi3sOJe6yivPFLLTmIZyLcgHuZKPVXsjcjBXENsrjJeyu2aTq+vs2bOJN9BRYU gHGyAEhVPKsvecYhEj/78ClRIMzwkr7KQMQConbClDa0sVr62M/dPQVHNvjaTDeS rtmPGZbNpv9rCl0itNBLMrnOBT/MduuWtS2VNCAkV5yFU8kvEax5pizB+W4ztjoe BnVnF8OJC70wAM4vpiUcgwCR5AGmYv5SQKn3AHNBayrJic0MLUSIhrnCptc9TSir zWJAyoW2iQY1LKmihjwjDlXP40jbfOaBacEycqTUKNkfMRKbBl3qQa4IUrR1XsQ= =I1Yg -----END PGP SIGNATURE----- Merge tag 'scsi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI updates from James Bottomley: "This patch set consists of the usual driver updates (megaraid_sas, arcmsr, be2iscsi, lpfc, mpt2sas, mpt3sas, qla2xxx, ufs) plus several assorted fixes and miscellaneous updates (including the pci_msix_enable_range() changes that have been pending for a while)" * tag 'scsi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (202 commits) scsi: add a CONFIG_SCSI_MQ_DEFAULT option ufs: definitions for phy interface ufs: tune bkops while power managment events ufs: Add support for clock scaling using devfreq framework ufs: Add freq-table-hz property for UFS device ufs: Add support for clock gating ufs: refactor configuring power mode ufs: add UFS power management support ufs: introduce well known logical unit in ufs ufs: manually add well known logical units ufs: Active Power Mode - configuring bActiveICCLevel ufs: improve init sequence ufs: refactor query descriptor API support ufs: add voting support for host controller power ufs: Add clock initialization support ufs: Add regulator enable support ufs: Allow vendor specific initialization scsi: don't add scsi_device if its already visible scsi: fix the type for well known LUs scsi: fix comment in struct Scsi_Host definition ...
This commit is contained in:
Linus Torvalds
commit
9a50aaefc1
142 changed files with 10375 additions and 3031 deletions
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|
@ -8,9 +8,50 @@ Required properties:
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- interrupts : <interrupt mapping for UFS host controller IRQ>
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- reg : <registers mapping>
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Optional properties:
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- vdd-hba-supply : phandle to UFS host controller supply regulator node
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- vcc-supply : phandle to VCC supply regulator node
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- vccq-supply : phandle to VCCQ supply regulator node
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- vccq2-supply : phandle to VCCQ2 supply regulator node
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- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V
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or 2.7-3.6V. This boolean property when set, specifies
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to use low voltage range of 1.7-1.95V. Note for external
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UFS cards this property is invalid and valid VCC range is
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always 2.7-3.6V.
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- vcc-max-microamp : specifies max. load that can be drawn from vcc supply
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- vccq-max-microamp : specifies max. load that can be drawn from vccq supply
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- vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply
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- <name>-fixed-regulator : boolean property specifying that <name>-supply is a fixed regulator
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- clocks : List of phandle and clock specifier pairs
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- clock-names : List of clock input name strings sorted in the same
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order as the clocks property.
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- freq-table-hz : Array of <min max> operating frequencies stored in the same
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order as the clocks property. If this property is not
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defined or a value in the array is "0" then it is assumed
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that the frequency is set by the parent clock or a
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fixed rate clock source.
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Note: If above properties are not defined it can be assumed that the supply
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regulators or clocks are always on.
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Example:
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ufshc@0xfc598000 {
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compatible = "jedec,ufs-1.1";
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reg = <0xfc598000 0x800>;
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interrupts = <0 28 0>;
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vdd-hba-supply = <&xxx_reg0>;
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vdd-hba-fixed-regulator;
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vcc-supply = <&xxx_reg1>;
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vcc-supply-1p8;
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vccq-supply = <&xxx_reg2>;
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vccq2-supply = <&xxx_reg3>;
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vcc-max-microamp = 500000;
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vccq-max-microamp = 200000;
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vccq2-max-microamp = 200000;
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clocks = <&core 0>, <&ref 0>, <&iface 0>;
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clock-names = "core_clk", "ref_clk", "iface_clk";
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freq-table-hz = <100000000 200000000>, <0 0>, <0 0>;
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};
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@ -1,3 +1,17 @@
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Release Date : Thu. Jun 19, 2014 17:00:00 PST 2014 -
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(emaild-id:megaraidlinux@lsi.com)
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Adam Radford
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Kashyap Desai
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Sumit Saxena
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Uday Lingala
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Current Version : 06.803.02.00-rc1
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Old Version : 06.803.01.00-rc1
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1. Fix reset_mutex leak in megasas_reset_fusion().
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2. Remove unused variables in megasas_instance.
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3. Fix LD/VF affiliation parsing.
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4. Add missing initial call to megasas_get_ld_vf_affiliation().
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5. Version and Changelog update.
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-------------------------------------------------------------------------------
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Release Date : Mon. Mar 10, 2014 17:00:00 PST 2014 -
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(emaild-id:megaraidlinux@lsi.com)
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Adam Radford
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@ -1400,7 +1400,6 @@ mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
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* @vendor: pci vendor id
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* @device: pci device id
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* @revision: pci revision id
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* @prod_name: string returned
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*
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* Returns product string displayed when driver loads,
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* in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
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@ -3172,12 +3171,7 @@ GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
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facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
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}
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sz = facts->FWImageSize;
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if ( sz & 0x01 )
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sz += 1;
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if ( sz & 0x02 )
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sz += 2;
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facts->FWImageSize = sz;
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facts->FWImageSize = ALIGN(facts->FWImageSize, 4);
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if (!facts->RequestFrameSize) {
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/* Something is wrong! */
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@ -1741,12 +1741,7 @@ mptctl_replace_fw (unsigned long arg)
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/* Allocate memory for the new FW image
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*/
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newFwSize = karg.newImageSize;
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if (newFwSize & 0x01)
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newFwSize += 1;
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if (newFwSize & 0x02)
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newFwSize += 2;
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newFwSize = ALIGN(karg.newImageSize, 4);
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mpt_alloc_fw_memory(ioc, newFwSize);
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if (ioc->cached_fw == NULL)
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@ -1419,6 +1419,11 @@ mptspi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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goto out_mptspi_probe;
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}
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/* VMWare emulation doesn't properly implement WRITE_SAME
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*/
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if (pdev->subsystem_vendor == 0x15AD)
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sh->no_write_same = 1;
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spin_lock_irqsave(&ioc->FreeQlock, flags);
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/* Attach the SCSI Host to the IOC structure
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@ -45,6 +45,17 @@ config SCSI_NETLINK
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default n
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depends on NET
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config SCSI_MQ_DEFAULT
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bool "SCSI: use blk-mq I/O path by default"
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depends on SCSI
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---help---
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This option enables the new blk-mq based I/O path for SCSI
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devices by default. With the option the scsi_mod.use_blk_mq
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module/boot option defaults to Y, without it to N, but it can
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still be overriden either way.
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If unsure say N.
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config SCSI_PROC_FS
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bool "legacy /proc/scsi/ support"
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depends on SCSI && PROC_FS
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@ -1152,6 +1152,7 @@ static int aac_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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shost->irq = pdev->irq;
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shost->unique_id = unique_id;
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shost->max_cmd_len = 16;
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shost->use_cmd_list = 1;
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aac = (struct aac_dev *)shost->hostdata;
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aac->base_start = pci_resource_start(pdev, 0);
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@ -45,13 +45,14 @@
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#include <linux/interrupt.h>
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struct device_attribute;
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/*The limit of outstanding scsi command that firmware can handle*/
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#define ARCMSR_MAX_OUTSTANDING_CMD 256
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#ifdef CONFIG_XEN
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#define ARCMSR_MAX_FREECCB_NUM 160
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#define ARCMSR_MAX_OUTSTANDING_CMD 155
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#else
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#define ARCMSR_MAX_FREECCB_NUM 320
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#define ARCMSR_MAX_OUTSTANDING_CMD 255
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#endif
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#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2010/08/05"
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#define ARCMSR_DRIVER_VERSION "v1.30.00.04-20140919"
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#define ARCMSR_SCSI_INITIATOR_ID 255
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#define ARCMSR_MAX_XFER_SECTORS 512
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#define ARCMSR_MAX_XFER_SECTORS_B 4096
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@ -62,11 +63,17 @@ struct device_attribute;
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#define ARCMSR_MAX_QBUFFER 4096
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#define ARCMSR_DEFAULT_SG_ENTRIES 38
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#define ARCMSR_MAX_HBB_POSTQUEUE 264
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#define ARCMSR_MAX_ARC1214_POSTQUEUE 256
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#define ARCMSR_MAX_ARC1214_DONEQUEUE 257
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#define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */
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#define ARCMSR_CDB_SG_PAGE_LENGTH 256
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#define ARCMST_NUM_MSIX_VECTORS 4
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#ifndef PCI_DEVICE_ID_ARECA_1880
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#define PCI_DEVICE_ID_ARECA_1880 0x1880
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#endif
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#ifndef PCI_DEVICE_ID_ARECA_1214
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#define PCI_DEVICE_ID_ARECA_1214 0x1214
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#endif
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/*
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**********************************************************************************
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**
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@ -100,10 +107,11 @@ struct CMD_MESSAGE
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** IOP Message Transfer Data for user space
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*******************************************************************************
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*/
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#define ARCMSR_API_DATA_BUFLEN 1032
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struct CMD_MESSAGE_FIELD
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{
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struct CMD_MESSAGE cmdmessage;
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uint8_t messagedatabuffer[1032];
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uint8_t messagedatabuffer[ARCMSR_API_DATA_BUFLEN];
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};
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/* IOP message transfer */
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#define ARCMSR_MESSAGE_FAIL 0x0001
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@ -337,6 +345,56 @@ struct FIRMWARE_INFO
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#define ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK 0x80000000
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/*
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*******************************************************************************
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** SPEC. for Areca Type D adapter
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*******************************************************************************
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*/
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#define ARCMSR_ARC1214_CHIP_ID 0x00004
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#define ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION 0x00008
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#define ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK 0x00034
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#define ARCMSR_ARC1214_SAMPLE_RESET 0x00100
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#define ARCMSR_ARC1214_RESET_REQUEST 0x00108
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#define ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS 0x00200
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#define ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE 0x0020C
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#define ARCMSR_ARC1214_INBOUND_MESSAGE0 0x00400
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#define ARCMSR_ARC1214_INBOUND_MESSAGE1 0x00404
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#define ARCMSR_ARC1214_OUTBOUND_MESSAGE0 0x00420
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#define ARCMSR_ARC1214_OUTBOUND_MESSAGE1 0x00424
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#define ARCMSR_ARC1214_INBOUND_DOORBELL 0x00460
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#define ARCMSR_ARC1214_OUTBOUND_DOORBELL 0x00480
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#define ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE 0x00484
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#define ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW 0x01000
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#define ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH 0x01004
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#define ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER 0x01018
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#define ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW 0x01060
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#define ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH 0x01064
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#define ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER 0x0106C
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#define ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER 0x01070
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#define ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE 0x01088
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#define ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE 0x0108C
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#define ARCMSR_ARC1214_MESSAGE_WBUFFER 0x02000
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#define ARCMSR_ARC1214_MESSAGE_RBUFFER 0x02100
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#define ARCMSR_ARC1214_MESSAGE_RWBUFFER 0x02200
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/* Host Interrupt Mask */
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#define ARCMSR_ARC1214_ALL_INT_ENABLE 0x00001010
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#define ARCMSR_ARC1214_ALL_INT_DISABLE 0x00000000
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/* Host Interrupt Status */
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#define ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR 0x00001000
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#define ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR 0x00000010
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/* DoorBell*/
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#define ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY 0x00000001
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#define ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ 0x00000002
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/*inbound message 0 ready*/
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#define ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK 0x00000001
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/*outbound DATA WRITE isr door bell clear*/
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#define ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK 0x00000002
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/*outbound message 0 ready*/
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#define ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE 0x02000000
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/*outbound message cmd isr door bell clear*/
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/*ARCMSR_HBAMU_MESSAGE_FIRMWARE_OK*/
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#define ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK 0x80000000
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#define ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR 0x00000001
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/*
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*******************************************************************************
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** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504)
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||||
*******************************************************************************
|
||||
*/
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||||
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@ -357,7 +415,7 @@ struct ARCMSR_CDB
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#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10
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|
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uint8_t msgPages;
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||||
uint32_t Context;
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uint32_t msgContext;
|
||||
uint32_t DataLength;
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||||
uint8_t Cdb[16];
|
||||
uint8_t DeviceStatus;
|
||||
|
|
@ -494,6 +552,56 @@ struct MessageUnit_C{
|
|||
uint32_t msgcode_rwbuffer[256]; /*2200 23FF*/
|
||||
};
|
||||
/*
|
||||
*********************************************************************
|
||||
** Messaging Unit (MU) of Type D processor
|
||||
*********************************************************************
|
||||
*/
|
||||
struct InBound_SRB {
|
||||
uint32_t addressLow; /* pointer to SRB block */
|
||||
uint32_t addressHigh;
|
||||
uint32_t length; /* in DWORDs */
|
||||
uint32_t reserved0;
|
||||
};
|
||||
|
||||
struct OutBound_SRB {
|
||||
uint32_t addressLow; /* pointer to SRB block */
|
||||
uint32_t addressHigh;
|
||||
};
|
||||
|
||||
struct MessageUnit_D {
|
||||
struct InBound_SRB post_qbuffer[ARCMSR_MAX_ARC1214_POSTQUEUE];
|
||||
volatile struct OutBound_SRB
|
||||
done_qbuffer[ARCMSR_MAX_ARC1214_DONEQUEUE];
|
||||
u16 postq_index;
|
||||
volatile u16 doneq_index;
|
||||
u32 __iomem *chip_id; /* 0x00004 */
|
||||
u32 __iomem *cpu_mem_config; /* 0x00008 */
|
||||
u32 __iomem *i2o_host_interrupt_mask; /* 0x00034 */
|
||||
u32 __iomem *sample_at_reset; /* 0x00100 */
|
||||
u32 __iomem *reset_request; /* 0x00108 */
|
||||
u32 __iomem *host_int_status; /* 0x00200 */
|
||||
u32 __iomem *pcief0_int_enable; /* 0x0020C */
|
||||
u32 __iomem *inbound_msgaddr0; /* 0x00400 */
|
||||
u32 __iomem *inbound_msgaddr1; /* 0x00404 */
|
||||
u32 __iomem *outbound_msgaddr0; /* 0x00420 */
|
||||
u32 __iomem *outbound_msgaddr1; /* 0x00424 */
|
||||
u32 __iomem *inbound_doorbell; /* 0x00460 */
|
||||
u32 __iomem *outbound_doorbell; /* 0x00480 */
|
||||
u32 __iomem *outbound_doorbell_enable; /* 0x00484 */
|
||||
u32 __iomem *inboundlist_base_low; /* 0x01000 */
|
||||
u32 __iomem *inboundlist_base_high; /* 0x01004 */
|
||||
u32 __iomem *inboundlist_write_pointer; /* 0x01018 */
|
||||
u32 __iomem *outboundlist_base_low; /* 0x01060 */
|
||||
u32 __iomem *outboundlist_base_high; /* 0x01064 */
|
||||
u32 __iomem *outboundlist_copy_pointer; /* 0x0106C */
|
||||
u32 __iomem *outboundlist_read_pointer; /* 0x01070 0x01072 */
|
||||
u32 __iomem *outboundlist_interrupt_cause; /* 0x1088 */
|
||||
u32 __iomem *outboundlist_interrupt_enable; /* 0x108C */
|
||||
u32 __iomem *message_wbuffer; /* 0x2000 */
|
||||
u32 __iomem *message_rbuffer; /* 0x2100 */
|
||||
u32 __iomem *msgcode_rwbuffer; /* 0x2200 */
|
||||
};
|
||||
/*
|
||||
*******************************************************************************
|
||||
** Adapter Control Block
|
||||
*******************************************************************************
|
||||
|
|
@ -505,19 +613,26 @@ struct AdapterControlBlock
|
|||
#define ACB_ADAPTER_TYPE_B 0x00000002 /* hbb M IOP */
|
||||
#define ACB_ADAPTER_TYPE_C 0x00000004 /* hbc P IOP */
|
||||
#define ACB_ADAPTER_TYPE_D 0x00000008 /* hbd A IOP */
|
||||
u32 roundup_ccbsize;
|
||||
struct pci_dev * pdev;
|
||||
struct Scsi_Host * host;
|
||||
unsigned long vir2phy_offset;
|
||||
struct msix_entry entries[ARCMST_NUM_MSIX_VECTORS];
|
||||
/* Offset is used in making arc cdb physical to virtual calculations */
|
||||
uint32_t outbound_int_enable;
|
||||
uint32_t cdb_phyaddr_hi32;
|
||||
uint32_t reg_mu_acc_handle0;
|
||||
spinlock_t eh_lock;
|
||||
spinlock_t ccblist_lock;
|
||||
spinlock_t postq_lock;
|
||||
spinlock_t doneq_lock;
|
||||
spinlock_t rqbuffer_lock;
|
||||
spinlock_t wqbuffer_lock;
|
||||
union {
|
||||
struct MessageUnit_A __iomem *pmuA;
|
||||
struct MessageUnit_B *pmuB;
|
||||
struct MessageUnit_C __iomem *pmuC;
|
||||
struct MessageUnit_D *pmuD;
|
||||
};
|
||||
/* message unit ATU inbound base address0 */
|
||||
void __iomem *mem_base0;
|
||||
|
|
@ -544,6 +659,8 @@ struct AdapterControlBlock
|
|||
/* iop init */
|
||||
#define ACB_F_ABORT 0x0200
|
||||
#define ACB_F_FIRMWARE_TRAP 0x0400
|
||||
#define ACB_F_MSI_ENABLED 0x1000
|
||||
#define ACB_F_MSIX_ENABLED 0x2000
|
||||
struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM];
|
||||
/* used for memory free */
|
||||
struct list_head ccb_free_list;
|
||||
|
|
@ -557,19 +674,20 @@ struct AdapterControlBlock
|
|||
/* dma_coherent used for memory free */
|
||||
dma_addr_t dma_coherent_handle;
|
||||
/* dma_coherent_handle used for memory free */
|
||||
dma_addr_t dma_coherent_handle_hbb_mu;
|
||||
dma_addr_t dma_coherent_handle2;
|
||||
void *dma_coherent2;
|
||||
unsigned int uncache_size;
|
||||
uint8_t rqbuffer[ARCMSR_MAX_QBUFFER];
|
||||
/* data collection buffer for read from 80331 */
|
||||
int32_t rqbuf_firstindex;
|
||||
int32_t rqbuf_getIndex;
|
||||
/* first of read buffer */
|
||||
int32_t rqbuf_lastindex;
|
||||
int32_t rqbuf_putIndex;
|
||||
/* last of read buffer */
|
||||
uint8_t wqbuffer[ARCMSR_MAX_QBUFFER];
|
||||
/* data collection buffer for write to 80331 */
|
||||
int32_t wqbuf_firstindex;
|
||||
int32_t wqbuf_getIndex;
|
||||
/* first of write buffer */
|
||||
int32_t wqbuf_lastindex;
|
||||
int32_t wqbuf_putIndex;
|
||||
/* last of write buffer */
|
||||
uint8_t devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN];
|
||||
/* id0 ..... id15, lun0...lun7 */
|
||||
|
|
@ -594,6 +712,8 @@ struct AdapterControlBlock
|
|||
#define FW_DEADLOCK 0x0010
|
||||
atomic_t rq_map_token;
|
||||
atomic_t ante_token_value;
|
||||
uint32_t maxOutstanding;
|
||||
int msix_vector_count;
|
||||
};/* HW_DEVICE_EXTENSION */
|
||||
/*
|
||||
*******************************************************************************
|
||||
|
|
@ -606,7 +726,7 @@ struct CommandControlBlock{
|
|||
struct list_head list; /*x32: 8byte, x64: 16byte*/
|
||||
struct scsi_cmnd *pcmd; /*8 bytes pointer of linux scsi command */
|
||||
struct AdapterControlBlock *acb; /*x32: 4byte, x64: 8byte*/
|
||||
uint32_t cdb_phyaddr_pattern; /*x32: 4byte, x64: 4byte*/
|
||||
uint32_t cdb_phyaddr; /*x32: 4byte, x64: 4byte*/
|
||||
uint32_t arc_cdb_size; /*x32:4byte,x64:4byte*/
|
||||
uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/
|
||||
#define CCB_FLAG_READ 0x0000
|
||||
|
|
@ -684,8 +804,10 @@ struct SENSE_DATA
|
|||
#define ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE 0x01
|
||||
#define ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE 0x1F
|
||||
|
||||
extern void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *);
|
||||
extern void arcmsr_iop_message_read(struct AdapterControlBlock *);
|
||||
extern void arcmsr_write_ioctldata2iop(struct AdapterControlBlock *);
|
||||
extern uint32_t arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *,
|
||||
struct QBUFFER __iomem *);
|
||||
extern void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *);
|
||||
extern struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *);
|
||||
extern struct device_attribute *arcmsr_host_attrs[];
|
||||
extern int arcmsr_alloc_sysfs_attr(struct AdapterControlBlock *);
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@
|
|||
#include <linux/errno.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/circ_buf.h>
|
||||
|
||||
#include <scsi/scsi_cmnd.h>
|
||||
#include <scsi/scsi_device.h>
|
||||
|
|
@ -68,42 +69,42 @@ static ssize_t arcmsr_sysfs_iop_message_read(struct file *filp,
|
|||
struct device *dev = container_of(kobj,struct device,kobj);
|
||||
struct Scsi_Host *host = class_to_shost(dev);
|
||||
struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
|
||||
uint8_t *pQbuffer,*ptmpQbuffer;
|
||||
uint8_t *ptmpQbuffer;
|
||||
int32_t allxfer_len = 0;
|
||||
unsigned long flags;
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EACCES;
|
||||
|
||||
/* do message unit read. */
|
||||
ptmpQbuffer = (uint8_t *)buf;
|
||||
while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
|
||||
&& (allxfer_len < 1031)) {
|
||||
pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
|
||||
memcpy(ptmpQbuffer, pQbuffer, 1);
|
||||
acb->rqbuf_firstindex++;
|
||||
acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
|
||||
ptmpQbuffer++;
|
||||
allxfer_len++;
|
||||
spin_lock_irqsave(&acb->rqbuffer_lock, flags);
|
||||
if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
|
||||
unsigned int tail = acb->rqbuf_getIndex;
|
||||
unsigned int head = acb->rqbuf_putIndex;
|
||||
unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
|
||||
|
||||
allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
|
||||
if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
|
||||
allxfer_len = ARCMSR_API_DATA_BUFLEN;
|
||||
|
||||
if (allxfer_len <= cnt_to_end)
|
||||
memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
|
||||
else {
|
||||
memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
|
||||
memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
|
||||
}
|
||||
acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
|
||||
}
|
||||
if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
||||
struct QBUFFER __iomem *prbuffer;
|
||||
uint8_t __iomem *iop_data;
|
||||
int32_t iop_len;
|
||||
|
||||
acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
||||
prbuffer = arcmsr_get_iop_rqbuffer(acb);
|
||||
iop_data = prbuffer->data;
|
||||
iop_len = readl(&prbuffer->data_len);
|
||||
while (iop_len > 0) {
|
||||
acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
|
||||
acb->rqbuf_lastindex++;
|
||||
acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
||||
iop_data++;
|
||||
iop_len--;
|
||||
}
|
||||
arcmsr_iop_message_read(acb);
|
||||
if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
|
||||
acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
|
||||
}
|
||||
return (allxfer_len);
|
||||
spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
|
||||
return allxfer_len;
|
||||
}
|
||||
|
||||
static ssize_t arcmsr_sysfs_iop_message_write(struct file *filp,
|
||||
|
|
@ -115,43 +116,42 @@ static ssize_t arcmsr_sysfs_iop_message_write(struct file *filp,
|
|||
struct device *dev = container_of(kobj,struct device,kobj);
|
||||
struct Scsi_Host *host = class_to_shost(dev);
|
||||
struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
|
||||
int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
|
||||
int32_t user_len, cnt2end;
|
||||
uint8_t *pQbuffer, *ptmpuserbuffer;
|
||||
unsigned long flags;
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EACCES;
|
||||
if (count > 1032)
|
||||
if (count > ARCMSR_API_DATA_BUFLEN)
|
||||
return -EINVAL;
|
||||
/* do message unit write. */
|
||||
ptmpuserbuffer = (uint8_t *)buf;
|
||||
user_len = (int32_t)count;
|
||||
wqbuf_lastindex = acb->wqbuf_lastindex;
|
||||
wqbuf_firstindex = acb->wqbuf_firstindex;
|
||||
if (wqbuf_lastindex != wqbuf_firstindex) {
|
||||
arcmsr_post_ioctldata2iop(acb);
|
||||
spin_lock_irqsave(&acb->wqbuffer_lock, flags);
|
||||
if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
|
||||
arcmsr_write_ioctldata2iop(acb);
|
||||
spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
|
||||
return 0; /*need retry*/
|
||||
} else {
|
||||
my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
|
||||
&(ARCMSR_MAX_QBUFFER - 1);
|
||||
if (my_empty_len >= user_len) {
|
||||
while (user_len > 0) {
|
||||
pQbuffer =
|
||||
&acb->wqbuffer[acb->wqbuf_lastindex];
|
||||
memcpy(pQbuffer, ptmpuserbuffer, 1);
|
||||
acb->wqbuf_lastindex++;
|
||||
acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
||||
ptmpuserbuffer++;
|
||||
user_len--;
|
||||
}
|
||||
if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
|
||||
acb->acb_flags &=
|
||||
~ACB_F_MESSAGE_WQBUFFER_CLEARED;
|
||||
arcmsr_post_ioctldata2iop(acb);
|
||||
}
|
||||
return count;
|
||||
} else {
|
||||
return 0; /*need retry*/
|
||||
pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
|
||||
cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
|
||||
if (user_len > cnt2end) {
|
||||
memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
|
||||
ptmpuserbuffer += cnt2end;
|
||||
user_len -= cnt2end;
|
||||
acb->wqbuf_putIndex = 0;
|
||||
pQbuffer = acb->wqbuffer;
|
||||
}
|
||||
memcpy(pQbuffer, ptmpuserbuffer, user_len);
|
||||
acb->wqbuf_putIndex += user_len;
|
||||
acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
|
||||
if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
|
||||
acb->acb_flags &=
|
||||
~ACB_F_MESSAGE_WQBUFFER_CLEARED;
|
||||
arcmsr_write_ioctldata2iop(acb);
|
||||
}
|
||||
spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
|
||||
return count;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -165,22 +165,24 @@ static ssize_t arcmsr_sysfs_iop_message_clear(struct file *filp,
|
|||
struct Scsi_Host *host = class_to_shost(dev);
|
||||
struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
|
||||
uint8_t *pQbuffer;
|
||||
unsigned long flags;
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EACCES;
|
||||
|
||||
if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
||||
acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
||||
arcmsr_iop_message_read(acb);
|
||||
}
|
||||
arcmsr_clear_iop2drv_rqueue_buffer(acb);
|
||||
acb->acb_flags |=
|
||||
(ACB_F_MESSAGE_WQBUFFER_CLEARED
|
||||
| ACB_F_MESSAGE_RQBUFFER_CLEARED
|
||||
| ACB_F_MESSAGE_WQBUFFER_READED);
|
||||
acb->rqbuf_firstindex = 0;
|
||||
acb->rqbuf_lastindex = 0;
|
||||
acb->wqbuf_firstindex = 0;
|
||||
acb->wqbuf_lastindex = 0;
|
||||
spin_lock_irqsave(&acb->rqbuffer_lock, flags);
|
||||
acb->rqbuf_getIndex = 0;
|
||||
acb->rqbuf_putIndex = 0;
|
||||
spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
|
||||
spin_lock_irqsave(&acb->wqbuffer_lock, flags);
|
||||
acb->wqbuf_getIndex = 0;
|
||||
acb->wqbuf_putIndex = 0;
|
||||
spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
|
||||
pQbuffer = acb->rqbuffer;
|
||||
memset(pQbuffer, 0, sizeof (struct QBUFFER));
|
||||
pQbuffer = acb->wqbuffer;
|
||||
|
|
@ -193,7 +195,7 @@ static struct bin_attribute arcmsr_sysfs_message_read_attr = {
|
|||
.name = "mu_read",
|
||||
.mode = S_IRUSR ,
|
||||
},
|
||||
.size = 1032,
|
||||
.size = ARCMSR_API_DATA_BUFLEN,
|
||||
.read = arcmsr_sysfs_iop_message_read,
|
||||
};
|
||||
|
||||
|
|
@ -202,7 +204,7 @@ static struct bin_attribute arcmsr_sysfs_message_write_attr = {
|
|||
.name = "mu_write",
|
||||
.mode = S_IWUSR,
|
||||
},
|
||||
.size = 1032,
|
||||
.size = ARCMSR_API_DATA_BUFLEN,
|
||||
.write = arcmsr_sysfs_iop_message_write,
|
||||
};
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
@ -275,6 +275,19 @@ bool is_link_state_evt(u32 trailer)
|
|||
ASYNC_EVENT_CODE_LINK_STATE);
|
||||
}
|
||||
|
||||
static bool is_iscsi_evt(u32 trailer)
|
||||
{
|
||||
return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
|
||||
ASYNC_TRAILER_EVENT_CODE_MASK) ==
|
||||
ASYNC_EVENT_CODE_ISCSI;
|
||||
}
|
||||
|
||||
static int iscsi_evt_type(u32 trailer)
|
||||
{
|
||||
return (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) &
|
||||
ASYNC_TRAILER_EVENT_TYPE_MASK;
|
||||
}
|
||||
|
||||
static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl)
|
||||
{
|
||||
if (compl->flags != 0) {
|
||||
|
|
@ -438,7 +451,7 @@ void beiscsi_async_link_state_process(struct beiscsi_hba *phba,
|
|||
} else if ((evt->port_link_status & ASYNC_EVENT_LINK_UP) ||
|
||||
((evt->port_link_status & ASYNC_EVENT_LOGICAL) &&
|
||||
(evt->port_fault == BEISCSI_PHY_LINK_FAULT_NONE))) {
|
||||
phba->state = BE_ADAPTER_LINK_UP;
|
||||
phba->state = BE_ADAPTER_LINK_UP | BE_ADAPTER_CHECK_BOOT;
|
||||
|
||||
beiscsi_log(phba, KERN_ERR,
|
||||
BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT,
|
||||
|
|
@ -461,7 +474,28 @@ int beiscsi_process_mcc(struct beiscsi_hba *phba)
|
|||
/* Interpret compl as a async link evt */
|
||||
beiscsi_async_link_state_process(phba,
|
||||
(struct be_async_event_link_state *) compl);
|
||||
else
|
||||
else if (is_iscsi_evt(compl->flags)) {
|
||||
switch (iscsi_evt_type(compl->flags)) {
|
||||
case ASYNC_EVENT_NEW_ISCSI_TGT_DISC:
|
||||
case ASYNC_EVENT_NEW_ISCSI_CONN:
|
||||
case ASYNC_EVENT_NEW_TCP_CONN:
|
||||
phba->state |= BE_ADAPTER_CHECK_BOOT;
|
||||
beiscsi_log(phba, KERN_ERR,
|
||||
BEISCSI_LOG_CONFIG |
|
||||
BEISCSI_LOG_MBOX,
|
||||
"BC_%d : Async iscsi Event,"
|
||||
" flags handled = 0x%08x\n",
|
||||
compl->flags);
|
||||
break;
|
||||
default:
|
||||
beiscsi_log(phba, KERN_ERR,
|
||||
BEISCSI_LOG_CONFIG |
|
||||
BEISCSI_LOG_MBOX,
|
||||
"BC_%d : Unsupported Async"
|
||||
" Event, flags = 0x%08x\n",
|
||||
compl->flags);
|
||||
}
|
||||
} else
|
||||
beiscsi_log(phba, KERN_ERR,
|
||||
BEISCSI_LOG_CONFIG |
|
||||
BEISCSI_LOG_MBOX,
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
@ -26,9 +26,9 @@
|
|||
* The commands are serviced by the ARM processor in the OneConnect's MPU.
|
||||
*/
|
||||
struct be_sge {
|
||||
u32 pa_lo;
|
||||
u32 pa_hi;
|
||||
u32 len;
|
||||
__le32 pa_lo;
|
||||
__le32 pa_hi;
|
||||
__le32 len;
|
||||
};
|
||||
|
||||
#define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
|
||||
|
|
@ -118,6 +118,14 @@ struct be_mcc_compl {
|
|||
#define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
|
||||
#define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF
|
||||
#define ASYNC_EVENT_CODE_LINK_STATE 0x1
|
||||
#define ASYNC_EVENT_CODE_ISCSI 0x4
|
||||
|
||||
#define ASYNC_TRAILER_EVENT_TYPE_SHIFT 16 /* bits 16 - 23 */
|
||||
#define ASYNC_TRAILER_EVENT_TYPE_MASK 0xF
|
||||
#define ASYNC_EVENT_NEW_ISCSI_TGT_DISC 0x4
|
||||
#define ASYNC_EVENT_NEW_ISCSI_CONN 0x5
|
||||
#define ASYNC_EVENT_NEW_TCP_CONN 0x7
|
||||
|
||||
struct be_async_event_trailer {
|
||||
u32 code;
|
||||
};
|
||||
|
|
@ -624,11 +632,11 @@ static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
|
|||
/******************** Modify EQ Delay *******************/
|
||||
struct be_cmd_req_modify_eq_delay {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 num_eq;
|
||||
__le32 num_eq;
|
||||
struct {
|
||||
u32 eq_id;
|
||||
u32 phase;
|
||||
u32 delay_multiplier;
|
||||
__le32 eq_id;
|
||||
__le32 phase;
|
||||
__le32 delay_multiplier;
|
||||
} delay[MAX_CPUS];
|
||||
} __packed;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
@ -1273,6 +1273,31 @@ int beiscsi_ep_poll(struct iscsi_endpoint *ep, int timeout_ms)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* beiscsi_flush_cq()- Flush the CQ created.
|
||||
* @phba: ptr device priv structure.
|
||||
*
|
||||
* Before the connection resource are freed flush
|
||||
* all the CQ enteries
|
||||
**/
|
||||
static void beiscsi_flush_cq(struct beiscsi_hba *phba)
|
||||
{
|
||||
uint16_t i;
|
||||
struct be_eq_obj *pbe_eq;
|
||||
struct hwi_controller *phwi_ctrlr;
|
||||
struct hwi_context_memory *phwi_context;
|
||||
|
||||
phwi_ctrlr = phba->phwi_ctrlr;
|
||||
phwi_context = phwi_ctrlr->phwi_ctxt;
|
||||
|
||||
for (i = 0; i < phba->num_cpus; i++) {
|
||||
pbe_eq = &phwi_context->be_eq[i];
|
||||
blk_iopoll_disable(&pbe_eq->iopoll);
|
||||
beiscsi_process_cq(pbe_eq);
|
||||
blk_iopoll_enable(&pbe_eq->iopoll);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* beiscsi_close_conn - Upload the connection
|
||||
* @ep: The iscsi endpoint
|
||||
|
|
@ -1294,6 +1319,10 @@ static int beiscsi_close_conn(struct beiscsi_endpoint *beiscsi_ep, int flag)
|
|||
}
|
||||
|
||||
ret = beiscsi_mccq_compl(phba, tag, NULL, NULL);
|
||||
|
||||
/* Flush the CQ entries */
|
||||
beiscsi_flush_cq(phba);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
@ -2068,7 +2068,7 @@ static void beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
|
|||
* return
|
||||
* Number of Completion Entries processed.
|
||||
**/
|
||||
static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
|
||||
unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
|
||||
{
|
||||
struct be_queue_info *cq;
|
||||
struct sol_cqe *sol;
|
||||
|
|
@ -2110,6 +2110,18 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
|
|||
|
||||
cri_index = BE_GET_CRI_FROM_CID(cid);
|
||||
ep = phba->ep_array[cri_index];
|
||||
|
||||
if (ep == NULL) {
|
||||
/* connection has already been freed
|
||||
* just move on to next one
|
||||
*/
|
||||
beiscsi_log(phba, KERN_WARNING,
|
||||
BEISCSI_LOG_INIT,
|
||||
"BM_%d : proc cqe of disconn ep: cid %d\n",
|
||||
cid);
|
||||
goto proc_next_cqe;
|
||||
}
|
||||
|
||||
beiscsi_ep = ep->dd_data;
|
||||
beiscsi_conn = beiscsi_ep->conn;
|
||||
|
||||
|
|
@ -2219,6 +2231,7 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
|
|||
break;
|
||||
}
|
||||
|
||||
proc_next_cqe:
|
||||
AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
|
||||
queue_tail_inc(cq);
|
||||
sol = queue_tail_node(cq);
|
||||
|
|
@ -4377,6 +4390,10 @@ static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
|
|||
{
|
||||
struct iscsi_boot_kobj *boot_kobj;
|
||||
|
||||
/* it has been created previously */
|
||||
if (phba->boot_kset)
|
||||
return 0;
|
||||
|
||||
/* get boot info using mgmt cmd */
|
||||
if (beiscsi_get_boot_info(phba))
|
||||
/* Try to see if we can carry on without this */
|
||||
|
|
@ -5206,6 +5223,7 @@ static void beiscsi_quiesce(struct beiscsi_hba *phba,
|
|||
free_irq(phba->pcidev->irq, phba);
|
||||
}
|
||||
pci_disable_msix(phba->pcidev);
|
||||
cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
|
||||
|
||||
for (i = 0; i < phba->num_cpus; i++) {
|
||||
pbe_eq = &phwi_context->be_eq[i];
|
||||
|
|
@ -5227,7 +5245,6 @@ static void beiscsi_quiesce(struct beiscsi_hba *phba,
|
|||
hwi_cleanup(phba);
|
||||
}
|
||||
|
||||
cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
|
||||
}
|
||||
|
||||
static void beiscsi_remove(struct pci_dev *pcidev)
|
||||
|
|
@ -5276,9 +5293,9 @@ static void beiscsi_msix_enable(struct beiscsi_hba *phba)
|
|||
for (i = 0; i <= phba->num_cpus; i++)
|
||||
phba->msix_entries[i].entry = i;
|
||||
|
||||
status = pci_enable_msix(phba->pcidev, phba->msix_entries,
|
||||
(phba->num_cpus + 1));
|
||||
if (!status)
|
||||
status = pci_enable_msix_range(phba->pcidev, phba->msix_entries,
|
||||
phba->num_cpus + 1, phba->num_cpus + 1);
|
||||
if (status > 0)
|
||||
phba->msix_enabled = true;
|
||||
|
||||
return;
|
||||
|
|
@ -5335,6 +5352,14 @@ static void be_eqd_update(struct beiscsi_hba *phba)
|
|||
}
|
||||
}
|
||||
|
||||
static void be_check_boot_session(struct beiscsi_hba *phba)
|
||||
{
|
||||
if (beiscsi_setup_boot_info(phba))
|
||||
beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
|
||||
"BM_%d : Could not set up "
|
||||
"iSCSI boot info on async event.\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* beiscsi_hw_health_check()- Check adapter health
|
||||
* @work: work item to check HW health
|
||||
|
|
@ -5350,6 +5375,11 @@ beiscsi_hw_health_check(struct work_struct *work)
|
|||
|
||||
be_eqd_update(phba);
|
||||
|
||||
if (phba->state & BE_ADAPTER_CHECK_BOOT) {
|
||||
phba->state &= ~BE_ADAPTER_CHECK_BOOT;
|
||||
be_check_boot_session(phba);
|
||||
}
|
||||
|
||||
beiscsi_ue_detect(phba);
|
||||
|
||||
schedule_delayed_work(&phba->beiscsi_hw_check_task,
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
@ -36,7 +36,7 @@
|
|||
#include <scsi/scsi_transport_iscsi.h>
|
||||
|
||||
#define DRV_NAME "be2iscsi"
|
||||
#define BUILD_STR "10.2.273.0"
|
||||
#define BUILD_STR "10.4.114.0"
|
||||
#define BE_NAME "Emulex OneConnect" \
|
||||
"Open-iSCSI Driver version" BUILD_STR
|
||||
#define DRV_DESC BE_NAME " " "Driver"
|
||||
|
|
@ -104,6 +104,7 @@
|
|||
#define BE_ADAPTER_LINK_DOWN 0x002
|
||||
#define BE_ADAPTER_PCI_ERR 0x004
|
||||
#define BE_ADAPTER_STATE_SHUTDOWN 0x008
|
||||
#define BE_ADAPTER_CHECK_BOOT 0x010
|
||||
|
||||
|
||||
#define BEISCSI_CLEAN_UNLOAD 0x01
|
||||
|
|
@ -839,6 +840,9 @@ void beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
|
|||
void hwi_ring_cq_db(struct beiscsi_hba *phba,
|
||||
unsigned int id, unsigned int num_processed,
|
||||
unsigned char rearm, unsigned char event);
|
||||
|
||||
unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq);
|
||||
|
||||
static inline bool beiscsi_error(struct beiscsi_hba *phba)
|
||||
{
|
||||
return phba->ue_detected || phba->fw_timeout;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
@ -943,17 +943,20 @@ mgmt_static_ip_modify(struct beiscsi_hba *phba,
|
|||
|
||||
if (ip_action == IP_ACTION_ADD) {
|
||||
memcpy(req->ip_params.ip_record.ip_addr.addr, ip_param->value,
|
||||
ip_param->len);
|
||||
sizeof(req->ip_params.ip_record.ip_addr.addr));
|
||||
|
||||
if (subnet_param)
|
||||
memcpy(req->ip_params.ip_record.ip_addr.subnet_mask,
|
||||
subnet_param->value, subnet_param->len);
|
||||
subnet_param->value,
|
||||
sizeof(req->ip_params.ip_record.ip_addr.subnet_mask));
|
||||
} else {
|
||||
memcpy(req->ip_params.ip_record.ip_addr.addr,
|
||||
if_info->ip_addr.addr, ip_param->len);
|
||||
if_info->ip_addr.addr,
|
||||
sizeof(req->ip_params.ip_record.ip_addr.addr));
|
||||
|
||||
memcpy(req->ip_params.ip_record.ip_addr.subnet_mask,
|
||||
if_info->ip_addr.subnet_mask, ip_param->len);
|
||||
if_info->ip_addr.subnet_mask,
|
||||
sizeof(req->ip_params.ip_record.ip_addr.subnet_mask));
|
||||
}
|
||||
|
||||
rc = mgmt_exec_nonemb_cmd(phba, &nonemb_cmd, NULL, 0);
|
||||
|
|
@ -981,7 +984,7 @@ static int mgmt_modify_gateway(struct beiscsi_hba *phba, uint8_t *gt_addr,
|
|||
req->action = gtway_action;
|
||||
req->ip_addr.ip_type = BE2_IPV4;
|
||||
|
||||
memcpy(req->ip_addr.addr, gt_addr, param_len);
|
||||
memcpy(req->ip_addr.addr, gt_addr, sizeof(req->ip_addr.addr));
|
||||
|
||||
return mgmt_exec_nonemb_cmd(phba, &nonemb_cmd, NULL, 0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* Copyright (C) 2005 - 2013 Emulex
|
||||
* Copyright (C) 2005 - 2014 Emulex
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
|
|
|||
|
|
@ -1654,6 +1654,10 @@ static int bnx2fc_map_sg(struct bnx2fc_cmd *io_req)
|
|||
u64 addr;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* Use dma_map_sg directly to ensure we're using the correct
|
||||
* dev struct off of pcidev.
|
||||
*/
|
||||
sg_count = dma_map_sg(&hba->pcidev->dev, scsi_sglist(sc),
|
||||
scsi_sg_count(sc), sc->sc_data_direction);
|
||||
scsi_for_each_sg(sc, sg, sg_count, i) {
|
||||
|
|
@ -1703,9 +1707,16 @@ static int bnx2fc_build_bd_list_from_sg(struct bnx2fc_cmd *io_req)
|
|||
static void bnx2fc_unmap_sg_list(struct bnx2fc_cmd *io_req)
|
||||
{
|
||||
struct scsi_cmnd *sc = io_req->sc_cmd;
|
||||
struct bnx2fc_interface *interface = io_req->port->priv;
|
||||
struct bnx2fc_hba *hba = interface->hba;
|
||||
|
||||
if (io_req->bd_tbl->bd_valid && sc) {
|
||||
scsi_dma_unmap(sc);
|
||||
/*
|
||||
* Use dma_unmap_sg directly to ensure we're using the correct
|
||||
* dev struct off of pcidev.
|
||||
*/
|
||||
if (io_req->bd_tbl->bd_valid && sc && scsi_sg_count(sc)) {
|
||||
dma_unmap_sg(&hba->pcidev->dev, scsi_sglist(sc),
|
||||
scsi_sg_count(sc), sc->sc_data_direction);
|
||||
io_req->bd_tbl->bd_valid = 0;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue