This is the 4.9.103 stable release
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Add MODULE_ALIAS to sun4i-ss scsi: fas216: fix sense buffer initialization scsi: ufs: Enable quirk to ignore sending WRITE_SAME command scsi: bnx2fc: Fix check in SCSI completion handler for timed out request scsi: sym53c8xx_2: iterator underflow in sym_getsync() scsi: mptfusion: Add bounds check in mptctl_hp_targetinfo() scsi: qla2xxx: Avoid triggering undefined behavior in qla2x00_mbx_completion() scsi: storvsc: Increase cmd_per_lun for higher speed devices scsi: aacraid: fix shutdown crash when init fails scsi: qla4xxx: skip error recovery in case of register disconnect. scsi: mpt3sas: Do not mark fw_event workqueue as WQ_MEM_RECLAIM scsi: sd: Keep disk read-only when re-reading partition scsi: aacraid: Insure command thread is not recursively stopped scsi: mvsas: fix wrong endianness of sgpio api scsi: lpfc: Fix issue_lip if link is disabled scsi: lpfc: Fix soft lockup in lpfc worker thread during LIP testing scsi: lpfc: Fix frequency of Release WQE CQEs ASoC: au1x: Fix timeout tests in au1xac97c_ac97_read() ASoC: topology: create TLV data for dapm widgets ASoC: samsung: i2s: Ensure the RCLK rate is properly determined clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 clk: Don't show the incorrect clock phase clk: tegra: Fix pll_u rate configuration media: cx23885: Set subdev host data to clk_freq pointer clk: rockchip: Prevent calculating mmc phase if clock rate is zero clk: samsung: s3c2410: Fix PLL rates clk: samsung: exynos7: Fix PLL rates clk: samsung: exynos5260: Fix PLL rates clk: samsung: exynos5433: Fix PLL rates clk: samsung: exynos5250: Fix PLL rates clk: samsung: exynos3250: Fix PLL rates media: dmxdev: fix error code for invalid ioctls media: cx23885: Override 888 ImpactVCBe crystal frequency media: s3c-camif: fix out-of-bounds array access media: vb2: Fix videobuf2 to map correct area media: vivid: fix incorrect capabilities for radio media: cx25821: prevent out-of-bounds read on array card serial: xuartps: Fix out-of-bounds access through DT alias serial: samsung: Fix out-of-bounds access through serial port index serial: mxs-auart: Fix out-of-bounds access through serial port index serial: imx: Fix out-of-bounds access through serial port index serial: fsl_lpuart: Fix out-of-bounds access through DT alias serial: arc_uart: Fix out-of-bounds access through DT alias serial: 8250: Don't service RX FIFO if interrupts are disabled rtc: snvs: Fix usage of snvs_rtc_enable rtc: hctosys: Ensure system time doesn't overflow time_t rtc: tx4939: avoid unintended sign extension on a 24 bit shift Linux 4.9.103 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
commit
70c65e471b
107 changed files with 974 additions and 334 deletions
2
Makefile
2
Makefile
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@ -1,6 +1,6 @@
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VERSION = 4
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PATCHLEVEL = 9
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SUBLEVEL = 102
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SUBLEVEL = 103
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EXTRAVERSION =
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NAME = Roaring Lionus
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@ -12,6 +12,7 @@
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*/
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#include <linux/linkage.h>
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#include <asm/nospec-insn.h>
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#include <asm/vx-insn.h>
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/* Vector register range containing CRC-32 constants */
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@ -66,6 +67,8 @@
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.previous
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GEN_BR_THUNK %r14
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.text
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/*
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* The CRC-32 function(s) use these calling conventions:
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@ -202,6 +205,6 @@ ENTRY(crc32_be_vgfm_16)
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.Ldone:
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VLGVF %r2,%v2,3
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br %r14
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BR_EX %r14
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.previous
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@ -13,6 +13,7 @@
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*/
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#include <linux/linkage.h>
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#include <asm/nospec-insn.h>
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#include <asm/vx-insn.h>
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/* Vector register range containing CRC-32 constants */
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@ -75,6 +76,7 @@
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.previous
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GEN_BR_THUNK %r14
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.text
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@ -263,6 +265,6 @@ crc32_le_vgfm_generic:
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.Ldone:
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VLGVF %r2,%v2,2
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br %r14
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BR_EX %r14
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.previous
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108
arch/s390/include/asm/alternative-asm.h
Normal file
108
arch/s390/include/asm/alternative-asm.h
Normal file
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@ -0,0 +1,108 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_S390_ALTERNATIVE_ASM_H
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#define _ASM_S390_ALTERNATIVE_ASM_H
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#ifdef __ASSEMBLY__
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/*
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* Check the length of an instruction sequence. The length may not be larger
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* than 254 bytes and it has to be divisible by 2.
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*/
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.macro alt_len_check start,end
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.if ( \end - \start ) > 254
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.error "cpu alternatives does not support instructions blocks > 254 bytes\n"
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.endif
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.if ( \end - \start ) % 2
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.error "cpu alternatives instructions length is odd\n"
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.endif
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.endm
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/*
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* Issue one struct alt_instr descriptor entry (need to put it into
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* the section .altinstructions, see below). This entry contains
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* enough information for the alternatives patching code to patch an
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* instruction. See apply_alternatives().
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*/
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.macro alt_entry orig_start, orig_end, alt_start, alt_end, feature
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.long \orig_start - .
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.long \alt_start - .
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.word \feature
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.byte \orig_end - \orig_start
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.byte \alt_end - \alt_start
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.endm
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/*
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* Fill up @bytes with nops. The macro emits 6-byte nop instructions
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* for the bulk of the area, possibly followed by a 4-byte and/or
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* a 2-byte nop if the size of the area is not divisible by 6.
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*/
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.macro alt_pad_fill bytes
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.fill ( \bytes ) / 6, 6, 0xc0040000
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.fill ( \bytes ) % 6 / 4, 4, 0x47000000
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.fill ( \bytes ) % 6 % 4 / 2, 2, 0x0700
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.endm
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/*
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* Fill up @bytes with nops. If the number of bytes is larger
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* than 6, emit a jg instruction to branch over all nops, then
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* fill an area of size (@bytes - 6) with nop instructions.
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*/
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.macro alt_pad bytes
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.if ( \bytes > 0 )
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.if ( \bytes > 6 )
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jg . + \bytes
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alt_pad_fill \bytes - 6
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.else
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alt_pad_fill \bytes
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.endif
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.endif
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.endm
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/*
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* Define an alternative between two instructions. If @feature is
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* present, early code in apply_alternatives() replaces @oldinstr with
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* @newinstr. ".skip" directive takes care of proper instruction padding
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* in case @newinstr is longer than @oldinstr.
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*/
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.macro ALTERNATIVE oldinstr, newinstr, feature
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.pushsection .altinstr_replacement,"ax"
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770: \newinstr
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771: .popsection
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772: \oldinstr
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773: alt_len_check 770b, 771b
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alt_len_check 772b, 773b
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alt_pad ( ( 771b - 770b ) - ( 773b - 772b ) )
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774: .pushsection .altinstructions,"a"
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alt_entry 772b, 774b, 770b, 771b, \feature
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.popsection
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.endm
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/*
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* Define an alternative between two instructions. If @feature is
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* present, early code in apply_alternatives() replaces @oldinstr with
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* @newinstr. ".skip" directive takes care of proper instruction padding
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* in case @newinstr is longer than @oldinstr.
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*/
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.macro ALTERNATIVE_2 oldinstr, newinstr1, feature1, newinstr2, feature2
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.pushsection .altinstr_replacement,"ax"
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770: \newinstr1
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771: \newinstr2
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772: .popsection
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773: \oldinstr
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774: alt_len_check 770b, 771b
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alt_len_check 771b, 772b
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alt_len_check 773b, 774b
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.if ( 771b - 770b > 772b - 771b )
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alt_pad ( ( 771b - 770b ) - ( 774b - 773b ) )
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.else
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alt_pad ( ( 772b - 771b ) - ( 774b - 773b ) )
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.endif
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775: .pushsection .altinstructions,"a"
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alt_entry 773b, 775b, 770b, 771b,\feature1
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alt_entry 773b, 775b, 771b, 772b,\feature2
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.popsection
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_S390_ALTERNATIVE_ASM_H */
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195
arch/s390/include/asm/nospec-insn.h
Normal file
195
arch/s390/include/asm/nospec-insn.h
Normal file
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@ -0,0 +1,195 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_S390_NOSPEC_ASM_H
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#define _ASM_S390_NOSPEC_ASM_H
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#include <asm/alternative-asm.h>
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#include <asm/asm-offsets.h>
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#ifdef __ASSEMBLY__
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#ifdef CONFIG_EXPOLINE
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_LC_BR_R1 = __LC_BR_R1
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/*
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* The expoline macros are used to create thunks in the same format
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* as gcc generates them. The 'comdat' section flag makes sure that
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* the various thunks are merged into a single copy.
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*/
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.macro __THUNK_PROLOG_NAME name
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.pushsection .text.\name,"axG",@progbits,\name,comdat
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.globl \name
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.hidden \name
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.type \name,@function
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\name:
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.cfi_startproc
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.endm
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||||
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.macro __THUNK_EPILOG
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.cfi_endproc
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.popsection
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.endm
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|
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.macro __THUNK_PROLOG_BR r1,r2
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__THUNK_PROLOG_NAME __s390x_indirect_jump_r\r2\()use_r\r1
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.endm
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.macro __THUNK_PROLOG_BC d0,r1,r2
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__THUNK_PROLOG_NAME __s390x_indirect_branch_\d0\()_\r2\()use_\r1
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.endm
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.macro __THUNK_BR r1,r2
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jg __s390x_indirect_jump_r\r2\()use_r\r1
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.endm
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.macro __THUNK_BC d0,r1,r2
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jg __s390x_indirect_branch_\d0\()_\r2\()use_\r1
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.endm
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.macro __THUNK_BRASL r1,r2,r3
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brasl \r1,__s390x_indirect_jump_r\r3\()use_r\r2
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.endm
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.macro __DECODE_RR expand,reg,ruse
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.set __decode_fail,1
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.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \reg,%r\r1
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.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \ruse,%r\r2
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\expand \r1,\r2
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.set __decode_fail,0
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.endif
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.endr
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.endif
|
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.endr
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.if __decode_fail == 1
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.error "__DECODE_RR failed"
|
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.endif
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.endm
|
||||
|
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.macro __DECODE_RRR expand,rsave,rtarget,ruse
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.set __decode_fail,1
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.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \rsave,%r\r1
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.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \rtarget,%r\r2
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.irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \ruse,%r\r3
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\expand \r1,\r2,\r3
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.set __decode_fail,0
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.endif
|
||||
.endr
|
||||
.endif
|
||||
.endr
|
||||
.endif
|
||||
.endr
|
||||
.if __decode_fail == 1
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||||
.error "__DECODE_RRR failed"
|
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.endif
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||||
.endm
|
||||
|
||||
.macro __DECODE_DRR expand,disp,reg,ruse
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.set __decode_fail,1
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.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \reg,%r\r1
|
||||
.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \ruse,%r\r2
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||||
\expand \disp,\r1,\r2
|
||||
.set __decode_fail,0
|
||||
.endif
|
||||
.endr
|
||||
.endif
|
||||
.endr
|
||||
.if __decode_fail == 1
|
||||
.error "__DECODE_DRR failed"
|
||||
.endif
|
||||
.endm
|
||||
|
||||
.macro __THUNK_EX_BR reg,ruse
|
||||
# Be very careful when adding instructions to this macro!
|
||||
# The ALTERNATIVE replacement code has a .+10 which targets
|
||||
# the "br \reg" after the code has been patched.
|
||||
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
|
||||
exrl 0,555f
|
||||
j .
|
||||
#else
|
||||
.ifc \reg,%r1
|
||||
ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
|
||||
j .
|
||||
.else
|
||||
larl \ruse,555f
|
||||
ex 0,0(\ruse)
|
||||
j .
|
||||
.endif
|
||||
#endif
|
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555: br \reg
|
||||
.endm
|
||||
|
||||
.macro __THUNK_EX_BC disp,reg,ruse
|
||||
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
|
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exrl 0,556f
|
||||
j .
|
||||
#else
|
||||
larl \ruse,556f
|
||||
ex 0,0(\ruse)
|
||||
j .
|
||||
#endif
|
||||
556: b \disp(\reg)
|
||||
.endm
|
||||
|
||||
.macro GEN_BR_THUNK reg,ruse=%r1
|
||||
__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
|
||||
__THUNK_EX_BR \reg,\ruse
|
||||
__THUNK_EPILOG
|
||||
.endm
|
||||
|
||||
.macro GEN_B_THUNK disp,reg,ruse=%r1
|
||||
__DECODE_DRR __THUNK_PROLOG_BC,\disp,\reg,\ruse
|
||||
__THUNK_EX_BC \disp,\reg,\ruse
|
||||
__THUNK_EPILOG
|
||||
.endm
|
||||
|
||||
.macro BR_EX reg,ruse=%r1
|
||||
557: __DECODE_RR __THUNK_BR,\reg,\ruse
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 557b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro B_EX disp,reg,ruse=%r1
|
||||
558: __DECODE_DRR __THUNK_BC,\disp,\reg,\ruse
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 558b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro BASR_EX rsave,rtarget,ruse=%r1
|
||||
559: __DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 559b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
#else
|
||||
.macro GEN_BR_THUNK reg,ruse=%r1
|
||||
.endm
|
||||
|
||||
.macro GEN_B_THUNK disp,reg,ruse=%r1
|
||||
.endm
|
||||
|
||||
.macro BR_EX reg,ruse=%r1
|
||||
br \reg
|
||||
.endm
|
||||
|
||||
.macro B_EX disp,reg,ruse=%r1
|
||||
b \disp(\reg)
|
||||
.endm
|
||||
|
||||
.macro BASR_EX rsave,rtarget,ruse=%r1
|
||||
basr \rsave,\rtarget
|
||||
.endm
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_S390_NOSPEC_ASM_H */
|
||||
|
|
@ -63,6 +63,7 @@ obj-y += nospec-branch.o
|
|||
|
||||
extra-y += head.o head64.o vmlinux.lds
|
||||
|
||||
obj-$(CONFIG_SYSFS) += nospec-sysfs.o
|
||||
CFLAGS_REMOVE_nospec-branch.o += $(CC_FLAGS_EXPOLINE)
|
||||
|
||||
obj-$(CONFIG_MODULES) += module.o
|
||||
|
|
|
|||
|
|
@ -175,6 +175,7 @@ int main(void)
|
|||
OFFSET(__LC_MACHINE_FLAGS, lowcore, machine_flags);
|
||||
OFFSET(__LC_GMAP, lowcore, gmap);
|
||||
OFFSET(__LC_PASTE, lowcore, paste);
|
||||
OFFSET(__LC_BR_R1, lowcore, br_r1_trampoline);
|
||||
/* software defined ABI-relevant lowcore locations 0xe00 - 0xe20 */
|
||||
OFFSET(__LC_DUMP_REIPL, lowcore, ipib);
|
||||
/* hardware defined lowcore locations 0x1000 - 0x18ff */
|
||||
|
|
|
|||
|
|
@ -8,18 +8,22 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/sigp.h>
|
||||
|
||||
GEN_BR_THUNK %r9
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
ENTRY(s390_base_mcck_handler)
|
||||
basr %r13,0
|
||||
0: lg %r15,__LC_PANIC_STACK # load panic stack
|
||||
aghi %r15,-STACK_FRAME_OVERHEAD
|
||||
larl %r1,s390_base_mcck_handler_fn
|
||||
lg %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
lg %r9,0(%r1)
|
||||
ltgr %r9,%r9
|
||||
jz 1f
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r9
|
||||
1: la %r1,4095
|
||||
lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
|
||||
lpswe __LC_MCK_OLD_PSW
|
||||
|
|
@ -36,10 +40,10 @@ ENTRY(s390_base_ext_handler)
|
|||
basr %r13,0
|
||||
0: aghi %r15,-STACK_FRAME_OVERHEAD
|
||||
larl %r1,s390_base_ext_handler_fn
|
||||
lg %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
lg %r9,0(%r1)
|
||||
ltgr %r9,%r9
|
||||
jz 1f
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r9
|
||||
1: lmg %r0,%r15,__LC_SAVE_AREA_ASYNC
|
||||
ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
|
||||
lpswe __LC_EXT_OLD_PSW
|
||||
|
|
@ -56,10 +60,10 @@ ENTRY(s390_base_pgm_handler)
|
|||
basr %r13,0
|
||||
0: aghi %r15,-STACK_FRAME_OVERHEAD
|
||||
larl %r1,s390_base_pgm_handler_fn
|
||||
lg %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
lg %r9,0(%r1)
|
||||
ltgr %r9,%r9
|
||||
jz 1f
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r9
|
||||
lmg %r0,%r15,__LC_SAVE_AREA_SYNC
|
||||
lpswe __LC_PGM_OLD_PSW
|
||||
1: lpswe disabled_wait_psw-0b(%r13)
|
||||
|
|
@ -116,7 +120,7 @@ ENTRY(diag308_reset)
|
|||
larl %r4,.Lcontinue_psw # Restore PSW flags
|
||||
lpswe 0(%r4)
|
||||
.Lcontinue:
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.align 16
|
||||
.Lrestart_psw:
|
||||
.long 0x00080000,0x80000000 + .Lrestart_part2
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@
|
|||
#include <asm/setup.h>
|
||||
#include <asm/nmi.h>
|
||||
#include <asm/export.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
|
||||
__PT_R0 = __PT_GPRS
|
||||
__PT_R1 = __PT_GPRS + 8
|
||||
|
|
@ -226,67 +227,9 @@ _PIF_WORK = (_PIF_PER_TRAP)
|
|||
.popsection
|
||||
.endm
|
||||
|
||||
#ifdef CONFIG_EXPOLINE
|
||||
|
||||
.macro GEN_BR_THUNK name,reg,tmp
|
||||
.section .text.\name,"axG",@progbits,\name,comdat
|
||||
.globl \name
|
||||
.hidden \name
|
||||
.type \name,@function
|
||||
\name:
|
||||
.cfi_startproc
|
||||
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
|
||||
exrl 0,0f
|
||||
#else
|
||||
larl \tmp,0f
|
||||
ex 0,0(\tmp)
|
||||
#endif
|
||||
j .
|
||||
0: br \reg
|
||||
.cfi_endproc
|
||||
.endm
|
||||
|
||||
GEN_BR_THUNK __s390x_indirect_jump_r1use_r9,%r9,%r1
|
||||
GEN_BR_THUNK __s390x_indirect_jump_r1use_r14,%r14,%r1
|
||||
GEN_BR_THUNK __s390x_indirect_jump_r11use_r14,%r14,%r11
|
||||
|
||||
.macro BASR_R14_R9
|
||||
0: brasl %r14,__s390x_indirect_jump_r1use_r9
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 0b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro BR_R1USE_R14
|
||||
0: jg __s390x_indirect_jump_r1use_r14
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 0b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro BR_R11USE_R14
|
||||
0: jg __s390x_indirect_jump_r11use_r14
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 0b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
#else /* CONFIG_EXPOLINE */
|
||||
|
||||
.macro BASR_R14_R9
|
||||
basr %r14,%r9
|
||||
.endm
|
||||
|
||||
.macro BR_R1USE_R14
|
||||
br %r14
|
||||
.endm
|
||||
|
||||
.macro BR_R11USE_R14
|
||||
br %r14
|
||||
.endm
|
||||
|
||||
#endif /* CONFIG_EXPOLINE */
|
||||
|
||||
GEN_BR_THUNK %r9
|
||||
GEN_BR_THUNK %r14
|
||||
GEN_BR_THUNK %r14,%r11
|
||||
|
||||
.section .kprobes.text, "ax"
|
||||
.Ldummy:
|
||||
|
|
@ -303,7 +246,7 @@ _PIF_WORK = (_PIF_PER_TRAP)
|
|||
ENTRY(__bpon)
|
||||
.globl __bpon
|
||||
BPON
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
|
||||
/*
|
||||
* Scheduler resume function, called by switch_to
|
||||
|
|
@ -333,7 +276,7 @@ ENTRY(__switch_to)
|
|||
TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
|
||||
jz 0f
|
||||
.insn s,0xb2800000,__LC_LPP # set program parameter
|
||||
0: BR_R1USE_R14
|
||||
0: BR_EX %r14
|
||||
|
||||
.L__critical_start:
|
||||
|
||||
|
|
@ -399,7 +342,7 @@ sie_exit:
|
|||
xgr %r5,%r5
|
||||
lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
|
||||
lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lsie_fault:
|
||||
lghi %r14,-EFAULT
|
||||
stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
|
||||
|
|
@ -458,7 +401,7 @@ ENTRY(system_call)
|
|||
lgf %r9,0(%r8,%r10) # get system call add.
|
||||
TSTMSK __TI_flags(%r12),_TIF_TRACE
|
||||
jnz .Lsysc_tracesys
|
||||
BASR_R14_R9 # call sys_xxxx
|
||||
BASR_EX %r14,%r9 # call sys_xxxx
|
||||
stg %r2,__PT_R2(%r11) # store return value
|
||||
|
||||
.Lsysc_return:
|
||||
|
|
@ -598,7 +541,7 @@ ENTRY(system_call)
|
|||
lmg %r3,%r7,__PT_R3(%r11)
|
||||
stg %r7,STACK_FRAME_OVERHEAD(%r15)
|
||||
lg %r2,__PT_ORIG_GPR2(%r11)
|
||||
BASR_R14_R9 # call sys_xxx
|
||||
BASR_EX %r14,%r9 # call sys_xxx
|
||||
stg %r2,__PT_R2(%r11) # store return value
|
||||
.Lsysc_tracenogo:
|
||||
TSTMSK __TI_flags(%r12),_TIF_TRACE
|
||||
|
|
@ -622,7 +565,7 @@ ENTRY(ret_from_fork)
|
|||
lmg %r9,%r10,__PT_R9(%r11) # load gprs
|
||||
ENTRY(kernel_thread_starter)
|
||||
la %r2,0(%r10)
|
||||
BASR_R14_R9
|
||||
BASR_EX %r14,%r9
|
||||
j .Lsysc_tracenogo
|
||||
|
||||
/*
|
||||
|
|
@ -698,7 +641,7 @@ ENTRY(pgm_check_handler)
|
|||
je .Lpgm_return
|
||||
lgf %r9,0(%r10,%r1) # load address of handler routine
|
||||
lgr %r2,%r11 # pass pointer to pt_regs
|
||||
BASR_R14_R9 # branch to interrupt-handler
|
||||
BASR_EX %r14,%r9 # branch to interrupt-handler
|
||||
.Lpgm_return:
|
||||
LOCKDEP_SYS_EXIT
|
||||
tm __PT_PSW+1(%r11),0x01 # returning to user ?
|
||||
|
|
@ -976,7 +919,7 @@ ENTRY(psw_idle)
|
|||
stpt __TIMER_IDLE_ENTER(%r2)
|
||||
.Lpsw_idle_lpsw:
|
||||
lpswe __SF_EMPTY(%r15)
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lpsw_idle_end:
|
||||
|
||||
/*
|
||||
|
|
@ -1021,7 +964,7 @@ ENTRY(save_fpu_regs)
|
|||
.Lsave_fpu_regs_done:
|
||||
oi __LC_CPU_FLAGS+7,_CIF_FPU
|
||||
.Lsave_fpu_regs_exit:
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lsave_fpu_regs_end:
|
||||
#if IS_ENABLED(CONFIG_KVM)
|
||||
EXPORT_SYMBOL(save_fpu_regs)
|
||||
|
|
@ -1071,7 +1014,7 @@ load_fpu_regs:
|
|||
.Lload_fpu_regs_done:
|
||||
ni __LC_CPU_FLAGS+7,255-_CIF_FPU
|
||||
.Lload_fpu_regs_exit:
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lload_fpu_regs_end:
|
||||
|
||||
.L__critical_end:
|
||||
|
|
@ -1244,7 +1187,7 @@ cleanup_critical:
|
|||
jl 0f
|
||||
clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
|
||||
jl .Lcleanup_load_fpu_regs
|
||||
0: BR_R11USE_R14
|
||||
0: BR_EX %r14
|
||||
|
||||
.align 8
|
||||
.Lcleanup_table:
|
||||
|
|
@ -1274,7 +1217,7 @@ cleanup_critical:
|
|||
ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
|
||||
lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
|
||||
larl %r9,sie_exit # skip forward to sie_exit
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14
|
||||
#endif
|
||||
|
||||
.Lcleanup_system_call:
|
||||
|
|
@ -1332,7 +1275,7 @@ cleanup_critical:
|
|||
stg %r15,56(%r11) # r15 stack pointer
|
||||
# set new psw address and exit
|
||||
larl %r9,.Lsysc_do_svc
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_system_call_insn:
|
||||
.quad system_call
|
||||
.quad .Lsysc_stmg
|
||||
|
|
@ -1342,7 +1285,7 @@ cleanup_critical:
|
|||
|
||||
.Lcleanup_sysc_tif:
|
||||
larl %r9,.Lsysc_tif
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
.Lcleanup_sysc_restore:
|
||||
# check if stpt has been executed
|
||||
|
|
@ -1359,14 +1302,14 @@ cleanup_critical:
|
|||
mvc 0(64,%r11),__PT_R8(%r9)
|
||||
lmg %r0,%r7,__PT_R0(%r9)
|
||||
1: lmg %r8,%r9,__LC_RETURN_PSW
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_sysc_restore_insn:
|
||||
.quad .Lsysc_exit_timer
|
||||
.quad .Lsysc_done - 4
|
||||
|
||||
.Lcleanup_io_tif:
|
||||
larl %r9,.Lio_tif
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
.Lcleanup_io_restore:
|
||||
# check if stpt has been executed
|
||||
|
|
@ -1380,7 +1323,7 @@ cleanup_critical:
|
|||
mvc 0(64,%r11),__PT_R8(%r9)
|
||||
lmg %r0,%r7,__PT_R0(%r9)
|
||||
1: lmg %r8,%r9,__LC_RETURN_PSW
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_io_restore_insn:
|
||||
.quad .Lio_exit_timer
|
||||
.quad .Lio_done - 4
|
||||
|
|
@ -1433,17 +1376,17 @@ cleanup_critical:
|
|||
# prepare return psw
|
||||
nihh %r8,0xfcfd # clear irq & wait state bits
|
||||
lg %r9,48(%r11) # return from psw_idle
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_idle_insn:
|
||||
.quad .Lpsw_idle_lpsw
|
||||
|
||||
.Lcleanup_save_fpu_regs:
|
||||
larl %r9,save_fpu_regs
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
.Lcleanup_load_fpu_regs:
|
||||
larl %r9,load_fpu_regs
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
/*
|
||||
* Integer constants
|
||||
|
|
|
|||
|
|
@ -8,13 +8,17 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/ftrace.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
GEN_BR_THUNK %r1
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
.section .kprobes.text, "ax"
|
||||
|
||||
ENTRY(ftrace_stub)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
#define STACK_FRAME_SIZE (STACK_FRAME_OVERHEAD + __PT_SIZE)
|
||||
#define STACK_PTREGS (STACK_FRAME_OVERHEAD)
|
||||
|
|
@ -22,7 +26,7 @@ ENTRY(ftrace_stub)
|
|||
#define STACK_PTREGS_PSW (STACK_PTREGS + __PT_PSW)
|
||||
|
||||
ENTRY(_mcount)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
EXPORT_SYMBOL(_mcount)
|
||||
|
||||
|
|
@ -52,7 +56,7 @@ ENTRY(ftrace_caller)
|
|||
#endif
|
||||
lgr %r3,%r14
|
||||
la %r5,STACK_PTREGS(%r15)
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r1
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
# The j instruction gets runtime patched to a nop instruction.
|
||||
# See ftrace_enable_ftrace_graph_caller.
|
||||
|
|
@ -67,7 +71,7 @@ ftrace_graph_caller_end:
|
|||
#endif
|
||||
lg %r1,(STACK_PTREGS_PSW+8)(%r15)
|
||||
lmg %r2,%r15,(STACK_PTREGS_GPRS+2*8)(%r15)
|
||||
br %r1
|
||||
BR_EX %r1
|
||||
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
|
||||
|
|
@ -80,6 +84,6 @@ ENTRY(return_to_handler)
|
|||
aghi %r15,STACK_FRAME_OVERHEAD
|
||||
lgr %r14,%r2
|
||||
lmg %r2,%r5,32(%r15)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -44,24 +44,6 @@ static int __init nospec_report(void)
|
|||
}
|
||||
arch_initcall(nospec_report);
|
||||
|
||||
#ifdef CONFIG_SYSFS
|
||||
ssize_t cpu_show_spectre_v1(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "Mitigation: __user pointer sanitization\n");
|
||||
}
|
||||
|
||||
ssize_t cpu_show_spectre_v2(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable)
|
||||
return sprintf(buf, "Mitigation: execute trampolines\n");
|
||||
if (__test_facility(82, S390_lowcore.alt_stfle_fac_list))
|
||||
return sprintf(buf, "Mitigation: limited branch prediction.\n");
|
||||
return sprintf(buf, "Vulnerable\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_EXPOLINE
|
||||
|
||||
int nospec_disable = IS_ENABLED(CONFIG_EXPOLINE_OFF);
|
||||
|
|
@ -112,7 +94,6 @@ static void __init_or_module __nospec_revert(s32 *start, s32 *end)
|
|||
s32 *epo;
|
||||
|
||||
/* Second part of the instruction replace is always a nop */
|
||||
memcpy(insnbuf + 2, (char[]) { 0x47, 0x00, 0x00, 0x00 }, 4);
|
||||
for (epo = start; epo < end; epo++) {
|
||||
instr = (u8 *) epo + *epo;
|
||||
if (instr[0] == 0xc0 && (instr[1] & 0x0f) == 0x04)
|
||||
|
|
@ -133,18 +114,34 @@ static void __init_or_module __nospec_revert(s32 *start, s32 *end)
|
|||
br = thunk + (*(int *)(thunk + 2)) * 2;
|
||||
else
|
||||
continue;
|
||||
if (br[0] != 0x07 || (br[1] & 0xf0) != 0xf0)
|
||||
/* Check for unconditional branch 0x07f? or 0x47f???? */
|
||||
if ((br[0] & 0xbf) != 0x07 || (br[1] & 0xf0) != 0xf0)
|
||||
continue;
|
||||
|
||||
memcpy(insnbuf + 2, (char[]) { 0x47, 0x00, 0x07, 0x00 }, 4);
|
||||
switch (type) {
|
||||
case BRCL_EXPOLINE:
|
||||
/* brcl to thunk, replace with br + nop */
|
||||
insnbuf[0] = br[0];
|
||||
insnbuf[1] = (instr[1] & 0xf0) | (br[1] & 0x0f);
|
||||
if (br[0] == 0x47) {
|
||||
/* brcl to b, replace with bc + nopr */
|
||||
insnbuf[2] = br[2];
|
||||
insnbuf[3] = br[3];
|
||||
} else {
|
||||
/* brcl to br, replace with bcr + nop */
|
||||
}
|
||||
break;
|
||||
case BRASL_EXPOLINE:
|
||||
/* brasl to thunk, replace with basr + nop */
|
||||
insnbuf[0] = 0x0d;
|
||||
insnbuf[1] = (instr[1] & 0xf0) | (br[1] & 0x0f);
|
||||
if (br[0] == 0x47) {
|
||||
/* brasl to b, replace with bas + nopr */
|
||||
insnbuf[0] = 0x4d;
|
||||
insnbuf[2] = br[2];
|
||||
insnbuf[3] = br[3];
|
||||
} else {
|
||||
/* brasl to br, replace with basr + nop */
|
||||
insnbuf[0] = 0x0d;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
|||
21
arch/s390/kernel/nospec-sysfs.c
Normal file
21
arch/s390/kernel/nospec-sysfs.c
Normal file
|
|
@ -0,0 +1,21 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/device.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <asm/facility.h>
|
||||
#include <asm/nospec-branch.h>
|
||||
|
||||
ssize_t cpu_show_spectre_v1(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "Mitigation: __user pointer sanitization\n");
|
||||
}
|
||||
|
||||
ssize_t cpu_show_spectre_v2(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable)
|
||||
return sprintf(buf, "Mitigation: execute trampolines\n");
|
||||
if (__test_facility(82, S390_lowcore.alt_stfle_fac_list))
|
||||
return sprintf(buf, "Mitigation: limited branch prediction\n");
|
||||
return sprintf(buf, "Vulnerable\n");
|
||||
}
|
||||
|
|
@ -6,8 +6,11 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/sigp.h>
|
||||
|
||||
GEN_BR_THUNK %r9
|
||||
|
||||
#
|
||||
# Issue "store status" for the current CPU to its prefix page
|
||||
# and call passed function afterwards
|
||||
|
|
@ -66,9 +69,9 @@ ENTRY(store_status)
|
|||
st %r4,0(%r1)
|
||||
st %r5,4(%r1)
|
||||
stg %r2,8(%r1)
|
||||
lgr %r1,%r2
|
||||
lgr %r9,%r2
|
||||
lgr %r2,%r3
|
||||
br %r1
|
||||
BR_EX %r9
|
||||
|
||||
.section .bss
|
||||
.align 8
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#include <asm/ptrace.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/sigp.h>
|
||||
|
||||
/*
|
||||
|
|
@ -23,6 +24,8 @@
|
|||
* (see below) in the resume process.
|
||||
* This function runs with disabled interrupts.
|
||||
*/
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
.section .text
|
||||
ENTRY(swsusp_arch_suspend)
|
||||
stmg %r6,%r15,__SF_GPRS(%r15)
|
||||
|
|
@ -102,7 +105,7 @@ ENTRY(swsusp_arch_suspend)
|
|||
spx 0x318(%r1)
|
||||
lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
|
||||
lghi %r2,0
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
/*
|
||||
* Restore saved memory image to correct place and restore register context.
|
||||
|
|
@ -200,7 +203,7 @@ pgm_check_entry:
|
|||
lghi %r1,0
|
||||
sam31
|
||||
sigp %r1,%r0,SIGP_SET_ARCHITECTURE
|
||||
basr %r14,%r3
|
||||
brasl %r14,_sclp_print_early
|
||||
larl %r3,.Ldisabled_wait_31
|
||||
lpsw 0(%r3)
|
||||
4:
|
||||
|
|
@ -266,7 +269,7 @@ restore_registers:
|
|||
/* Return 0 */
|
||||
lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
|
||||
lghi %r2,0
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
.section .data..nosave,"aw",@progbits
|
||||
.align 8
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/export.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
/*
|
||||
* memset implementation
|
||||
|
|
@ -39,7 +42,7 @@ ENTRY(memset)
|
|||
.Lmemset_clear_rest:
|
||||
larl %r3,.Lmemset_xc
|
||||
ex %r4,0(%r3)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemset_fill:
|
||||
stc %r3,0(%r2)
|
||||
cghi %r4,1
|
||||
|
|
@ -56,7 +59,7 @@ ENTRY(memset)
|
|||
.Lmemset_fill_rest:
|
||||
larl %r3,.Lmemset_mvc
|
||||
ex %r4,0(%r3)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemset_xc:
|
||||
xc 0(1,%r1),0(%r1)
|
||||
.Lmemset_mvc:
|
||||
|
|
@ -79,7 +82,7 @@ ENTRY(memcpy)
|
|||
.Lmemcpy_rest:
|
||||
larl %r5,.Lmemcpy_mvc
|
||||
ex %r4,0(%r5)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemcpy_loop:
|
||||
mvc 0(256,%r1),0(%r3)
|
||||
la %r1,256(%r1)
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include "bpf_jit.h"
|
||||
|
||||
/*
|
||||
|
|
@ -53,7 +54,7 @@ ENTRY(sk_load_##NAME##_pos); \
|
|||
clg %r3,STK_OFF_HLEN(%r15); /* Offset + SIZE > hlen? */ \
|
||||
jh sk_load_##NAME##_slow; \
|
||||
LOAD %r14,-SIZE(%r3,%r12); /* Get data from skb */ \
|
||||
b OFF_OK(%r6); /* Return */ \
|
||||
B_EX OFF_OK,%r6; /* Return */ \
|
||||
\
|
||||
sk_load_##NAME##_slow:; \
|
||||
lgr %r2,%r7; /* Arg1 = skb pointer */ \
|
||||
|
|
@ -63,11 +64,14 @@ sk_load_##NAME##_slow:; \
|
|||
brasl %r14,skb_copy_bits; /* Get data from skb */ \
|
||||
LOAD %r14,STK_OFF_TMP(%r15); /* Load from temp bufffer */ \
|
||||
ltgr %r2,%r2; /* Set cc to (%r2 != 0) */ \
|
||||
br %r6; /* Return */
|
||||
BR_EX %r6; /* Return */
|
||||
|
||||
sk_load_common(word, 4, llgf) /* r14 = *(u32 *) (skb->data+offset) */
|
||||
sk_load_common(half, 2, llgh) /* r14 = *(u16 *) (skb->data+offset) */
|
||||
|
||||
GEN_BR_THUNK %r6
|
||||
GEN_B_THUNK OFF_OK,%r6
|
||||
|
||||
/*
|
||||
* Load 1 byte from SKB (optimized version)
|
||||
*/
|
||||
|
|
@ -79,7 +83,7 @@ ENTRY(sk_load_byte_pos)
|
|||
clg %r3,STK_OFF_HLEN(%r15) # Offset >= hlen?
|
||||
jnl sk_load_byte_slow
|
||||
llgc %r14,0(%r3,%r12) # Get byte from skb
|
||||
b OFF_OK(%r6) # Return OK
|
||||
B_EX OFF_OK,%r6 # Return OK
|
||||
|
||||
sk_load_byte_slow:
|
||||
lgr %r2,%r7 # Arg1 = skb pointer
|
||||
|
|
@ -89,7 +93,7 @@ sk_load_byte_slow:
|
|||
brasl %r14,skb_copy_bits # Get data from skb
|
||||
llgc %r14,STK_OFF_TMP(%r15) # Load result from temp buffer
|
||||
ltgr %r2,%r2 # Set cc to (%r2 != 0)
|
||||
br %r6 # Return cc
|
||||
BR_EX %r6 # Return cc
|
||||
|
||||
#define sk_negative_common(NAME, SIZE, LOAD) \
|
||||
sk_load_##NAME##_slow_neg:; \
|
||||
|
|
@ -103,7 +107,7 @@ sk_load_##NAME##_slow_neg:; \
|
|||
jz bpf_error; \
|
||||
LOAD %r14,0(%r2); /* Get data from pointer */ \
|
||||
xr %r3,%r3; /* Set cc to zero */ \
|
||||
br %r6; /* Return cc */
|
||||
BR_EX %r6; /* Return cc */
|
||||
|
||||
sk_negative_common(word, 4, llgf)
|
||||
sk_negative_common(half, 2, llgh)
|
||||
|
|
@ -112,4 +116,4 @@ sk_negative_common(byte, 1, llgc)
|
|||
bpf_error:
|
||||
# force a return 0 from jit handler
|
||||
ltgr %r15,%r15 # Set condition code
|
||||
br %r6
|
||||
BR_EX %r6
|
||||
|
|
|
|||
|
|
@ -24,6 +24,8 @@
|
|||
#include <linux/bpf.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/dis.h>
|
||||
#include <asm/facility.h>
|
||||
#include <asm/nospec-branch.h>
|
||||
#include "bpf_jit.h"
|
||||
|
||||
int bpf_jit_enable __read_mostly;
|
||||
|
|
@ -41,6 +43,8 @@ struct bpf_jit {
|
|||
int base_ip; /* Base address for literal pool */
|
||||
int ret0_ip; /* Address of return 0 */
|
||||
int exit_ip; /* Address of exit */
|
||||
int r1_thunk_ip; /* Address of expoline thunk for 'br %r1' */
|
||||
int r14_thunk_ip; /* Address of expoline thunk for 'br %r14' */
|
||||
int tail_call_start; /* Tail call start offset */
|
||||
int labels[1]; /* Labels for local jumps */
|
||||
};
|
||||
|
|
@ -251,6 +255,19 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
|
|||
REG_SET_SEEN(b2); \
|
||||
})
|
||||
|
||||
#define EMIT6_PCREL_RILB(op, b, target) \
|
||||
({ \
|
||||
int rel = (target - jit->prg) / 2; \
|
||||
_EMIT6(op | reg_high(b) << 16 | rel >> 16, rel & 0xffff); \
|
||||
REG_SET_SEEN(b); \
|
||||
})
|
||||
|
||||
#define EMIT6_PCREL_RIL(op, target) \
|
||||
({ \
|
||||
int rel = (target - jit->prg) / 2; \
|
||||
_EMIT6(op | rel >> 16, rel & 0xffff); \
|
||||
})
|
||||
|
||||
#define _EMIT6_IMM(op, imm) \
|
||||
({ \
|
||||
unsigned int __imm = (imm); \
|
||||
|
|
@ -470,8 +487,45 @@ static void bpf_jit_epilogue(struct bpf_jit *jit)
|
|||
EMIT4(0xb9040000, REG_2, BPF_REG_0);
|
||||
/* Restore registers */
|
||||
save_restore_regs(jit, REGS_RESTORE);
|
||||
if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable) {
|
||||
jit->r14_thunk_ip = jit->prg;
|
||||
/* Generate __s390_indirect_jump_r14 thunk */
|
||||
if (test_facility(35)) {
|
||||
/* exrl %r0,.+10 */
|
||||
EMIT6_PCREL_RIL(0xc6000000, jit->prg + 10);
|
||||
} else {
|
||||
/* larl %r1,.+14 */
|
||||
EMIT6_PCREL_RILB(0xc0000000, REG_1, jit->prg + 14);
|
||||
/* ex 0,0(%r1) */
|
||||
EMIT4_DISP(0x44000000, REG_0, REG_1, 0);
|
||||
}
|
||||
/* j . */
|
||||
EMIT4_PCREL(0xa7f40000, 0);
|
||||
}
|
||||
/* br %r14 */
|
||||
_EMIT2(0x07fe);
|
||||
|
||||
if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable &&
|
||||
(jit->seen & SEEN_FUNC)) {
|
||||
jit->r1_thunk_ip = jit->prg;
|
||||
/* Generate __s390_indirect_jump_r1 thunk */
|
||||
if (test_facility(35)) {
|
||||
/* exrl %r0,.+10 */
|
||||
EMIT6_PCREL_RIL(0xc6000000, jit->prg + 10);
|
||||
/* j . */
|
||||
EMIT4_PCREL(0xa7f40000, 0);
|
||||
/* br %r1 */
|
||||
_EMIT2(0x07f1);
|
||||
} else {
|
||||
/* larl %r1,.+14 */
|
||||
EMIT6_PCREL_RILB(0xc0000000, REG_1, jit->prg + 14);
|
||||
/* ex 0,S390_lowcore.br_r1_tampoline */
|
||||
EMIT4_DISP(0x44000000, REG_0, REG_0,
|
||||
offsetof(struct lowcore, br_r1_trampoline));
|
||||
/* j . */
|
||||
EMIT4_PCREL(0xa7f40000, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -977,8 +1031,13 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i
|
|||
/* lg %w1,<d(imm)>(%l) */
|
||||
EMIT6_DISP_LH(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
|
||||
EMIT_CONST_U64(func));
|
||||
/* basr %r14,%w1 */
|
||||
EMIT2(0x0d00, REG_14, REG_W1);
|
||||
if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable) {
|
||||
/* brasl %r14,__s390_indirect_jump_r1 */
|
||||
EMIT6_PCREL_RILB(0xc0050000, REG_14, jit->r1_thunk_ip);
|
||||
} else {
|
||||
/* basr %r14,%w1 */
|
||||
EMIT2(0x0d00, REG_14, REG_W1);
|
||||
}
|
||||
/* lgr %b0,%r2: load return value into %b0 */
|
||||
EMIT4(0xb9040000, BPF_REG_0, REG_2);
|
||||
if (bpf_helper_changes_skb_data((void *)func)) {
|
||||
|
|
|
|||
|
|
@ -71,12 +71,17 @@ static void load_segments(void)
|
|||
static void machine_kexec_free_page_tables(struct kimage *image)
|
||||
{
|
||||
free_page((unsigned long)image->arch.pgd);
|
||||
image->arch.pgd = NULL;
|
||||
#ifdef CONFIG_X86_PAE
|
||||
free_page((unsigned long)image->arch.pmd0);
|
||||
image->arch.pmd0 = NULL;
|
||||
free_page((unsigned long)image->arch.pmd1);
|
||||
image->arch.pmd1 = NULL;
|
||||
#endif
|
||||
free_page((unsigned long)image->arch.pte0);
|
||||
image->arch.pte0 = NULL;
|
||||
free_page((unsigned long)image->arch.pte1);
|
||||
image->arch.pte1 = NULL;
|
||||
}
|
||||
|
||||
static int machine_kexec_alloc_page_tables(struct kimage *image)
|
||||
|
|
@ -93,7 +98,6 @@ static int machine_kexec_alloc_page_tables(struct kimage *image)
|
|||
!image->arch.pmd0 || !image->arch.pmd1 ||
|
||||
#endif
|
||||
!image->arch.pte0 || !image->arch.pte1) {
|
||||
machine_kexec_free_page_tables(image);
|
||||
return -ENOMEM;
|
||||
}
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -37,8 +37,11 @@ static struct kexec_file_ops *kexec_file_loaders[] = {
|
|||
static void free_transition_pgtable(struct kimage *image)
|
||||
{
|
||||
free_page((unsigned long)image->arch.pud);
|
||||
image->arch.pud = NULL;
|
||||
free_page((unsigned long)image->arch.pmd);
|
||||
image->arch.pmd = NULL;
|
||||
free_page((unsigned long)image->arch.pte);
|
||||
image->arch.pte = NULL;
|
||||
}
|
||||
|
||||
static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
|
||||
|
|
@ -79,7 +82,6 @@ static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
|
|||
set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL_EXEC));
|
||||
return 0;
|
||||
err:
|
||||
free_transition_pgtable(image);
|
||||
return result;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -345,6 +345,9 @@ static const struct usb_device_id blacklist_table[] = {
|
|||
{ USB_DEVICE(0x13d3, 0x3459), .driver_info = BTUSB_REALTEK },
|
||||
{ USB_DEVICE(0x13d3, 0x3494), .driver_info = BTUSB_REALTEK },
|
||||
|
||||
/* Additional Realtek 8723BU Bluetooth devices */
|
||||
{ USB_DEVICE(0x7392, 0xa611), .driver_info = BTUSB_REALTEK },
|
||||
|
||||
/* Additional Realtek 8821AE Bluetooth devices */
|
||||
{ USB_DEVICE(0x0b05, 0x17dc), .driver_info = BTUSB_REALTEK },
|
||||
{ USB_DEVICE(0x13d3, 0x3414), .driver_info = BTUSB_REALTEK },
|
||||
|
|
@ -352,6 +355,9 @@ static const struct usb_device_id blacklist_table[] = {
|
|||
{ USB_DEVICE(0x13d3, 0x3461), .driver_info = BTUSB_REALTEK },
|
||||
{ USB_DEVICE(0x13d3, 0x3462), .driver_info = BTUSB_REALTEK },
|
||||
|
||||
/* Additional Realtek 8822BE Bluetooth devices */
|
||||
{ USB_DEVICE(0x0b05, 0x185c), .driver_info = BTUSB_REALTEK },
|
||||
|
||||
/* Silicon Wave based devices */
|
||||
{ USB_DEVICE(0x0c10, 0x0000), .driver_info = BTUSB_SWAVE },
|
||||
|
||||
|
|
|
|||
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