Merge remote-tracking branch '4.9/tmp-9ae2c67' into 4.9
* 4.9/tmp-9ae2c67:
Linux 4.9.40
alarmtimer: don't rate limit one-shot timers
tracing: Fix kmemleak in instance_rmdir
PM / Domains: defer dev_pm_domain_set() until genpd->attach_dev succeeds if present
reiserfs: Don't clear SGID when inheriting ACLs
spmi: Include OF based modalias in device uevent
of: device: Export of_device_{get_modalias, uvent_modalias} to modules
acpi/nfit: Fix memory corruption/Unregister mce decoder on failure
ovl: fix random return value on mount
hfsplus: Don't clear SGID when inheriting ACLs
mlx5: Avoid that mlx5_ib_sg_to_klms() overflows the klms[] array
drm/mst: Avoid processing partially received up/down message transactions
drm/mst: Avoid dereferencing a NULL mstb in drm_dp_mst_handle_up_req()
drm/mst: Fix error handling during MST sideband message reception
RDMA/core: Initialize port_num in qp_attr
ceph: fix race in concurrent readdir
staging: lustre: ko2iblnd: check copy_from_iter/copy_to_iter return code
staging: sm750fb: avoid conflicting vesafb
staging: comedi: ni_mio_common: fix AO timer off-by-one regression
staging: rtl8188eu: add TL-WN722N v2 support
Revert "perf/core: Drop kernel samples even though :u is specified"
perf annotate: Fix broken arrow at row 0 connecting jmp instruction to its target
iser-target: Avoid isert_conn->cm_id dereference in isert_login_recv_done
target: Fix COMPARE_AND_WRITE caw_sem leak during se_cmd quiesce
udf: Fix deadlock between writeback and udf_setsize()
NFS: only invalidate dentrys that are clearly invalid.
sunrpc: use constant time memory comparison for mac
IB/core: Namespace is mandatory input for address resolution
IB/iser: Fix connection teardown race condition
Input: i8042 - fix crash at boot time
MIPS: Fix a typo: s/preset/present/ in r2-to-r6 emulation error message
MIPS: Send SIGILL for R6 branches in `__compute_return_epc_for_insn'
MIPS: Send SIGILL for linked branches in `__compute_return_epc_for_insn'
MIPS: Rename `sigill_r6' to `sigill_r2r6' in `__compute_return_epc_for_insn'
MIPS: Send SIGILL for BPOSGE32 in `__compute_return_epc_for_insn'
MIPS: math-emu: Prevent wrong ISA mode instruction emulation
MIPS: Fix unaligned PC interpretation in `compute_return_epc'
MIPS: Actually decode JALX in `__compute_return_epc_for_insn'
MIPS: Save static registers before sysmips
MIPS: Fix MIPS I ISA /proc/cpuinfo reporting
x86/ioapic: Pass the correct data to unmask_ioapic_irq()
x86/acpi: Prevent out of bound access caused by broken ACPI tables
Revert "ACPI / EC: Enable event freeze mode..." to fix a regression
ACPI / EC: Drop EC noirq hooks to fix a regression
ubifs: Don't leak kernel memory to the MTD
MIPS: Negate error syscall return in trace
MIPS: Fix mips_atomic_set() with EVA
MIPS: Fix mips_atomic_set() retry condition
ftrace: Fix uninitialized variable in match_records()
nvme-rdma: remove race conditions from IB signalling
vfio: New external user group/file match
vfio: Fix group release deadlock
ovl: drop CAP_SYS_RESOURCE from saved mounter's credentials
drm/ttm: Fix use-after-free in ttm_bo_clean_mm
f2fs: Don't clear SGID when inheriting ACLs
f2fs: sanity check size of nat and sit cache
xfs: Don't clear SGID when inheriting ACLs
ipmi:ssif: Add missing unlock in error branch
ipmi: use rcu lock around call to intf->handlers->sender()
drm/radeon: Fix eDP for single-display iMac10,1 (v2)
drm/radeon/ci: disable mclk switching for high refresh rates (v2)
drm/amd/amdgpu: Return error if initiating read out of range on vram
s390/syscalls: Fix out of bounds arguments access
Raid5 should update rdev->sectors after reshape
ext2: Don't clear SGID when inheriting ACLs
libnvdimm: fix badblock range handling of ARS range
libnvdimm, btt: fix btt_rw_page not returning errors
cx88: Fix regression in initial video standard setting
x86/xen: allow userspace access during hypercalls
md: don't use flush_signals in userspace processes
usb: renesas_usbhs: gadget: disable all eps when the driver stops
usb: renesas_usbhs: fix usbhsc_resume() for !USBHSF_RUNTIME_PWCTRL
USB: cdc-acm: add device-id for quirky printer
usb: storage: return on error to avoid a null pointer dereference
mxl111sf: Fix driver to use heap allocate buffers for USB messages
xhci: Bad Ethernet performance plugged in ASM1042A host
xhci: Fix NULL pointer dereference when cleaning up streams for removed host
xhci: fix 20000ms port resume timeout
ipvs: SNAT packet replies only for NATed connections
PCI/PM: Restore the status of PCI devices across hibernation
PCI: rockchip: Use normal register bank for config accessors
PCI: Work around poweroff & suspend-to-RAM issue on Macbook Pro 11
af_key: Fix sadb_x_ipsecrequest parsing
powerpc/mm/radix: Properly clear process table entry
powerpc/asm: Mark cr0 as clobbered in mftb()
powerpc: Fix emulation of mfocrf in emulate_step()
powerpc: Fix emulation of mcrf in emulate_step()
powerpc/64: Fix atomic64_inc_not_zero() to return an int
powerpc/pseries: Fix passing of pp0 in updatepp() and updateboltedpp()
xen/scsiback: Fix a TMR related use-after-free
iscsi-target: Add login_keys_workaround attribute for non RFC initiators
scsi: Add STARGET_CREATED_REMOVE state to scsi_target_state
scsi: ses: do not add a device to an enclosure if enclosure_add_links() fails.
PM / Domains: Fix unsafe iteration over modified list of domains
PM / Domains: Fix unsafe iteration over modified list of domain providers
PM / Domains: Fix unsafe iteration over modified list of device links
ASoC: compress: Derive substream from stream based on direction
igb: Explicitly select page 0 at initialization
btrfs: Don't clear SGID when inheriting ACLs
wlcore: fix 64K page support
Bluetooth: use constant time memory comparison for secret values
perf intel-pt: Clear FUP flag on error
perf intel-pt: Use FUP always when scanning for an IP
perf intel-pt: Ensure never to set 'last_ip' when packet 'count' is zero
perf intel-pt: Fix last_ip usage
perf intel-pt: Ensure IP is zero when state is INTEL_PT_STATE_NO_IP
perf intel-pt: Fix missing stack clear
perf intel-pt: Improve sample timestamp
perf intel-pt: Move decoder error setting into one condition
NFC: Add sockaddr length checks before accessing sa_family in bind handlers
nfc: Fix the sockaddr length sanitization in llcp_sock_connect
nfc: Ensure presence of required attributes in the activate_target handler
NFC: nfcmrvl: fix firmware-management initialisation
NFC: nfcmrvl: use nfc-device for firmware download
NFC: nfcmrvl: do not use device-managed resources
NFC: nfcmrvl_uart: add missing tty-device sanity check
NFC: fix broken device allocation
ath9k: fix an invalid pointer dereference in ath9k_rng_stop()
ath9k: fix tx99 bus error
ath9k: fix tx99 use after free
thermal: cpu_cooling: Avoid accessing potentially freed structures
thermal: max77620: fix device-node reference imbalance
s5p-jpeg: don't return a random width/height
dm mpath: cleanup -Wbool-operation warning in choose_pgpath()
ir-core: fix gcc-7 warning on bool arithmetic
disable new gcc-7.1.1 warnings for now
Use %zu to print resid (size_t).
ANDROID: keychord: Fix a slab out-of-bounds read.
UPSTREAM: af_key: Fix sadb_x_ipsecrequest parsing
ANDROID: lowmemorykiller: Add tgid to kill message
Revert "ANDROID: proc: smaps: Allow smaps access for CAP_SYS_RESOURCE"
4.9.39
kvm: vmx: allow host to access guest MSR_IA32_BNDCFGS
kvm: vmx: Check value written to IA32_BNDCFGS
kvm: x86: Guest BNDCFGS requires guest MPX support
kvm: vmx: Do not disable intercepts for BNDCFGS
tracing: Use SOFTIRQ_OFFSET for softirq dectection for more accurate results
PM / QoS: return -EINVAL for bogus strings
PM / wakeirq: Convert to SRCU
sched/topology: Fix overlapping sched_group_mask
sched/topology: Optimize build_group_mask()
sched/topology: Fix building of overlapping sched-groups
sched/fair, cpumask: Export for_each_cpu_wrap()
Revert "sched/core: Optimize SCHED_SMT"
crypto: caam - fix signals handling
crypto: caam - properly set IV after {en,de}crypt
crypto: sha1-ssse3 - Disable avx2
crypto: atmel - only treat EBUSY as transient if backlog
crypto: talitos - Extend max key length for SHA384/512-HMAC and AEAD
mm: fix overflow check in expand_upwards()
selftests/capabilities: Fix the test_execve test
mnt: Make propagate_umount less slow for overlapping mount propagation trees
mnt: In propgate_umount handle visiting mounts in any order
mnt: In umount propagation reparent in a separate pass
nvmem: core: fix leaks on registration errors
rcu: Add memory barriers for NOCB leader wakeup
vt: fix unchecked __put_user() in tioclinux ioctls
ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers
exec: Limit arg stack to at most 75% of _STK_LIM
s390: reduce ELF_ET_DYN_BASE
powerpc: move ELF_ET_DYN_BASE to 4GB / 4MB
arm64: move ELF_ET_DYN_BASE to 4GB / 4MB
arm: move ELF_ET_DYN_BASE to 4MB
binfmt_elf: use ELF_ET_DYN_BASE only for PIE
checkpatch: silence perl 5.26.0 unescaped left brace warnings
fs/dcache.c: fix spin lockup issue on nlru->lock
mm/list_lru.c: fix list_lru_count_node() to be race free
kernel/extable.c: mark core_kernel_text notrace
thp, mm: fix crash due race in MADV_FREE handling
tools/lib/lockdep: Reduce MAX_LOCK_DEPTH to avoid overflowing lock_chain/: Depth
parisc/mm: Ensure IRQs are off in switch_mm()
parisc: DMA API: return error instead of BUG_ON for dma ops on non dma devs
parisc: use compat_sys_keyctl()
parisc: Report SIGSEGV instead of SIGBUS when running out of stack
irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity
cfg80211: Check if NAN service ID is of expected size
cfg80211: Check if PMKID attribute is of expected size
cfg80211: Validate frequencies nested in NL80211_ATTR_SCAN_FREQUENCIES
cfg80211: Define nla_policy for NL80211_ATTR_LOCAL_MESH_POWER_MODE
sfc: don't read beyond unicast address list
brcmfmac: Fix glom_skb leak in brcmf_sdiod_recv_chain
brcmfmac: Fix a memory leak in error handling path in 'brcmf_cfg80211_attach'
brcmfmac: fix possible buffer overflow in brcmf_cfg80211_mgmt_tx()
rds: tcp: use sock_create_lite() to create the accept socket
vrf: fix bug_on triggered by rx when destroying a vrf
net: ipv6: Compare lwstate in detecting duplicate nexthops
net: core: Fix slab-out-of-bounds in netdev_stats_to_stats64
vxlan: fix hlist corruption
ipv6: dad: don't remove dynamic addresses if link is down
net/mlx5e: Fix TX carrier errors report in get stats ndo
liquidio: fix bug in soft reset failure detection
net/mlx5: Cancel delayed recovery work when unloading the driver
net: handle NAPI_GRO_FREE_STOLEN_HEAD case also in napi_frags_finish()
bpf: prevent leaking pointer via xadd on unpriviledged
rocker: move dereference before free
bridge: mdb: fix leak on complete_info ptr on fail path
net: prevent sign extension in dev_get_stats()
tcp: reset sk_rx_dst in tcp_disconnect()
net: dp83640: Avoid NULL pointer dereference.
ipv6: avoid unregistering inet6_dev for loopback
net/phy: micrel: configure intterupts after autoneg workaround
net: sched: Fix one possible panic when no destroy callback
net_sched: fix error recovery at qdisc creation
xen-netfront: Rework the fix for Rx stall during OOM and network stress
ANDROID: android-verity: mark dev as rw for linear target
ANDROID: sdcardfs: Remove unnecessary lock
ANDROID: binder: don't check prio permissions on restore.
Add BINDER_GET_NODE_DEBUG_INFO ioctl
ANDROID: binder: add RT inheritance flag to node.
ANDROID: binder: improve priority inheritance.
ANDROID: binder: add min sched_policy to node.
ANDROID: binder: add support for RT prio inheritance.
ANDROID: binder: push new transactions to waiting threads.
ANDROID: binder: remove proc waitqueue
Conflicts:
drivers/staging/android/lowmemorykiller.c
Change-Id: I2954e47d7e4fc74cf9bb5033fc151537958b78af
Signed-off-by: Kyle Yan <kyan@codeaurora.org>
This commit is contained in:
commit
3dfb68c8ba
209 changed files with 2293 additions and 941 deletions
5
Makefile
5
Makefile
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|
@ -1,6 +1,6 @@
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VERSION = 4
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PATCHLEVEL = 9
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SUBLEVEL = 38
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SUBLEVEL = 40
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EXTRAVERSION =
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NAME = Roaring Lionus
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@ -633,6 +633,9 @@ include arch/$(SRCARCH)/Makefile
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KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks,)
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KBUILD_CFLAGS += $(call cc-disable-warning,frame-address,)
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KBUILD_CFLAGS += $(call cc-disable-warning, format-truncation)
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KBUILD_CFLAGS += $(call cc-disable-warning, format-overflow)
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KBUILD_CFLAGS += $(call cc-disable-warning, int-in-bool-context)
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ifdef CONFIG_LD_DEAD_CODE_DATA_ELIMINATION
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KBUILD_CFLAGS += $(call cc-option,-ffunction-sections,)
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|
|
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@ -112,12 +112,8 @@ int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
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#define CORE_DUMP_USE_REGSET
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#define ELF_EXEC_PAGESIZE 4096
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/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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use of this is to invoke "./ld.so someprog" to test out a new version of
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the loader. We need to make sure that it is out of the way of the program
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that it will "exec", and that there is sufficient room for the brk. */
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#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
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/* This is the base location for PIE (ET_DYN with INTERP) loads. */
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#define ELF_ET_DYN_BASE 0x400000UL
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/* When the program starts, a1 contains a pointer to a function to be
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registered with atexit, as per the SVR4 ABI. A value of 0 means we
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@ -75,14 +75,10 @@
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
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};
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soc {
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|
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@ -113,12 +113,11 @@
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#define ELF_EXEC_PAGESIZE PAGE_SIZE
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/*
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* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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* use of this is to invoke "./ld.so someprog" to test out a new version of
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* the loader. We need to make sure that it is out of the way of the program
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* that it will "exec", and that there is sufficient room for the brk.
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* This is the base location for PIE (ET_DYN with INTERP) loads. On
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* 64-bit, this is raised to 4GB to leave the entire 32-bit address
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* space open for things that want to use the area for 32-bit pointers.
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*/
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#define ELF_ET_DYN_BASE (2 * TASK_SIZE_64 / 3)
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#define ELF_ET_DYN_BASE 0x100000000UL
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#ifndef __ASSEMBLY__
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@ -169,7 +168,8 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
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#ifdef CONFIG_COMPAT
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#define COMPAT_ELF_ET_DYN_BASE (2 * TASK_SIZE_32 / 3)
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/* PIE load location for compat arm. Must match ARM ELF_ET_DYN_BASE. */
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#define COMPAT_ELF_ET_DYN_BASE 0x000400000UL
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/* AArch32 registers. */
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#define COMPAT_ELF_NGREG 18
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|
|
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|
@ -74,10 +74,7 @@ static inline int compute_return_epc(struct pt_regs *regs)
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return __microMIPS_compute_return_epc(regs);
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if (cpu_has_mips16)
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return __MIPS16e_compute_return_epc(regs);
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return regs->cp0_epc;
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}
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if (!delay_slot(regs)) {
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} else if (!delay_slot(regs)) {
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regs->cp0_epc += 4;
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return 0;
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}
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|
|
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|||
|
|
@ -399,7 +399,7 @@ int __MIPS16e_compute_return_epc(struct pt_regs *regs)
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*
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* @regs: Pointer to pt_regs
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* @insn: branch instruction to decode
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* @returns: -EFAULT on error and forces SIGBUS, and on success
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* @returns: -EFAULT on error and forces SIGILL, and on success
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* returns 0 or BRANCH_LIKELY_TAKEN as appropriate after
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* evaluating the branch.
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*
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|
|
@ -431,7 +431,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
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/* Fall through */
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case jr_op:
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if (NO_R6EMU && insn.r_format.func == jr_op)
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goto sigill_r6;
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goto sigill_r2r6;
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regs->cp0_epc = regs->regs[insn.r_format.rs];
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break;
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}
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|
|
@ -446,7 +446,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
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switch (insn.i_format.rt) {
|
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case bltzl_op:
|
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if (NO_R6EMU)
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goto sigill_r6;
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goto sigill_r2r6;
|
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case bltz_op:
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if ((long)regs->regs[insn.i_format.rs] < 0) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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|
|
@ -459,7 +459,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
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case bgezl_op:
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if (NO_R6EMU)
|
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goto sigill_r6;
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goto sigill_r2r6;
|
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case bgez_op:
|
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if ((long)regs->regs[insn.i_format.rs] >= 0) {
|
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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|
|
@ -473,10 +473,8 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
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case bltzal_op:
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case bltzall_op:
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if (NO_R6EMU && (insn.i_format.rs ||
|
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insn.i_format.rt == bltzall_op)) {
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ret = -SIGILL;
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break;
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}
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insn.i_format.rt == bltzall_op))
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goto sigill_r2r6;
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regs->regs[31] = epc + 8;
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/*
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* OK we are here either because we hit a NAL
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|
|
@ -507,10 +505,8 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
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case bgezal_op:
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case bgezall_op:
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if (NO_R6EMU && (insn.i_format.rs ||
|
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insn.i_format.rt == bgezall_op)) {
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ret = -SIGILL;
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break;
|
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}
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insn.i_format.rt == bgezall_op))
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goto sigill_r2r6;
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regs->regs[31] = epc + 8;
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/*
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* OK we are here either because we hit a BAL
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|
|
@ -556,6 +552,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
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/*
|
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* These are unconditional and in j_format.
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*/
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case jalx_op:
|
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case jal_op:
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regs->regs[31] = regs->cp0_epc + 8;
|
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case j_op:
|
||||
|
|
@ -573,7 +570,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
|||
*/
|
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case beql_op:
|
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if (NO_R6EMU)
|
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goto sigill_r6;
|
||||
goto sigill_r2r6;
|
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case beq_op:
|
||||
if (regs->regs[insn.i_format.rs] ==
|
||||
regs->regs[insn.i_format.rt]) {
|
||||
|
|
@ -587,7 +584,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
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|
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case bnel_op:
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if (NO_R6EMU)
|
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goto sigill_r6;
|
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goto sigill_r2r6;
|
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case bne_op:
|
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if (regs->regs[insn.i_format.rs] !=
|
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regs->regs[insn.i_format.rt]) {
|
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|
|
@ -601,7 +598,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
|||
|
||||
case blezl_op: /* not really i_format */
|
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if (!insn.i_format.rt && NO_R6EMU)
|
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goto sigill_r6;
|
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goto sigill_r2r6;
|
||||
case blez_op:
|
||||
/*
|
||||
* Compact branches for R6 for the
|
||||
|
|
@ -636,7 +633,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
|||
|
||||
case bgtzl_op:
|
||||
if (!insn.i_format.rt && NO_R6EMU)
|
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goto sigill_r6;
|
||||
goto sigill_r2r6;
|
||||
case bgtz_op:
|
||||
/*
|
||||
* Compact branches for R6 for the
|
||||
|
|
@ -774,35 +771,27 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
|||
#else
|
||||
case bc6_op:
|
||||
/* Only valid for MIPS R6 */
|
||||
if (!cpu_has_mips_r6) {
|
||||
ret = -SIGILL;
|
||||
break;
|
||||
}
|
||||
if (!cpu_has_mips_r6)
|
||||
goto sigill_r6;
|
||||
regs->cp0_epc += 8;
|
||||
break;
|
||||
case balc6_op:
|
||||
if (!cpu_has_mips_r6) {
|
||||
ret = -SIGILL;
|
||||
break;
|
||||
}
|
||||
if (!cpu_has_mips_r6)
|
||||
goto sigill_r6;
|
||||
/* Compact branch: BALC */
|
||||
regs->regs[31] = epc + 4;
|
||||
epc += 4 + (insn.i_format.simmediate << 2);
|
||||
regs->cp0_epc = epc;
|
||||
break;
|
||||
case pop66_op:
|
||||
if (!cpu_has_mips_r6) {
|
||||
ret = -SIGILL;
|
||||
break;
|
||||
}
|
||||
if (!cpu_has_mips_r6)
|
||||
goto sigill_r6;
|
||||
/* Compact branch: BEQZC || JIC */
|
||||
regs->cp0_epc += 8;
|
||||
break;
|
||||
case pop76_op:
|
||||
if (!cpu_has_mips_r6) {
|
||||
ret = -SIGILL;
|
||||
break;
|
||||
}
|
||||
if (!cpu_has_mips_r6)
|
||||
goto sigill_r6;
|
||||
/* Compact branch: BNEZC || JIALC */
|
||||
if (!insn.i_format.rs) {
|
||||
/* JIALC: set $31/ra */
|
||||
|
|
@ -814,10 +803,8 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
|||
case pop10_op:
|
||||
case pop30_op:
|
||||
/* Only valid for MIPS R6 */
|
||||
if (!cpu_has_mips_r6) {
|
||||
ret = -SIGILL;
|
||||
break;
|
||||
}
|
||||
if (!cpu_has_mips_r6)
|
||||
goto sigill_r6;
|
||||
/*
|
||||
* Compact branches:
|
||||
* bovc, beqc, beqzalc, bnvc, bnec, bnezlac
|
||||
|
|
@ -831,11 +818,17 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
|
|||
return ret;
|
||||
|
||||
sigill_dsp:
|
||||
printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
|
||||
force_sig(SIGBUS, current);
|
||||
pr_info("%s: DSP branch but not DSP ASE - sending SIGILL.\n",
|
||||
current->comm);
|
||||
force_sig(SIGILL, current);
|
||||
return -EFAULT;
|
||||
sigill_r2r6:
|
||||
pr_info("%s: R2 branch but r2-to-r6 emulator is not present - sending SIGILL.\n",
|
||||
current->comm);
|
||||
force_sig(SIGILL, current);
|
||||
return -EFAULT;
|
||||
sigill_r6:
|
||||
pr_info("%s: R2 branch but r2-to-r6 emulator is not preset - sending SIGILL.\n",
|
||||
pr_info("%s: R6 branch but no MIPSr6 ISA support - sending SIGILL.\n",
|
||||
current->comm);
|
||||
force_sig(SIGILL, current);
|
||||
return -EFAULT;
|
||||
|
|
|
|||
|
|
@ -83,7 +83,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
|||
}
|
||||
|
||||
seq_printf(m, "isa\t\t\t:");
|
||||
if (cpu_has_mips_r1)
|
||||
if (cpu_has_mips_1)
|
||||
seq_printf(m, " mips1");
|
||||
if (cpu_has_mips_2)
|
||||
seq_printf(m, "%s", " mips2");
|
||||
|
|
|
|||
|
|
@ -924,7 +924,7 @@ asmlinkage void syscall_trace_leave(struct pt_regs *regs)
|
|||
audit_syscall_exit(regs);
|
||||
|
||||
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
|
||||
trace_sys_exit(regs, regs->regs[2]);
|
||||
trace_sys_exit(regs, regs_return_value(regs));
|
||||
|
||||
if (test_thread_flag(TIF_SYSCALL_TRACE))
|
||||
tracehook_report_syscall_exit(regs, 0);
|
||||
|
|
|
|||
|
|
@ -371,7 +371,7 @@ EXPORT(sys_call_table)
|
|||
PTR sys_writev
|
||||
PTR sys_cacheflush
|
||||
PTR sys_cachectl
|
||||
PTR sys_sysmips
|
||||
PTR __sys_sysmips
|
||||
PTR sys_ni_syscall /* 4150 */
|
||||
PTR sys_getsid
|
||||
PTR sys_fdatasync
|
||||
|
|
|
|||
|
|
@ -311,7 +311,7 @@ EXPORT(sys_call_table)
|
|||
PTR sys_sched_getaffinity
|
||||
PTR sys_cacheflush
|
||||
PTR sys_cachectl
|
||||
PTR sys_sysmips
|
||||
PTR __sys_sysmips
|
||||
PTR sys_io_setup /* 5200 */
|
||||
PTR sys_io_destroy
|
||||
PTR sys_io_getevents
|
||||
|
|
|
|||
|
|
@ -302,7 +302,7 @@ EXPORT(sysn32_call_table)
|
|||
PTR compat_sys_sched_getaffinity
|
||||
PTR sys_cacheflush
|
||||
PTR sys_cachectl
|
||||
PTR sys_sysmips
|
||||
PTR __sys_sysmips
|
||||
PTR compat_sys_io_setup /* 6200 */
|
||||
PTR sys_io_destroy
|
||||
PTR compat_sys_io_getevents
|
||||
|
|
|
|||
|
|
@ -371,7 +371,7 @@ EXPORT(sys32_call_table)
|
|||
PTR compat_sys_writev
|
||||
PTR sys_cacheflush
|
||||
PTR sys_cachectl
|
||||
PTR sys_sysmips
|
||||
PTR __sys_sysmips
|
||||
PTR sys_ni_syscall /* 4150 */
|
||||
PTR sys_getsid
|
||||
PTR sys_fdatasync
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <linux/elf.h>
|
||||
|
||||
#include <asm/asm.h>
|
||||
#include <asm/asm-eva.h>
|
||||
#include <asm/branch.h>
|
||||
#include <asm/cachectl.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
|
@ -138,10 +139,12 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
|
|||
__asm__ __volatile__ (
|
||||
" .set "MIPS_ISA_ARCH_LEVEL" \n"
|
||||
" li %[err], 0 \n"
|
||||
"1: ll %[old], (%[addr]) \n"
|
||||
"1: \n"
|
||||
user_ll("%[old]", "(%[addr])")
|
||||
" move %[tmp], %[new] \n"
|
||||
"2: sc %[tmp], (%[addr]) \n"
|
||||
" bnez %[tmp], 4f \n"
|
||||
"2: \n"
|
||||
user_sc("%[tmp]", "(%[addr])")
|
||||
" beqz %[tmp], 4f \n"
|
||||
"3: \n"
|
||||
" .insn \n"
|
||||
" .subsection 2 \n"
|
||||
|
|
@ -199,6 +202,12 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
|
|||
unreachable();
|
||||
}
|
||||
|
||||
/*
|
||||
* mips_atomic_set() normally returns directly via syscall_exit potentially
|
||||
* clobbering static registers, so be sure to preserve them.
|
||||
*/
|
||||
save_static_function(sys_sysmips);
|
||||
|
||||
SYSCALL_DEFINE3(sysmips, long, cmd, long, arg1, long, arg2)
|
||||
{
|
||||
switch (cmd) {
|
||||
|
|
|
|||
|
|
@ -2522,6 +2522,35 @@ dcopuop:
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Emulate FPU instructions.
|
||||
*
|
||||
* If we use FPU hardware, then we have been typically called to handle
|
||||
* an unimplemented operation, such as where an operand is a NaN or
|
||||
* denormalized. In that case exit the emulation loop after a single
|
||||
* iteration so as to let hardware execute any subsequent instructions.
|
||||
*
|
||||
* If we have no FPU hardware or it has been disabled, then continue
|
||||
* emulating floating-point instructions until one of these conditions
|
||||
* has occurred:
|
||||
*
|
||||
* - a non-FPU instruction has been encountered,
|
||||
*
|
||||
* - an attempt to emulate has ended with a signal,
|
||||
*
|
||||
* - the ISA mode has been switched.
|
||||
*
|
||||
* We need to terminate the emulation loop if we got switched to the
|
||||
* MIPS16 mode, whether supported or not, so that we do not attempt
|
||||
* to emulate a MIPS16 instruction as a regular MIPS FPU instruction.
|
||||
* Similarly if we got switched to the microMIPS mode and only the
|
||||
* regular MIPS mode is supported, so that we do not attempt to emulate
|
||||
* a microMIPS instruction as a regular MIPS FPU instruction. Or if
|
||||
* we got switched to the regular MIPS mode and only the microMIPS mode
|
||||
* is supported, so that we do not attempt to emulate a regular MIPS
|
||||
* instruction that should cause an Address Error exception instead.
|
||||
* For simplicity we always terminate upon an ISA mode switch.
|
||||
*/
|
||||
int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
|
||||
int has_fpu, void *__user *fault_addr)
|
||||
{
|
||||
|
|
@ -2607,6 +2636,15 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
|
|||
break;
|
||||
if (sig)
|
||||
break;
|
||||
/*
|
||||
* We have to check for the ISA bit explicitly here,
|
||||
* because `get_isa16_mode' may return 0 if support
|
||||
* for code compression has been globally disabled,
|
||||
* or otherwise we may produce the wrong signal or
|
||||
* even proceed successfully where we must not.
|
||||
*/
|
||||
if ((xcp->cp0_epc ^ prevepc) & 0x1)
|
||||
break;
|
||||
|
||||
cond_resched();
|
||||
} while (xcp->cp0_epc > prevepc);
|
||||
|
|
|
|||
|
|
@ -20,6 +20,8 @@
|
|||
** flush/purge and allocate "regular" cacheable pages for everything.
|
||||
*/
|
||||
|
||||
#define DMA_ERROR_CODE (~(dma_addr_t)0)
|
||||
|
||||
#ifdef CONFIG_PA11
|
||||
extern struct dma_map_ops pcxl_dma_ops;
|
||||
extern struct dma_map_ops pcx_dma_ops;
|
||||
|
|
@ -54,12 +56,13 @@ parisc_walk_tree(struct device *dev)
|
|||
break;
|
||||
}
|
||||
}
|
||||
BUG_ON(!dev->platform_data);
|
||||
return dev->platform_data;
|
||||
}
|
||||
|
||||
#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu)
|
||||
|
||||
|
||||
#define GET_IOC(dev) ({ \
|
||||
void *__pdata = parisc_walk_tree(dev); \
|
||||
__pdata ? HBA_DATA(__pdata)->iommu : NULL; \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_IOMMU_CCIO
|
||||
struct parisc_device;
|
||||
|
|
|
|||
|
|
@ -49,15 +49,26 @@ static inline void load_context(mm_context_t context)
|
|||
mtctl(__space_to_prot(context), 8);
|
||||
}
|
||||
|
||||
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
|
||||
static inline void switch_mm_irqs_off(struct mm_struct *prev,
|
||||
struct mm_struct *next, struct task_struct *tsk)
|
||||
{
|
||||
|
||||
if (prev != next) {
|
||||
mtctl(__pa(next->pgd), 25);
|
||||
load_context(next->context);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void switch_mm(struct mm_struct *prev,
|
||||
struct mm_struct *next, struct task_struct *tsk)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
switch_mm_irqs_off(prev, next, tsk);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
#define switch_mm_irqs_off switch_mm_irqs_off
|
||||
|
||||
#define deactivate_mm(tsk,mm) do { } while (0)
|
||||
|
||||
static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
|
||||
|
|
|
|||
|
|
@ -361,7 +361,7 @@
|
|||
ENTRY_SAME(ni_syscall) /* 263: reserved for vserver */
|
||||
ENTRY_SAME(add_key)
|
||||
ENTRY_SAME(request_key) /* 265 */
|
||||
ENTRY_SAME(keyctl)
|
||||
ENTRY_COMP(keyctl)
|
||||
ENTRY_SAME(ioprio_set)
|
||||
ENTRY_SAME(ioprio_get)
|
||||
ENTRY_SAME(inotify_init)
|
||||
|
|
|
|||
|
|
@ -366,7 +366,7 @@ bad_area:
|
|||
case 15: /* Data TLB miss fault/Data page fault */
|
||||
/* send SIGSEGV when outside of vma */
|
||||
if (!vma ||
|
||||
address < vma->vm_start || address > vma->vm_end) {
|
||||
address < vma->vm_start || address >= vma->vm_end) {
|
||||
si.si_signo = SIGSEGV;
|
||||
si.si_code = SEGV_MAPERR;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -560,7 +560,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
|
|||
* Atomically increments @v by 1, so long as @v is non-zero.
|
||||
* Returns non-zero if @v was non-zero, and zero otherwise.
|
||||
*/
|
||||
static __inline__ long atomic64_inc_not_zero(atomic64_t *v)
|
||||
static __inline__ int atomic64_inc_not_zero(atomic64_t *v)
|
||||
{
|
||||
long t1, t2;
|
||||
|
||||
|
|
@ -579,7 +579,7 @@ static __inline__ long atomic64_inc_not_zero(atomic64_t *v)
|
|||
: "r" (&v->counter)
|
||||
: "cc", "xer", "memory");
|
||||
|
||||
return t1;
|
||||
return t1 != 0;
|
||||
}
|
||||
|
||||
#endif /* __powerpc64__ */
|
||||
|
|
|
|||
|
|
@ -23,12 +23,13 @@
|
|||
#define CORE_DUMP_USE_REGSET
|
||||
#define ELF_EXEC_PAGESIZE PAGE_SIZE
|
||||
|
||||
/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
|
||||
use of this is to invoke "./ld.so someprog" to test out a new version of
|
||||
the loader. We need to make sure that it is out of the way of the program
|
||||
that it will "exec", and that there is sufficient room for the brk. */
|
||||
|
||||
#define ELF_ET_DYN_BASE 0x20000000
|
||||
/*
|
||||
* This is the base location for PIE (ET_DYN with INTERP) loads. On
|
||||
* 64-bit, this is raised to 4GB to leave the entire 32-bit address
|
||||
* space open for things that want to use the area for 32-bit pointers.
|
||||
*/
|
||||
#define ELF_ET_DYN_BASE (is_32bit_task() ? 0x000400000UL : \
|
||||
0x100000000UL)
|
||||
|
||||
#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)
|
||||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue