This is the 4.9.171 stable release
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This commit is contained in:
commit
3383326b93
51 changed files with 471 additions and 269 deletions
5
Makefile
5
Makefile
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@ -1,6 +1,6 @@
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VERSION = 4
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PATCHLEVEL = 9
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SUBLEVEL = 170
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SUBLEVEL = 171
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EXTRAVERSION =
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NAME = Roaring Lionus
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@ -721,8 +721,7 @@ export DISABLE_CFI
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endif
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ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
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KBUILD_CFLAGS += $(call cc-option,-Oz,-Os)
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KBUILD_CFLAGS += $(call cc-disable-warning,maybe-uninitialized,)
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KBUILD_CFLAGS += -Os $(call cc-disable-warning,maybe-uninitialized,)
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else
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ifdef CONFIG_PROFILE_ALL_BRANCHES
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KBUILD_CFLAGS += -O2 $(call cc-disable-warning,maybe-uninitialized,)
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@ -50,7 +50,7 @@ do { \
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static inline int
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arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval, ret, tmp;
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int oldval = 0, ret, tmp;
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pagefault_disable();
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@ -321,6 +321,12 @@ ENTRY(poly1305_4block_avx2)
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vpaddq t2,t1,t1
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vmovq t1x,d4
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# Now do a partial reduction mod (2^130)-5, carrying h0 -> h1 -> h2 ->
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# h3 -> h4 -> h0 -> h1 to get h0,h2,h3,h4 < 2^26 and h1 < 2^26 + a small
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# amount. Careful: we must not assume the carry bits 'd0 >> 26',
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# 'd1 >> 26', 'd2 >> 26', 'd3 >> 26', and '(d4 >> 26) * 5' fit in 32-bit
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# integers. It's true in a single-block implementation, but not here.
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# d1 += d0 >> 26
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mov d0,%rax
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shr $26,%rax
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@ -359,16 +365,16 @@ ENTRY(poly1305_4block_avx2)
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# h0 += (d4 >> 26) * 5
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mov d4,%rax
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shr $26,%rax
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lea (%eax,%eax,4),%eax
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add %eax,%ebx
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lea (%rax,%rax,4),%rax
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add %rax,%rbx
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# h4 = d4 & 0x3ffffff
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mov d4,%rax
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and $0x3ffffff,%eax
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mov %eax,h4
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# h1 += h0 >> 26
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mov %ebx,%eax
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shr $26,%eax
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mov %rbx,%rax
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shr $26,%rax
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add %eax,h1
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# h0 = h0 & 0x3ffffff
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andl $0x3ffffff,%ebx
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@ -251,16 +251,16 @@ ENTRY(poly1305_block_sse2)
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# h0 += (d4 >> 26) * 5
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mov d4,%rax
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shr $26,%rax
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lea (%eax,%eax,4),%eax
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add %eax,%ebx
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lea (%rax,%rax,4),%rax
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add %rax,%rbx
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# h4 = d4 & 0x3ffffff
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mov d4,%rax
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and $0x3ffffff,%eax
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mov %eax,h4
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# h1 += h0 >> 26
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mov %ebx,%eax
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shr $26,%eax
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mov %rbx,%rax
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shr $26,%rax
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add %eax,h1
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# h0 = h0 & 0x3ffffff
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andl $0x3ffffff,%ebx
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@ -518,6 +518,12 @@ ENTRY(poly1305_2block_sse2)
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paddq t2,t1
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movq t1,d4
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# Now do a partial reduction mod (2^130)-5, carrying h0 -> h1 -> h2 ->
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# h3 -> h4 -> h0 -> h1 to get h0,h2,h3,h4 < 2^26 and h1 < 2^26 + a small
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# amount. Careful: we must not assume the carry bits 'd0 >> 26',
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# 'd1 >> 26', 'd2 >> 26', 'd3 >> 26', and '(d4 >> 26) * 5' fit in 32-bit
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# integers. It's true in a single-block implementation, but not here.
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# d1 += d0 >> 26
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mov d0,%rax
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shr $26,%rax
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@ -556,16 +562,16 @@ ENTRY(poly1305_2block_sse2)
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# h0 += (d4 >> 26) * 5
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mov d4,%rax
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shr $26,%rax
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lea (%eax,%eax,4),%eax
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add %eax,%ebx
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lea (%rax,%rax,4),%rax
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add %rax,%rbx
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# h4 = d4 & 0x3ffffff
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mov d4,%rax
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and $0x3ffffff,%eax
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mov %eax,h4
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# h1 += h0 >> 26
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mov %ebx,%eax
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shr $26,%eax
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mov %rbx,%rax
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shr $26,%rax
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add %eax,h1
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# h0 = h0 & 0x3ffffff
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andl $0x3ffffff,%ebx
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@ -113,22 +113,39 @@ static __initconst const u64 amd_hw_cache_event_ids
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};
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/*
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* AMD Performance Monitor K7 and later.
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* AMD Performance Monitor K7 and later, up to and including Family 16h:
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*/
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static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
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{
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[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
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[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
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[PERF_COUNT_HW_CACHE_REFERENCES] = 0x077d,
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[PERF_COUNT_HW_CACHE_MISSES] = 0x077e,
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[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
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[PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
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[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00d0, /* "Decoder empty" event */
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[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x00d1, /* "Dispatch stalls" event */
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[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
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[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
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[PERF_COUNT_HW_CACHE_REFERENCES] = 0x077d,
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[PERF_COUNT_HW_CACHE_MISSES] = 0x077e,
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[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
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[PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
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[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00d0, /* "Decoder empty" event */
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[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x00d1, /* "Dispatch stalls" event */
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};
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/*
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* AMD Performance Monitor Family 17h and later:
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*/
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static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
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{
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[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
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[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
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[PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
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[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
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[PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
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[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x0287,
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[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x0187,
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};
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static u64 amd_pmu_event_map(int hw_event)
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{
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if (boot_cpu_data.x86 >= 0x17)
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return amd_f17h_perfmon_event_map[hw_event];
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return amd_perfmon_event_map[hw_event];
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}
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@ -545,6 +545,7 @@ void arch_prepare_kretprobe(struct kretprobe_instance *ri, struct pt_regs *regs)
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unsigned long *sara = stack_addr(regs);
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ri->ret_addr = (kprobe_opcode_t *) *sara;
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ri->fp = sara;
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/* Replace the return addr with trampoline addr */
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*sara = (unsigned long) &kretprobe_trampoline;
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@ -746,15 +747,21 @@ __visible __used void *trampoline_handler(struct pt_regs *regs)
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unsigned long flags, orig_ret_address = 0;
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unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline;
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kprobe_opcode_t *correct_ret_addr = NULL;
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void *frame_pointer;
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bool skipped = false;
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INIT_HLIST_HEAD(&empty_rp);
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kretprobe_hash_lock(current, &head, &flags);
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/* fixup registers */
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#ifdef CONFIG_X86_64
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regs->cs = __KERNEL_CS;
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/* On x86-64, we use pt_regs->sp for return address holder. */
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frame_pointer = ®s->sp;
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#else
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regs->cs = __KERNEL_CS | get_kernel_rpl();
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regs->gs = 0;
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/* On x86-32, we use pt_regs->flags for return address holder. */
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frame_pointer = ®s->flags;
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#endif
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regs->ip = trampoline_address;
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regs->orig_ax = ~0UL;
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@ -776,8 +783,25 @@ __visible __used void *trampoline_handler(struct pt_regs *regs)
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if (ri->task != current)
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/* another task is sharing our hash bucket */
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continue;
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/*
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* Return probes must be pushed on this hash list correct
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* order (same as return order) so that it can be poped
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* correctly. However, if we find it is pushed it incorrect
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* order, this means we find a function which should not be
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* probed, because the wrong order entry is pushed on the
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* path of processing other kretprobe itself.
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*/
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if (ri->fp != frame_pointer) {
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if (!skipped)
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pr_warn("kretprobe is stacked incorrectly. Trying to fixup.\n");
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skipped = true;
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continue;
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}
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orig_ret_address = (unsigned long)ri->ret_addr;
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if (skipped)
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pr_warn("%ps must be blacklisted because of incorrect kretprobe order\n",
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ri->rp->kp.addr);
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if (orig_ret_address != trampoline_address)
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/*
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@ -795,6 +819,8 @@ __visible __used void *trampoline_handler(struct pt_regs *regs)
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if (ri->task != current)
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/* another task is sharing our hash bucket */
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continue;
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if (ri->fp != frame_pointer)
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continue;
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orig_ret_address = (unsigned long)ri->ret_addr;
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if (ri->rp && ri->rp->handler) {
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|
|
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@ -2579,15 +2579,13 @@ static int em_rsm(struct x86_emulate_ctxt *ctxt)
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* CR0/CR3/CR4/EFER. It's all a bit more complicated if the vCPU
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* supports long mode.
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*/
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cr4 = ctxt->ops->get_cr(ctxt, 4);
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if (emulator_has_longmode(ctxt)) {
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struct desc_struct cs_desc;
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/* Zero CR4.PCIDE before CR0.PG. */
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if (cr4 & X86_CR4_PCIDE) {
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cr4 = ctxt->ops->get_cr(ctxt, 4);
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if (cr4 & X86_CR4_PCIDE)
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ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PCIDE);
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cr4 &= ~X86_CR4_PCIDE;
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}
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/* A 32-bit code segment is required to clear EFER.LMA. */
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memset(&cs_desc, 0, sizeof(cs_desc));
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@ -2601,13 +2599,16 @@ static int em_rsm(struct x86_emulate_ctxt *ctxt)
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if (cr0 & X86_CR0_PE)
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ctxt->ops->set_cr(ctxt, 0, cr0 & ~(X86_CR0_PG | X86_CR0_PE));
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/* Now clear CR4.PAE (which must be done before clearing EFER.LME). */
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if (cr4 & X86_CR4_PAE)
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ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PAE);
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if (emulator_has_longmode(ctxt)) {
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/* Clear CR4.PAE before clearing EFER.LME. */
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cr4 = ctxt->ops->get_cr(ctxt, 4);
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if (cr4 & X86_CR4_PAE)
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ctxt->ops->set_cr(ctxt, 4, cr4 & ~X86_CR4_PAE);
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/* And finally go back to 32-bit mode. */
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efer = 0;
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ctxt->ops->set_msr(ctxt, MSR_EFER, efer);
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/* And finally go back to 32-bit mode. */
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efer = 0;
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ctxt->ops->set_msr(ctxt, MSR_EFER, efer);
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}
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smbase = ctxt->ops->get_smbase(ctxt);
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if (emulator_has_longmode(ctxt))
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|
|
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|
|
@ -3940,14 +3940,25 @@ static int avic_incomplete_ipi_interception(struct vcpu_svm *svm)
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kvm_lapic_reg_write(apic, APIC_ICR, icrl);
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break;
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case AVIC_IPI_FAILURE_TARGET_NOT_RUNNING: {
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int i;
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struct kvm_vcpu *vcpu;
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struct kvm *kvm = svm->vcpu.kvm;
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struct kvm_lapic *apic = svm->vcpu.arch.apic;
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|
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/*
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* Update ICR high and low, then emulate sending IPI,
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* which is handled when writing APIC_ICR.
|
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* At this point, we expect that the AVIC HW has already
|
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* set the appropriate IRR bits on the valid target
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* vcpus. So, we just need to kick the appropriate vcpu.
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*/
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kvm_lapic_reg_write(apic, APIC_ICR2, icrh);
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kvm_lapic_reg_write(apic, APIC_ICR, icrl);
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kvm_for_each_vcpu(i, vcpu, kvm) {
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bool m = kvm_apic_match_dest(vcpu, apic,
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icrl & KVM_APIC_SHORT_MASK,
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GET_APIC_DEST_FIELD(icrh),
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icrl & KVM_APIC_DEST_MASK);
|
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|
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if (m && !avic_vcpu_is_running(vcpu))
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kvm_vcpu_wake_up(vcpu);
|
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}
|
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break;
|
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}
|
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case AVIC_IPI_FAILURE_INVALID_TARGET:
|
||||
|
|
|
|||
|
|
@ -4527,7 +4527,49 @@ static struct hash_testvec poly1305_tv_template[] = {
|
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.psize = 80,
|
||||
.digest = "\x13\x00\x00\x00\x00\x00\x00\x00"
|
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"\x00\x00\x00\x00\x00\x00\x00\x00",
|
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},
|
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}, { /* Regression test for overflow in AVX2 implementation */
|
||||
.plaintext = "\xff\xff\xff\xff\xff\xff\xff\xff"
|
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"\xff\xff\xff\xff\xff\xff\xff\xff"
|
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"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff\xff\xff\xff\xff"
|
||||
"\xff\xff\xff\xff",
|
||||
.psize = 300,
|
||||
.digest = "\xfb\x5e\x96\xd8\x61\xd5\xc7\xc8"
|
||||
"\x78\xe5\x87\xcc\x2d\x5a\x22\xe1",
|
||||
}
|
||||
};
|
||||
|
||||
/* NHPoly1305 test vectors from https://github.com/google/adiantum */
|
||||
|
|
|
|||
|
|
@ -65,7 +65,15 @@ static int i2c_atmel_send(struct tpm_chip *chip, u8 *buf, size_t len)
|
|||
dev_dbg(&chip->dev,
|
||||
"%s(buf=%*ph len=%0zx) -> sts=%d\n", __func__,
|
||||
(int)min_t(size_t, 64, len), buf, len, status);
|
||||
return status;
|
||||
|
||||
if (status < 0)
|
||||
return status;
|
||||
|
||||
/* The upper layer does not support incomplete sends. */
|
||||
if (status != len)
|
||||
return -E2BIG;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int i2c_atmel_recv(struct tpm_chip *chip, u8 *buf, size_t count)
|
||||
|
|
|
|||
|
|
@ -138,7 +138,8 @@ static int crypto4xx_setkey_aes(struct crypto_ablkcipher *cipher,
|
|||
sa = (struct dynamic_sa_ctl *) ctx->sa_in;
|
||||
ctx->hash_final = 0;
|
||||
|
||||
set_dynamic_sa_command_0(sa, SA_NOT_SAVE_HASH, SA_NOT_SAVE_IV,
|
||||
set_dynamic_sa_command_0(sa, SA_NOT_SAVE_HASH, (cm == CRYPTO_MODE_CBC ?
|
||||
SA_SAVE_IV : SA_NOT_SAVE_IV),
|
||||
SA_LOAD_HASH_FROM_SA, SA_LOAD_IV_FROM_STATE,
|
||||
SA_NO_HEADER_PROC, SA_HASH_ALG_NULL,
|
||||
SA_CIPHER_ALG_AES, SA_PAD_TYPE_ZERO,
|
||||
|
|
|
|||
|
|
@ -646,6 +646,15 @@ static u32 crypto4xx_ablkcipher_done(struct crypto4xx_device *dev,
|
|||
addr = dma_map_page(dev->core_dev->device, sg_page(dst),
|
||||
dst->offset, dst->length, DMA_FROM_DEVICE);
|
||||
}
|
||||
|
||||
if (pd_uinfo->sa_va->sa_command_0.bf.save_iv == SA_SAVE_IV) {
|
||||
struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
|
||||
|
||||
crypto4xx_memcpy_from_le32((u32 *)req->iv,
|
||||
pd_uinfo->sr_va->save_iv,
|
||||
crypto_skcipher_ivsize(skcipher));
|
||||
}
|
||||
|
||||
crypto4xx_ret_sg_desc(dev, pd_uinfo);
|
||||
if (ablk_req->base.complete != NULL)
|
||||
ablk_req->base.complete(&ablk_req->base, 0);
|
||||
|
|
|
|||
|
|
@ -337,7 +337,8 @@ static const struct dmi_system_id i2c_hid_dmi_desc_override_table[] = {
|
|||
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "FlexBook edge11 - M-FBE11"),
|
||||
},
|
||||
.driver_data = (void *)&sipodev_desc
|
||||
}
|
||||
},
|
||||
{ } /* Terminate list */
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1340,6 +1340,8 @@ static int kxcjk1013_resume(struct device *dev)
|
|||
|
||||
mutex_lock(&data->mutex);
|
||||
ret = kxcjk1013_set_mode(data, OPERATION);
|
||||
if (ret == 0)
|
||||
ret = kxcjk1013_set_range(data, data->range);
|
||||
mutex_unlock(&data->mutex);
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -121,6 +121,7 @@ static int ad_sd_read_reg_raw(struct ad_sigma_delta *sigma_delta,
|
|||
if (sigma_delta->info->has_registers) {
|
||||
data[0] = reg << sigma_delta->info->addr_shift;
|
||||
data[0] |= sigma_delta->info->read_mask;
|
||||
data[0] |= sigma_delta->comm;
|
||||
spi_message_add_tail(&t[0], &m);
|
||||
}
|
||||
spi_message_add_tail(&t[1], &m);
|
||||
|
|
|
|||
|
|
@ -704,23 +704,29 @@ static int at91_adc_read_raw(struct iio_dev *idev,
|
|||
ret = wait_event_interruptible_timeout(st->wq_data_avail,
|
||||
st->done,
|
||||
msecs_to_jiffies(1000));
|
||||
if (ret == 0)
|
||||
ret = -ETIMEDOUT;
|
||||
if (ret < 0) {
|
||||
mutex_unlock(&st->lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*val = st->last_value;
|
||||
|
||||
/* Disable interrupts, regardless if adc conversion was
|
||||
* successful or not
|
||||
*/
|
||||
at91_adc_writel(st, AT91_ADC_CHDR,
|
||||
AT91_ADC_CH(chan->channel));
|
||||
at91_adc_writel(st, AT91_ADC_IDR, BIT(chan->channel));
|
||||
|
||||
st->last_value = 0;
|
||||
st->done = false;
|
||||
if (ret > 0) {
|
||||
/* a valid conversion took place */
|
||||
*val = st->last_value;
|
||||
st->last_value = 0;
|
||||
st->done = false;
|
||||
ret = IIO_VAL_INT;
|
||||
} else if (ret == 0) {
|
||||
/* conversion timeout */
|
||||
dev_err(&idev->dev, "ADC Channel %d timeout.\n",
|
||||
chan->channel);
|
||||
ret = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
mutex_unlock(&st->lock);
|
||||
return IIO_VAL_INT;
|
||||
return ret;
|
||||
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
*val = st->vref_mv;
|
||||
|
|
|
|||
|
|
@ -583,11 +583,10 @@ static int bmg160_read_raw(struct iio_dev *indio_dev,
|
|||
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
|
||||
return bmg160_get_filter(data, val);
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
*val = 0;
|
||||
switch (chan->type) {
|
||||
case IIO_TEMP:
|
||||
*val2 = 500000;
|
||||
return IIO_VAL_INT_PLUS_MICRO;
|
||||
*val = 500;
|
||||
return IIO_VAL_INT;
|
||||
case IIO_ANGL_VEL:
|
||||
{
|
||||
int i;
|
||||
|
|
@ -595,6 +594,7 @@ static int bmg160_read_raw(struct iio_dev *indio_dev,
|
|||
for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
|
||||
if (bmg160_scale_table[i].dps_range ==
|
||||
data->dps_range) {
|
||||
*val = 0;
|
||||
*val2 = bmg160_scale_table[i].scale;
|
||||
return IIO_VAL_INT_PLUS_MICRO;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -944,8 +944,7 @@ static bool sdhci_needs_reset(struct sdhci_host *host, struct mmc_request *mrq)
|
|||
return (!(host->flags & SDHCI_DEVICE_DEAD) &&
|
||||
((mrq->cmd && mrq->cmd->error) ||
|
||||
(mrq->sbc && mrq->sbc->error) ||
|
||||
(mrq->data && ((mrq->data->error && !mrq->data->stop) ||
|
||||
(mrq->data->stop && mrq->data->stop->error))) ||
|
||||
(mrq->data && mrq->data->stop && mrq->data->stop->error) ||
|
||||
(host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)));
|
||||
}
|
||||
|
||||
|
|
@ -997,6 +996,16 @@ static void sdhci_finish_data(struct sdhci_host *host)
|
|||
host->data = NULL;
|
||||
host->data_cmd = NULL;
|
||||
|
||||
/*
|
||||
* The controller needs a reset of internal state machines upon error
|
||||
* conditions.
|
||||
*/
|
||||
if (data->error) {
|
||||
if (!host->cmd || host->cmd == data_cmd)
|
||||
sdhci_do_reset(host, SDHCI_RESET_CMD);
|
||||
sdhci_do_reset(host, SDHCI_RESET_DATA);
|
||||
}
|
||||
|
||||
if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA)) ==
|
||||
(SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA))
|
||||
sdhci_adma_table_post(host, data);
|
||||
|
|
@ -1021,17 +1030,6 @@ static void sdhci_finish_data(struct sdhci_host *host)
|
|||
if (data->stop &&
|
||||
(data->error ||
|
||||
!data->mrq->sbc)) {
|
||||
|
||||
/*
|
||||
* The controller needs a reset of internal state machines
|
||||
* upon error conditions.
|
||||
*/
|
||||
if (data->error) {
|
||||
if (!host->cmd || host->cmd == data_cmd)
|
||||
sdhci_do_reset(host, SDHCI_RESET_CMD);
|
||||
sdhci_do_reset(host, SDHCI_RESET_DATA);
|
||||
}
|
||||
|
||||
/*
|
||||
* 'cap_cmd_during_tfr' request must not use the command line
|
||||
* after mmc_command_done() has been called. It is upper layer's
|
||||
|
|
@ -2457,7 +2455,7 @@ static void sdhci_timeout_data_timer(unsigned long data)
|
|||
* *
|
||||
\*****************************************************************************/
|
||||
|
||||
static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
|
||||
static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *intmask_p)
|
||||
{
|
||||
if (!host->cmd) {
|
||||
/*
|
||||
|
|
@ -2480,20 +2478,12 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
|
|||
else
|
||||
host->cmd->error = -EILSEQ;
|
||||
|
||||
/*
|
||||
* If this command initiates a data phase and a response
|
||||
* CRC error is signalled, the card can start transferring
|
||||
* data - the card may have received the command without
|
||||
* error. We must not terminate the mmc_request early.
|
||||
*
|
||||
* If the card did not receive the command or returned an
|
||||
* error which prevented it sending data, the data phase
|
||||
* will time out.
|
||||
*/
|
||||
/* Treat data command CRC error the same as data CRC error */
|
||||
if (host->cmd->data &&
|
||||
(intmask & (SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)) ==
|
||||
SDHCI_INT_CRC) {
|
||||
host->cmd = NULL;
|
||||
*intmask_p |= SDHCI_INT_DATA_CRC;
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -2722,7 +2712,7 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
|
|||
}
|
||||
|
||||
if (intmask & SDHCI_INT_CMD_MASK)
|
||||
sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
|
||||
sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK, &intmask);
|
||||
|
||||
if (intmask & SDHCI_INT_DATA_MASK)
|
||||
sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
|
||||
|
|
|
|||
|
|
@ -3134,8 +3134,12 @@ static int bond_netdev_event(struct notifier_block *this,
|
|||
return NOTIFY_DONE;
|
||||
|
||||
if (event_dev->flags & IFF_MASTER) {
|
||||
int ret;
|
||||
|
||||
netdev_dbg(event_dev, "IFF_MASTER\n");
|
||||
return bond_master_netdev_event(event, event_dev);
|
||||
ret = bond_master_netdev_event(event, event_dev);
|
||||
if (ret != NOTIFY_DONE)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (event_dev->flags & IFF_SLAVE) {
|
||||
|
|
|
|||
|
|
@ -1251,6 +1251,23 @@ static int team_port_add(struct team *team, struct net_device *port_dev)
|
|||
goto err_option_port_add;
|
||||
}
|
||||
|
||||
/* set promiscuity level to new slave */
|
||||
if (dev->flags & IFF_PROMISC) {
|
||||
err = dev_set_promiscuity(port_dev, 1);
|
||||
if (err)
|
||||
goto err_set_slave_promisc;
|
||||
}
|
||||
|
||||
/* set allmulti level to new slave */
|
||||
if (dev->flags & IFF_ALLMULTI) {
|
||||
err = dev_set_allmulti(port_dev, 1);
|
||||
if (err) {
|
||||
if (dev->flags & IFF_PROMISC)
|
||||
dev_set_promiscuity(port_dev, -1);
|
||||
goto err_set_slave_promisc;
|
||||
}
|
||||
}
|
||||
|
||||
netif_addr_lock_bh(dev);
|
||||
dev_uc_sync_multiple(port_dev, dev);
|
||||
dev_mc_sync_multiple(port_dev, dev);
|
||||
|
|
@ -1267,6 +1284,9 @@ static int team_port_add(struct team *team, struct net_device *port_dev)
|
|||
|
||||
return 0;
|
||||
|
||||
err_set_slave_promisc:
|
||||
__team_option_inst_del_port(team, port);
|
||||
|
||||
err_option_port_add:
|
||||
team_upper_dev_unlink(team, port);
|
||||
|
||||
|
|
@ -1312,6 +1332,12 @@ static int team_port_del(struct team *team, struct net_device *port_dev)
|
|||
|
||||
team_port_disable(team, port);
|
||||
list_del_rcu(&port->list);
|
||||
|
||||
if (dev->flags & IFF_PROMISC)
|
||||
dev_set_promiscuity(port_dev, -1);
|
||||
if (dev->flags & IFF_ALLMULTI)
|
||||
dev_set_allmulti(port_dev, -1);
|
||||
|
||||
team_upper_dev_unlink(team, port);
|
||||
netdev_rx_handler_unregister(port_dev);
|
||||
team_port_disable_netpoll(port);
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue