This is the 4.9.179 stable release
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This commit is contained in:
commit
1dc2c2919d
45 changed files with 499 additions and 173 deletions
2
Makefile
2
Makefile
|
|
@ -1,6 +1,6 @@
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|||
VERSION = 4
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PATCHLEVEL = 9
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SUBLEVEL = 178
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SUBLEVEL = 179
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EXTRAVERSION =
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NAME = Roaring Lionus
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|
|
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@ -801,7 +801,7 @@ int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_level,
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static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
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const struct kvm_vcpu_init *init)
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{
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unsigned int i;
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unsigned int i, ret;
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int phys_target = kvm_target_cpu();
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if (init->target != phys_target)
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@ -836,9 +836,14 @@ static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
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vcpu->arch.target = phys_target;
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/* Now we know what it is, we can reset it. */
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return kvm_reset_vcpu(vcpu);
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}
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ret = kvm_reset_vcpu(vcpu);
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if (ret) {
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vcpu->arch.target = -1;
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bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES);
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}
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return ret;
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}
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static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu,
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struct kvm_vcpu_init *init)
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@ -59,14 +59,14 @@
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#define LDCW ldcw,co
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#define BL b,l
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# ifdef CONFIG_64BIT
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# define LEVEL 2.0w
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# define PA_ASM_LEVEL 2.0w
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# else
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# define LEVEL 2.0
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# define PA_ASM_LEVEL 2.0
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# endif
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#else
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#define LDCW ldcw
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#define BL bl
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#define LEVEL 1.1
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#define PA_ASM_LEVEL 1.1
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#endif
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#ifdef __ASSEMBLY__
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@ -22,7 +22,7 @@
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#include <linux/linkage.h>
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#include <linux/init.h>
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.level LEVEL
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.level PA_ASM_LEVEL
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__INITDATA
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ENTRY(boot_args)
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@ -254,7 +254,7 @@ stext_pdc_ret:
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ldo R%PA(fault_vector_11)(%r10),%r10
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$is_pa20:
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.level LEVEL /* restore 1.1 || 2.0w */
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.level PA_ASM_LEVEL /* restore 1.1 || 2.0w */
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#endif /*!CONFIG_64BIT*/
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load32 PA(fault_vector_20),%r10
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@ -189,6 +189,7 @@ int dump_task_fpu (struct task_struct *tsk, elf_fpregset_t *r)
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*/
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int running_on_qemu __read_mostly;
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EXPORT_SYMBOL(running_on_qemu);
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void __cpuidle arch_cpu_idle_dead(void)
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{
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@ -48,7 +48,7 @@ registers).
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*/
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#define KILL_INSN break 0,0
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.level LEVEL
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.level PA_ASM_LEVEL
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.text
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@ -638,8 +638,8 @@ static void _update_pll_mnp(struct tegra_clk_pll *pll,
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pll_override_writel(val, params->pmc_divp_reg, pll);
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val = pll_override_readl(params->pmc_divnm_reg, pll);
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val &= ~(divm_mask(pll) << div_nmp->override_divm_shift) |
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~(divn_mask(pll) << div_nmp->override_divn_shift);
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val &= ~((divm_mask(pll) << div_nmp->override_divm_shift) |
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(divn_mask(pll) << div_nmp->override_divn_shift));
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val |= (cfg->m << div_nmp->override_divm_shift) |
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(cfg->n << div_nmp->override_divn_shift);
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pll_override_writel(val, params->pmc_divnm_reg, pll);
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@ -90,6 +90,7 @@ struct msc_iter {
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* @reg_base: register window base address
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* @thdev: intel_th_device pointer
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* @win_list: list of windows in multiblock mode
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* @single_sgt: single mode buffer
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* @nr_pages: total number of pages allocated for this buffer
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* @single_sz: amount of data in single mode
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* @single_wrap: single mode wrap occurred
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@ -110,6 +111,7 @@ struct msc {
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struct intel_th_device *thdev;
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struct list_head win_list;
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struct sg_table single_sgt;
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unsigned long nr_pages;
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unsigned long single_sz;
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unsigned int single_wrap : 1;
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@ -623,22 +625,45 @@ static void intel_th_msc_deactivate(struct intel_th_device *thdev)
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*/
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static int msc_buffer_contig_alloc(struct msc *msc, unsigned long size)
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{
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unsigned long nr_pages = size >> PAGE_SHIFT;
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unsigned int order = get_order(size);
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struct page *page;
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int ret;
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if (!size)
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return 0;
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ret = sg_alloc_table(&msc->single_sgt, 1, GFP_KERNEL);
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if (ret)
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goto err_out;
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ret = -ENOMEM;
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page = alloc_pages(GFP_KERNEL | __GFP_ZERO, order);
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if (!page)
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return -ENOMEM;
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goto err_free_sgt;
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split_page(page, order);
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msc->nr_pages = size >> PAGE_SHIFT;
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sg_set_buf(msc->single_sgt.sgl, page_address(page), size);
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ret = dma_map_sg(msc_dev(msc)->parent->parent, msc->single_sgt.sgl, 1,
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DMA_FROM_DEVICE);
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if (ret < 0)
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goto err_free_pages;
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msc->nr_pages = nr_pages;
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msc->base = page_address(page);
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msc->base_addr = page_to_phys(page);
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msc->base_addr = sg_dma_address(msc->single_sgt.sgl);
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return 0;
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err_free_pages:
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__free_pages(page, order);
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err_free_sgt:
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sg_free_table(&msc->single_sgt);
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err_out:
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return ret;
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}
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/**
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@ -649,6 +674,10 @@ static void msc_buffer_contig_free(struct msc *msc)
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{
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unsigned long off;
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dma_unmap_sg(msc_dev(msc)->parent->parent, msc->single_sgt.sgl,
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1, DMA_FROM_DEVICE);
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sg_free_table(&msc->single_sgt);
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for (off = 0; off < msc->nr_pages << PAGE_SHIFT; off += PAGE_SIZE) {
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struct page *page = virt_to_page(msc->base + off);
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@ -226,8 +226,8 @@ stm_output_disclaim(struct stm_device *stm, struct stm_output *output)
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bitmap_release_region(&master->chan_map[0], output->channel,
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ilog2(output->nr_chans));
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output->nr_chans = 0;
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master->nr_free += output->nr_chans;
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output->nr_chans = 0;
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}
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/*
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@ -91,7 +91,6 @@ static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset)
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#define SMMU_TLB_FLUSH_VA_MATCH_ALL (0 << 0)
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#define SMMU_TLB_FLUSH_VA_MATCH_SECTION (2 << 0)
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#define SMMU_TLB_FLUSH_VA_MATCH_GROUP (3 << 0)
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#define SMMU_TLB_FLUSH_ASID(x) (((x) & 0x7f) << 24)
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#define SMMU_TLB_FLUSH_VA_SECTION(addr) ((((addr) & 0xffc00000) >> 12) | \
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SMMU_TLB_FLUSH_VA_MATCH_SECTION)
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#define SMMU_TLB_FLUSH_VA_GROUP(addr) ((((addr) & 0xffffc000) >> 12) | \
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@ -194,8 +193,12 @@ static inline void smmu_flush_tlb_asid(struct tegra_smmu *smmu,
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{
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u32 value;
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value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) |
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SMMU_TLB_FLUSH_VA_MATCH_ALL;
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if (smmu->soc->num_asids == 4)
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value = (asid & 0x3) << 29;
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else
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value = (asid & 0x7f) << 24;
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value |= SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_VA_MATCH_ALL;
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smmu_writel(smmu, value, SMMU_TLB_FLUSH);
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}
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@ -205,8 +208,12 @@ static inline void smmu_flush_tlb_section(struct tegra_smmu *smmu,
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{
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u32 value;
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value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) |
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SMMU_TLB_FLUSH_VA_SECTION(iova);
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if (smmu->soc->num_asids == 4)
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value = (asid & 0x3) << 29;
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else
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value = (asid & 0x7f) << 24;
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value |= SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_VA_SECTION(iova);
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smmu_writel(smmu, value, SMMU_TLB_FLUSH);
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}
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@ -216,8 +223,12 @@ static inline void smmu_flush_tlb_group(struct tegra_smmu *smmu,
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{
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u32 value;
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value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) |
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SMMU_TLB_FLUSH_VA_GROUP(iova);
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if (smmu->soc->num_asids == 4)
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value = (asid & 0x3) << 29;
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else
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value = (asid & 0x7f) << 24;
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value |= SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_VA_GROUP(iova);
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smmu_writel(smmu, value, SMMU_TLB_FLUSH);
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}
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|
|
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@ -222,7 +222,8 @@ static void delay_dtr(struct dm_target *ti)
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{
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struct delay_c *dc = ti->private;
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destroy_workqueue(dc->kdelayd_wq);
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if (dc->kdelayd_wq)
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destroy_workqueue(dc->kdelayd_wq);
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dm_put_device(ti, dc->dev_read);
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|
|
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|
|
@ -2694,8 +2694,10 @@ state_store(struct md_rdev *rdev, const char *buf, size_t len)
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err = 0;
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}
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} else if (cmd_match(buf, "re-add")) {
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if (test_bit(Faulty, &rdev->flags) && (rdev->raid_disk == -1) &&
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rdev->saved_raid_disk >= 0) {
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if (!rdev->mddev->pers)
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err = -EINVAL;
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else if (test_bit(Faulty, &rdev->flags) && (rdev->raid_disk == -1) &&
|
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rdev->saved_raid_disk >= 0) {
|
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/* clear_bit is performed _after_ all the devices
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* have their local Faulty bit cleared. If any writes
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* happen in the meantime in the local node, they
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|
|
|
|||
|
|
@ -3878,7 +3878,7 @@ static void handle_parity_checks6(struct r5conf *conf, struct stripe_head *sh,
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/* now write out any block on a failed drive,
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* or P or Q if they were recomputed
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*/
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BUG_ON(s->uptodate < disks - 1); /* We don't need Q to recover */
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dev = NULL;
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if (s->failed == 2) {
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dev = &sh->dev[s->failed_num[1]];
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s->locked++;
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|
|
@ -3903,6 +3903,14 @@ static void handle_parity_checks6(struct r5conf *conf, struct stripe_head *sh,
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set_bit(R5_LOCKED, &dev->flags);
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set_bit(R5_Wantwrite, &dev->flags);
|
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}
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if (WARN_ONCE(dev && !test_bit(R5_UPTODATE, &dev->flags),
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"%s: disk%td not up to date\n",
|
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mdname(conf->mddev),
|
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dev - (struct r5dev *) &sh->dev)) {
|
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clear_bit(R5_LOCKED, &dev->flags);
|
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clear_bit(R5_Wantwrite, &dev->flags);
|
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s->locked--;
|
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}
|
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clear_bit(STRIPE_DEGRADED, &sh->state);
|
||||
|
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set_bit(STRIPE_INSYNC, &sh->state);
|
||||
|
|
@ -3914,15 +3922,26 @@ static void handle_parity_checks6(struct r5conf *conf, struct stripe_head *sh,
|
|||
case check_state_check_result:
|
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sh->check_state = check_state_idle;
|
||||
|
||||
if (s->failed > 1)
|
||||
break;
|
||||
/* handle a successful check operation, if parity is correct
|
||||
* we are done. Otherwise update the mismatch count and repair
|
||||
* parity if !MD_RECOVERY_CHECK
|
||||
*/
|
||||
if (sh->ops.zero_sum_result == 0) {
|
||||
/* Any parity checked was correct */
|
||||
set_bit(STRIPE_INSYNC, &sh->state);
|
||||
/* both parities are correct */
|
||||
if (!s->failed)
|
||||
set_bit(STRIPE_INSYNC, &sh->state);
|
||||
else {
|
||||
/* in contrast to the raid5 case we can validate
|
||||
* parity, but still have a failure to write
|
||||
* back
|
||||
*/
|
||||
sh->check_state = check_state_compute_result;
|
||||
/* Returning at this point means that we may go
|
||||
* off and bring p and/or q uptodate again so
|
||||
* we make sure to check zero_sum_result again
|
||||
* to verify if p or q need writeback
|
||||
*/
|
||||
}
|
||||
} else {
|
||||
atomic64_add(STRIPE_SECTORS, &conf->mddev->resync_mismatches);
|
||||
if (test_bit(MD_RECOVERY_CHECK, &conf->mddev->recovery))
|
||||
|
|
|
|||
|
|
@ -844,6 +844,8 @@ static int ov6650_video_probe(struct i2c_client *client)
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
msleep(20);
|
||||
|
||||
/*
|
||||
* check and show product ID and manufacturer ID
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ static int tegra_mc_setup_latency_allowance(struct tegra_mc *mc)
|
|||
u32 value;
|
||||
|
||||
/* compute the number of MC clock cycles per tick */
|
||||
tick = mc->tick * clk_get_rate(mc->clk);
|
||||
tick = (unsigned long long)mc->tick * clk_get_rate(mc->clk);
|
||||
do_div(tick, NSEC_PER_SEC);
|
||||
|
||||
value = readl(mc->regs + MC_EMEM_ARB_CFG);
|
||||
|
|
|
|||
|
|
@ -1490,7 +1490,7 @@ int mlx4_flow_steer_promisc_add(struct mlx4_dev *dev, u8 port,
|
|||
rule.port = port;
|
||||
rule.qpn = qpn;
|
||||
INIT_LIST_HEAD(&rule.list);
|
||||
mlx4_err(dev, "going promisc on %x\n", port);
|
||||
mlx4_info(dev, "going promisc on %x\n", port);
|
||||
|
||||
return mlx4_flow_attach(dev, &rule, regid_p);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -610,12 +610,20 @@ static struct compressor ppp_deflate_draft = {
|
|||
|
||||
static int __init deflate_init(void)
|
||||
{
|
||||
int answer = ppp_register_compressor(&ppp_deflate);
|
||||
if (answer == 0)
|
||||
printk(KERN_INFO
|
||||
"PPP Deflate Compression module registered\n");
|
||||
ppp_register_compressor(&ppp_deflate_draft);
|
||||
return answer;
|
||||
int rc;
|
||||
|
||||
rc = ppp_register_compressor(&ppp_deflate);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = ppp_register_compressor(&ppp_deflate_draft);
|
||||
if (rc) {
|
||||
ppp_unregister_compressor(&ppp_deflate);
|
||||
return rc;
|
||||
}
|
||||
|
||||
pr_info("PPP Deflate Compression module registered\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit deflate_cleanup(void)
|
||||
|
|
|
|||
|
|
@ -554,7 +554,7 @@ static int p54p_probe(struct pci_dev *pdev,
|
|||
err = pci_enable_device(pdev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Cannot enable new PCI device\n");
|
||||
return err;
|
||||
goto err_put;
|
||||
}
|
||||
|
||||
mem_addr = pci_resource_start(pdev, 0);
|
||||
|
|
@ -639,6 +639,7 @@ static int p54p_probe(struct pci_dev *pdev,
|
|||
pci_release_regions(pdev);
|
||||
err_disable_dev:
|
||||
pci_disable_device(pdev);
|
||||
err_put:
|
||||
pci_dev_put(pdev);
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -568,6 +568,9 @@ int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long d
|
|||
break;
|
||||
|
||||
case DISPLAY_MODEL_LASI:
|
||||
/* Skip to register LED in QEMU */
|
||||
if (running_on_qemu)
|
||||
return 1;
|
||||
LED_DATA_REG = data_reg;
|
||||
led_func_ptr = led_LASI_driver;
|
||||
printk(KERN_INFO "LED display at %lx registered\n", LED_DATA_REG);
|
||||
|
|
|
|||
|
|
@ -172,6 +172,38 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
|
|||
link->clkpm_capable = (blacklist) ? 0 : capable;
|
||||
}
|
||||
|
||||
static bool pcie_retrain_link(struct pcie_link_state *link)
|
||||
{
|
||||
struct pci_dev *parent = link->pdev;
|
||||
unsigned long start_jiffies;
|
||||
u16 reg16;
|
||||
|
||||
pcie_capability_read_word(parent, PCI_EXP_LNKCTL, ®16);
|
||||
reg16 |= PCI_EXP_LNKCTL_RL;
|
||||
pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
|
||||
if (parent->clear_retrain_link) {
|
||||
/*
|
||||
* Due to an erratum in some devices the Retrain Link bit
|
||||
* needs to be cleared again manually to allow the link
|
||||
* training to succeed.
|
||||
*/
|
||||
reg16 &= ~PCI_EXP_LNKCTL_RL;
|
||||
pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
|
||||
}
|
||||
|
||||
/* Wait for link training end. Break out after waiting for timeout */
|
||||
start_jiffies = jiffies;
|
||||
for (;;) {
|
||||
pcie_capability_read_word(parent, PCI_EXP_LNKSTA, ®16);
|
||||
if (!(reg16 & PCI_EXP_LNKSTA_LT))
|
||||
break;
|
||||
if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))
|
||||
break;
|
||||
msleep(1);
|
||||
}
|
||||
return !(reg16 & PCI_EXP_LNKSTA_LT);
|
||||
}
|
||||
|
||||
/*
|
||||
* pcie_aspm_configure_common_clock: check if the 2 ends of a link
|
||||
* could use common clock. If they are, configure them to use the
|
||||
|
|
@ -181,7 +213,6 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
|
|||
{
|
||||
int same_clock = 1;
|
||||
u16 reg16, parent_reg, child_reg[8];
|
||||
unsigned long start_jiffies;
|
||||
struct pci_dev *child, *parent = link->pdev;
|
||||
struct pci_bus *linkbus = parent->subordinate;
|
||||
/*
|
||||
|
|
@ -221,21 +252,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
|
|||
reg16 &= ~PCI_EXP_LNKCTL_CCC;
|
||||
pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
|
||||
|
||||
/* Retrain link */
|
||||
reg16 |= PCI_EXP_LNKCTL_RL;
|
||||
pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
|
||||
|
||||
/* Wait for link training end. Break out after waiting for timeout */
|
||||
start_jiffies = jiffies;
|
||||
for (;;) {
|
||||
pcie_capability_read_word(parent, PCI_EXP_LNKSTA, ®16);
|
||||
if (!(reg16 & PCI_EXP_LNKSTA_LT))
|
||||
break;
|
||||
if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))
|
||||
break;
|
||||
msleep(1);
|
||||
}
|
||||
if (!(reg16 & PCI_EXP_LNKSTA_LT))
|
||||
if (pcie_retrain_link(link))
|
||||
return;
|
||||
|
||||
/* Training failed. Restore common clock configurations */
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue