This is the 4.9.59 stable release
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This commit is contained in:
Greg Kroah-Hartman
commit
16cc920a0f
68 changed files with 542 additions and 321 deletions
2
Makefile
2
Makefile
|
|
@ -1,6 +1,6 @@
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VERSION = 4
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PATCHLEVEL = 9
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SUBLEVEL = 58
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SUBLEVEL = 59
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EXTRAVERSION =
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NAME = Roaring Lionus
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@ -742,7 +742,7 @@ lws_compare_and_swap_2:
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10: ldd 0(%r25), %r25
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11: ldd 0(%r24), %r24
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#else
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/* Load new value into r22/r23 - high/low */
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/* Load old value into r22/r23 - high/low */
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10: ldw 0(%r25), %r22
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11: ldw 4(%r25), %r23
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/* Load new value into fr4 for atomic store later */
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@ -834,11 +834,11 @@ cas2_action:
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copy %r0, %r28
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#else
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/* Compare first word */
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19: ldw,ma 0(%r26), %r29
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19: ldw 0(%r26), %r29
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sub,= %r29, %r22, %r0
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b,n cas2_end
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/* Compare second word */
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20: ldw,ma 4(%r26), %r29
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20: ldw 4(%r26), %r29
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sub,= %r29, %r23, %r0
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b,n cas2_end
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/* Perform the store */
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@ -34,6 +34,7 @@
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#include <linux/mm.h>
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#include <asm/microcode_intel.h>
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#include <asm/intel-family.h>
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#include <asm/processor.h>
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#include <asm/tlbflush.h>
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#include <asm/setup.h>
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@ -1046,6 +1047,18 @@ static int get_ucode_fw(void *to, const void *from, size_t n)
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return 0;
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}
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static bool is_blacklisted(unsigned int cpu)
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{
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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if (c->x86 == 6 && c->x86_model == INTEL_FAM6_BROADWELL_X) {
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pr_err_once("late loading on model 79 is disabled.\n");
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return true;
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}
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return false;
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}
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static enum ucode_state request_microcode_fw(int cpu, struct device *device,
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bool refresh_fw)
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{
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@ -1054,6 +1067,9 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device,
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const struct firmware *firmware;
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enum ucode_state ret;
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if (is_blacklisted(cpu))
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return UCODE_NFOUND;
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sprintf(name, "intel-ucode/%02x-%02x-%02x",
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c->x86, c->x86_model, c->x86_mask);
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@ -1078,6 +1094,9 @@ static int get_ucode_user(void *to, const void *from, size_t n)
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static enum ucode_state
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request_microcode_user(int cpu, const void __user *buf, size_t size)
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{
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if (is_blacklisted(cpu))
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return UCODE_NFOUND;
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return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
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}
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@ -88,6 +88,9 @@ static int pkcs7_check_authattrs(struct pkcs7_message *msg)
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bool want = false;
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sinfo = msg->signed_infos;
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if (!sinfo)
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goto inconsistent;
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if (sinfo->authattrs) {
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want = true;
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msg->have_authattrs = true;
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@ -720,7 +720,7 @@ mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus)
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if (mbus->hw_io_coherency)
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w->mbus_attr |= ATTR_HW_COHERENCY;
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w->base = base & DDR_BASE_CS_LOW_MASK;
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w->size = (size | ~DDR_SIZE_MASK) + 1;
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w->size = (u64)(size | ~DDR_SIZE_MASK) + 1;
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}
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}
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mvebu_mbus_dram_info.num_cs = cs;
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@ -117,7 +117,8 @@ static irqreturn_t mfgpt_tick(int irq, void *dev_id)
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/* Turn off the clock (and clear the event) */
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disable_timer(cs5535_event_clock);
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if (clockevent_state_shutdown(&cs5535_clockevent))
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if (clockevent_state_detached(&cs5535_clockevent) ||
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clockevent_state_shutdown(&cs5535_clockevent))
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return IRQ_HANDLED;
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/* Clear the counter */
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@ -39,5 +39,5 @@ int
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g84_bsp_new(struct nvkm_device *device, int index, struct nvkm_engine **pengine)
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{
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return nvkm_xtensa_new_(&g84_bsp, device, index,
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true, 0x103000, pengine);
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device->chipset != 0x92, 0x103000, pengine);
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}
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@ -240,6 +240,8 @@ nvkm_vm_unmap_pgt(struct nvkm_vm *vm, int big, u32 fpde, u32 lpde)
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mmu->func->map_pgt(vpgd->obj, pde, vpgt->mem);
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}
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mmu->func->flush(vm);
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nvkm_memory_del(&pgt);
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}
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}
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@ -340,12 +340,15 @@ static int ismt_process_desc(const struct ismt_desc *desc,
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data->word = dma_buffer[0] | (dma_buffer[1] << 8);
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break;
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case I2C_SMBUS_BLOCK_DATA:
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case I2C_SMBUS_I2C_BLOCK_DATA:
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if (desc->rxbytes != dma_buffer[0] + 1)
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return -EMSGSIZE;
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memcpy(data->block, dma_buffer, desc->rxbytes);
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break;
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case I2C_SMBUS_I2C_BLOCK_DATA:
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memcpy(&data->block[1], dma_buffer, desc->rxbytes);
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data->block[0] = desc->rxbytes;
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break;
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}
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return 0;
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}
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@ -94,6 +94,12 @@
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#define SB800_PIIX4_PORT_IDX_ALT 0x2e
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#define SB800_PIIX4_PORT_IDX_SEL 0x2f
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#define SB800_PIIX4_PORT_IDX_MASK 0x06
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#define SB800_PIIX4_PORT_IDX_SHIFT 1
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/* On kerncz, SmBus0Sel is at bit 20:19 of PMx00 DecodeEn */
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#define SB800_PIIX4_PORT_IDX_KERNCZ 0x02
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#define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18
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#define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3
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/* insmod parameters */
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@ -149,6 +155,8 @@ static const struct dmi_system_id piix4_dmi_ibm[] = {
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*/
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static DEFINE_MUTEX(piix4_mutex_sb800);
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static u8 piix4_port_sel_sb800;
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static u8 piix4_port_mask_sb800;
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static u8 piix4_port_shift_sb800;
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static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = {
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" port 0", " port 2", " port 3", " port 4"
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};
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@ -347,7 +355,19 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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/* Find which register is used for port selection */
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if (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD) {
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piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT;
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switch (PIIX4_dev->device) {
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case PCI_DEVICE_ID_AMD_KERNCZ_SMBUS:
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piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_KERNCZ;
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piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK_KERNCZ;
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piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ;
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break;
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case PCI_DEVICE_ID_AMD_HUDSON2_SMBUS:
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default:
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piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT;
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piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
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piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
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break;
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}
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} else {
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mutex_lock(&piix4_mutex_sb800);
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outb_p(SB800_PIIX4_PORT_IDX_SEL, SB800_PIIX4_SMB_IDX);
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@ -355,6 +375,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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piix4_port_sel_sb800 = (port_sel & 0x01) ?
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SB800_PIIX4_PORT_IDX_ALT :
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SB800_PIIX4_PORT_IDX;
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piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
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piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
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mutex_unlock(&piix4_mutex_sb800);
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}
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@ -616,8 +638,8 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
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smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
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port = adapdata->port;
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if ((smba_en_lo & SB800_PIIX4_PORT_IDX_MASK) != port)
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outb_p((smba_en_lo & ~SB800_PIIX4_PORT_IDX_MASK) | port,
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if ((smba_en_lo & piix4_port_mask_sb800) != port)
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outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port,
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SB800_PIIX4_SMB_IDX + 1);
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retval = piix4_access(adap, addr, flags, read_write,
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@ -706,7 +728,7 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
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adapdata->smba = smba;
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adapdata->sb800_main = sb800_main;
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adapdata->port = port << 1;
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adapdata->port = port << piix4_port_shift_sb800;
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/* set up the sysfs linkage to our parent device */
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adap->dev.parent = &dev->dev;
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@ -72,6 +72,7 @@ int iio_simple_dummy_write_event_config(struct iio_dev *indio_dev,
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st->event_en = state;
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else
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return -EINVAL;
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break;
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default:
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return -EINVAL;
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}
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@ -333,7 +333,7 @@ static void esd_usb2_rx_can_msg(struct esd_usb2_net_priv *priv,
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}
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cf->can_id = id & ESD_IDMASK;
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cf->can_dlc = get_can_dlc(msg->msg.rx.dlc);
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cf->can_dlc = get_can_dlc(msg->msg.rx.dlc & ~ESD_RTR);
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if (id & ESD_EXTID)
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cf->can_id |= CAN_EFF_FLAG;
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@ -375,6 +375,8 @@ static void gs_usb_receive_bulk_callback(struct urb *urb)
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gs_free_tx_context(txc);
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atomic_dec(&dev->active_tx_urbs);
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netif_wake_queue(netdev);
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}
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@ -463,14 +465,6 @@ static void gs_usb_xmit_callback(struct urb *urb)
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urb->transfer_buffer_length,
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urb->transfer_buffer,
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urb->transfer_dma);
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atomic_dec(&dev->active_tx_urbs);
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if (!netif_device_present(netdev))
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return;
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if (netif_queue_stopped(netdev))
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netif_wake_queue(netdev);
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}
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static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb,
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|
|
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@ -429,7 +429,8 @@ void brcmf_fweh_process_event(struct brcmf_pub *drvr,
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if (code != BRCMF_E_IF && !fweh->evt_handler[code])
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return;
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|
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if (datalen > BRCMF_DCMD_MAXLEN)
|
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if (datalen > BRCMF_DCMD_MAXLEN ||
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datalen + sizeof(*event_packet) > packet_len)
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return;
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|
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if (in_interrupt())
|
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|
|
|
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|
|
@ -14764,8 +14764,8 @@ static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi)
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}
|
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|
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static void
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wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, u8 *events, u8 *dlys,
|
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u8 len)
|
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wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events,
|
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const u8 *dlys, u8 len)
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{
|
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u32 t1_offset, t2_offset;
|
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u8 ctr;
|
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|
|
@ -15240,16 +15240,16 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi)
|
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static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
|
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{
|
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u16 currband;
|
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s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };
|
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s8 *lna1_gain_db = NULL;
|
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s8 *lna1_gain_db_2 = NULL;
|
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s8 *lna2_gain_db = NULL;
|
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s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };
|
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s8 *tia_gain_db;
|
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s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };
|
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s8 *tia_gainbits;
|
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u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };
|
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u16 *rfseq_init_gain;
|
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static const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };
|
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const s8 *lna1_gain_db = NULL;
|
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const s8 *lna1_gain_db_2 = NULL;
|
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const s8 *lna2_gain_db = NULL;
|
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static const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };
|
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const s8 *tia_gain_db;
|
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static const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };
|
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const s8 *tia_gainbits;
|
||||
static const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };
|
||||
const u16 *rfseq_init_gain;
|
||||
u16 init_gaincode;
|
||||
u16 clip1hi_gaincode;
|
||||
u16 clip1md_gaincode = 0;
|
||||
|
|
@ -15310,10 +15310,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
|
|||
|
||||
if ((freq <= 5080) || (freq == 5825)) {
|
||||
|
||||
s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };
|
||||
s8 lna1A_gain_db_2_rev7[] = {
|
||||
11, 17, 22, 25};
|
||||
s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
|
||||
static const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };
|
||||
static const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25};
|
||||
static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
|
||||
|
||||
crsminu_th = 0x3e;
|
||||
lna1_gain_db = lna1A_gain_db_rev7;
|
||||
|
|
@ -15321,10 +15320,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
|
|||
lna2_gain_db = lna2A_gain_db_rev7;
|
||||
} else if ((freq >= 5500) && (freq <= 5700)) {
|
||||
|
||||
s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };
|
||||
s8 lna1A_gain_db_2_rev7[] = {
|
||||
12, 18, 22, 26};
|
||||
s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };
|
||||
static const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };
|
||||
static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};
|
||||
static const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };
|
||||
|
||||
crsminu_th = 0x45;
|
||||
clip1md_gaincode_B = 0x14;
|
||||
|
|
@ -15335,10 +15333,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
|
|||
lna2_gain_db = lna2A_gain_db_rev7;
|
||||
} else {
|
||||
|
||||
s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };
|
||||
s8 lna1A_gain_db_2_rev7[] = {
|
||||
12, 18, 22, 26};
|
||||
s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
|
||||
static const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };
|
||||
static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};
|
||||
static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
|
||||
|
||||
crsminu_th = 0x41;
|
||||
lna1_gain_db = lna1A_gain_db_rev7;
|
||||
|
|
@ -15450,65 +15447,65 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
|
|||
NPHY_RFSEQ_CMD_CLR_HIQ_DIS,
|
||||
NPHY_RFSEQ_CMD_SET_HPF_BW
|
||||
};
|
||||
u8 rfseq_updategainu_dlys[] = { 10, 30, 1 };
|
||||
s8 lna1G_gain_db[] = { 7, 11, 16, 23 };
|
||||
s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };
|
||||
s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };
|
||||
s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };
|
||||
s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };
|
||||
s8 lna1A_gain_db[] = { 7, 11, 17, 23 };
|
||||
s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };
|
||||
s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };
|
||||
s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };
|
||||
s8 *lna1_gain_db = NULL;
|
||||
s8 lna2G_gain_db[] = { -5, 6, 10, 14 };
|
||||
s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };
|
||||
s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };
|
||||
s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };
|
||||
s8 lna2A_gain_db[] = { -6, 2, 6, 10 };
|
||||
s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };
|
||||
s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };
|
||||
s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };
|
||||
s8 *lna2_gain_db = NULL;
|
||||
s8 tiaG_gain_db[] = {
|
||||
static const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 };
|
||||
static const s8 lna1G_gain_db[] = { 7, 11, 16, 23 };
|
||||
static const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };
|
||||
static const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };
|
||||
static const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };
|
||||
static const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };
|
||||
static const s8 lna1A_gain_db[] = { 7, 11, 17, 23 };
|
||||
static const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };
|
||||
static const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };
|
||||
static const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };
|
||||
const s8 *lna1_gain_db = NULL;
|
||||
static const s8 lna2G_gain_db[] = { -5, 6, 10, 14 };
|
||||
static const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };
|
||||
static const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };
|
||||
static const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };
|
||||
static const s8 lna2A_gain_db[] = { -6, 2, 6, 10 };
|
||||
static const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };
|
||||
static const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };
|
||||
static const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };
|
||||
const s8 *lna2_gain_db = NULL;
|
||||
static const s8 tiaG_gain_db[] = {
|
||||
0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A };
|
||||
s8 tiaA_gain_db[] = {
|
||||
static const s8 tiaA_gain_db[] = {
|
||||
0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 };
|
||||
s8 tiaA_gain_db_rev4[] = {
|
||||
static const s8 tiaA_gain_db_rev4[] = {
|
||||
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
|
||||
s8 tiaA_gain_db_rev5[] = {
|
||||
static const s8 tiaA_gain_db_rev5[] = {
|
||||
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
|
||||
s8 tiaA_gain_db_rev6[] = {
|
||||
static const s8 tiaA_gain_db_rev6[] = {
|
||||
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
|
||||
s8 *tia_gain_db;
|
||||
s8 tiaG_gainbits[] = {
|
||||
const s8 *tia_gain_db;
|
||||
static const s8 tiaG_gainbits[] = {
|
||||
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 };
|
||||
s8 tiaA_gainbits[] = {
|
||||
static const s8 tiaA_gainbits[] = {
|
||||
0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 };
|
||||
s8 tiaA_gainbits_rev4[] = {
|
||||
static const s8 tiaA_gainbits_rev4[] = {
|
||||
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
|
||||
s8 tiaA_gainbits_rev5[] = {
|
||||
static const s8 tiaA_gainbits_rev5[] = {
|
||||
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
|
||||
s8 tiaA_gainbits_rev6[] = {
|
||||
static const s8 tiaA_gainbits_rev6[] = {
|
||||
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
|
||||
s8 *tia_gainbits;
|
||||
s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };
|
||||
s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };
|
||||
u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };
|
||||
u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };
|
||||
u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };
|
||||
u16 rfseqG_init_gain_rev5_elna[] = {
|
||||
const s8 *tia_gainbits;
|
||||
static const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };
|
||||
static const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };
|
||||
static const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };
|
||||
static const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };
|
||||
static const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };
|
||||
static const u16 rfseqG_init_gain_rev5_elna[] = {
|
||||
0x013f, 0x013f, 0x013f, 0x013f };
|
||||
u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };
|
||||
u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };
|
||||
u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };
|
||||
u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };
|
||||
u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };
|
||||
u16 rfseqA_init_gain_rev4_elna[] = {
|
||||
static const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };
|
||||
static const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };
|
||||
static const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };
|
||||
static const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };
|
||||
static const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };
|
||||
static const u16 rfseqA_init_gain_rev4_elna[] = {
|
||||
0x314f, 0x314f, 0x314f, 0x314f };
|
||||
u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };
|
||||
u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };
|
||||
u16 *rfseq_init_gain;
|
||||
static const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };
|
||||
static const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };
|
||||
const u16 *rfseq_init_gain;
|
||||
u16 initG_gaincode = 0x627e;
|
||||
u16 initG_gaincode_rev4 = 0x527e;
|
||||
u16 initG_gaincode_rev5 = 0x427e;
|
||||
|
|
@ -15538,10 +15535,10 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
|
|||
u16 clip1mdA_gaincode_rev6 = 0x2084;
|
||||
u16 clip1md_gaincode = 0;
|
||||
u16 clip1loG_gaincode = 0x0074;
|
||||
u16 clip1loG_gaincode_rev5[] = {
|
||||
static const u16 clip1loG_gaincode_rev5[] = {
|
||||
0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c
|
||||
};
|
||||
u16 clip1loG_gaincode_rev6[] = {
|
||||
static const u16 clip1loG_gaincode_rev6[] = {
|
||||
0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e
|
||||
};
|
||||
u16 clip1loG_gaincode_rev6_224B0 = 0x1074;
|
||||
|
|
@ -16066,7 +16063,7 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
|
|||
|
||||
static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
{
|
||||
u8 rfseq_rx2tx_events[] = {
|
||||
static const u8 rfseq_rx2tx_events[] = {
|
||||
NPHY_RFSEQ_CMD_NOP,
|
||||
NPHY_RFSEQ_CMD_RXG_FBW,
|
||||
NPHY_RFSEQ_CMD_TR_SWITCH,
|
||||
|
|
@ -16076,7 +16073,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
|||
NPHY_RFSEQ_CMD_EXT_PA
|
||||
};
|
||||
u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 };
|
||||
u8 rfseq_tx2rx_events[] = {
|
||||
static const u8 rfseq_tx2rx_events[] = {
|
||||
NPHY_RFSEQ_CMD_NOP,
|
||||
NPHY_RFSEQ_CMD_EXT_PA,
|
||||
NPHY_RFSEQ_CMD_TX_GAIN,
|
||||
|
|
@ -16085,8 +16082,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
|||
NPHY_RFSEQ_CMD_RXG_FBW,
|
||||
NPHY_RFSEQ_CMD_CLR_HIQ_DIS
|
||||
};
|
||||
u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };
|
||||
u8 rfseq_tx2rx_events_rev3[] = {
|
||||
static const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };
|
||||
static const u8 rfseq_tx2rx_events_rev3[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_EXT_PA,
|
||||
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
|
||||
NPHY_REV3_RFSEQ_CMD_TX_GAIN,
|
||||
|
|
@ -16096,7 +16093,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
|||
NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS,
|
||||
NPHY_REV3_RFSEQ_CMD_END
|
||||
};
|
||||
u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };
|
||||
static const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };
|
||||
u8 rfseq_rx2tx_events_rev3[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_NOP,
|
||||
NPHY_REV3_RFSEQ_CMD_RXG_FBW,
|
||||
|
|
@ -16110,7 +16107,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
|||
};
|
||||
u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 };
|
||||
|
||||
u8 rfseq_rx2tx_events_rev3_ipa[] = {
|
||||
static const u8 rfseq_rx2tx_events_rev3_ipa[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_NOP,
|
||||
NPHY_REV3_RFSEQ_CMD_RXG_FBW,
|
||||
NPHY_REV3_RFSEQ_CMD_TR_SWITCH,
|
||||
|
|
@ -16121,15 +16118,15 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
|||
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
|
||||
NPHY_REV3_RFSEQ_CMD_END
|
||||
};
|
||||
u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
|
||||
u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };
|
||||
static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
|
||||
static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };
|
||||
|
||||
s16 alpha0, alpha1, alpha2;
|
||||
s16 beta0, beta1, beta2;
|
||||
u32 leg_data_weights, ht_data_weights, nss1_data_weights,
|
||||
stbc_data_weights;
|
||||
u8 chan_freq_range = 0;
|
||||
u16 dac_control = 0x0002;
|
||||
static const u16 dac_control = 0x0002;
|
||||
u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 };
|
||||
u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 };
|
||||
u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 };
|
||||
|
|
@ -16139,8 +16136,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
|||
u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 };
|
||||
u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 };
|
||||
u16 *aux_adc_gain;
|
||||
u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };
|
||||
u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };
|
||||
static const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };
|
||||
static const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };
|
||||
s32 min_nvar_val = 0x18d;
|
||||
s32 min_nvar_offset_6mbps = 20;
|
||||
u8 pdetrange;
|
||||
|
|
@ -16151,9 +16148,9 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
|||
u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };
|
||||
u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
static const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };
|
||||
static const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
static const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
u16 ipalvlshift_3p3_war_en = 0;
|
||||
u16 rccal_bcap_val, rccal_scap_val;
|
||||
u16 rccal_tx20_11b_bcap = 0;
|
||||
|
|
@ -24291,13 +24288,13 @@ static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core)
|
|||
u16 bbmult;
|
||||
u16 tblentry;
|
||||
|
||||
struct nphy_txiqcal_ladder ladder_lo[] = {
|
||||
static const struct nphy_txiqcal_ladder ladder_lo[] = {
|
||||
{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},
|
||||
{25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5},
|
||||
{25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7}
|
||||
};
|
||||
|
||||
struct nphy_txiqcal_ladder ladder_iq[] = {
|
||||
static const struct nphy_txiqcal_ladder ladder_iq[] = {
|
||||
{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},
|
||||
{25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1},
|
||||
{100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7}
|
||||
|
|
@ -25773,67 +25770,67 @@ wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain,
|
|||
u16 cal_gain[2];
|
||||
struct nphy_iqcal_params cal_params[2];
|
||||
u32 tbl_len;
|
||||
void *tbl_ptr;
|
||||
const void *tbl_ptr;
|
||||
bool ladder_updated[2];
|
||||
u8 mphase_cal_lastphase = 0;
|
||||
int bcmerror = 0;
|
||||
bool phyhang_avoid_state = false;
|
||||
|
||||
u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {
|
||||
0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901,
|
||||
0x1902,
|
||||
0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607,
|
||||
0x6407
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {
|
||||
0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400,
|
||||
0x3200,
|
||||
0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406,
|
||||
0x6407
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {
|
||||
0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201,
|
||||
0x1202,
|
||||
0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207,
|
||||
0x4707
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {
|
||||
0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900,
|
||||
0x2300,
|
||||
0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706,
|
||||
0x4707
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_startcoefs[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_startcoefs[] = {
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {
|
||||
0x8123, 0x8264, 0x8086, 0x8245, 0x8056,
|
||||
0x9123, 0x9264, 0x9086, 0x9245, 0x9056
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_recal[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_recal[] = {
|
||||
0x8101, 0x8253, 0x8053, 0x8234, 0x8034,
|
||||
0x9101, 0x9253, 0x9053, 0x9234, 0x9034
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {
|
||||
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234,
|
||||
0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {
|
||||
0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223,
|
||||
0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1128,7 +1128,7 @@ static u8 _rtl8821ae_dbi_read(struct rtl_priv *rtlpriv, u16 addr)
|
|||
}
|
||||
if (0 == tmp) {
|
||||
read_addr = REG_DBI_RDATA + addr % 4;
|
||||
ret = rtl_read_byte(rtlpriv, read_addr);
|
||||
ret = rtl_read_word(rtlpriv, read_addr);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1773,6 +1773,9 @@ static const struct usb_device_id acm_ids[] = {
|
|||
{ USB_DEVICE(0xfff0, 0x0100), /* DATECS FP-2000 */
|
||||
.driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */
|
||||
},
|
||||
{ USB_DEVICE(0x09d8, 0x0320), /* Elatec GmbH TWN3 */
|
||||
.driver_info = NO_UNION_NORMAL, /* has misplaced union descriptor */
|
||||
},
|
||||
|
||||
{ USB_DEVICE(0x2912, 0x0001), /* ATOL FPrint */
|
||||
.driver_info = CLEAR_HALT_CONDITIONS,
|
||||
|
|
|
|||
|
|
@ -955,10 +955,12 @@ int usb_get_bos_descriptor(struct usb_device *dev)
|
|||
for (i = 0; i < num; i++) {
|
||||
buffer += length;
|
||||
cap = (struct usb_dev_cap_header *)buffer;
|
||||
length = cap->bLength;
|
||||
|
||||
if (total_len < length)
|
||||
if (total_len < sizeof(*cap) || total_len < cap->bLength) {
|
||||
dev->bos->desc->bNumDeviceCaps = i;
|
||||
break;
|
||||
}
|
||||
length = cap->bLength;
|
||||
total_len -= length;
|
||||
|
||||
if (cap->bDescriptorType != USB_DT_DEVICE_CAPABILITY) {
|
||||
|
|
|
|||
|
|
@ -1577,11 +1577,7 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
|
|||
totlen += isopkt[u].length;
|
||||
}
|
||||
u *= sizeof(struct usb_iso_packet_descriptor);
|
||||
if (totlen <= uurb->buffer_length)
|
||||
uurb->buffer_length = totlen;
|
||||
else
|
||||
WARN_ONCE(1, "uurb->buffer_length is too short %d vs %d",
|
||||
totlen, uurb->buffer_length);
|
||||
uurb->buffer_length = totlen;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -2704,13 +2704,16 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
|
|||
if (!(portstatus & USB_PORT_STAT_CONNECTION))
|
||||
return -ENOTCONN;
|
||||
|
||||
/* bomb out completely if the connection bounced. A USB 3.0
|
||||
* connection may bounce if multiple warm resets were issued,
|
||||
/* Retry if connect change is set but status is still connected.
|
||||
* A USB 3.0 connection may bounce if multiple warm resets were issued,
|
||||
* but the device may have successfully re-connected. Ignore it.
|
||||
*/
|
||||
if (!hub_is_superspeed(hub->hdev) &&
|
||||
(portchange & USB_PORT_STAT_C_CONNECTION))
|
||||
return -ENOTCONN;
|
||||
(portchange & USB_PORT_STAT_C_CONNECTION)) {
|
||||
usb_clear_port_feature(hub->hdev, port1,
|
||||
USB_PORT_FEAT_C_CONNECTION);
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
if (!(portstatus & USB_PORT_STAT_ENABLE))
|
||||
return -EBUSY;
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue