221 lines
6.7 KiB
Text
221 lines
6.7 KiB
Text
###############################################################################
|
|
# NXP RF configuration ALM/PLM settings
|
|
# This section needs to be updated with the correct values based on the platform
|
|
NXP_RF_CONF_BLK_1={
|
|
20, 02, FB, 1E,
|
|
A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
|
|
A0, 0D, 06, 04, 35, F5, 05, 80, 01,
|
|
A0, 0D, 06, C2, 34, F7, 7F, 10, 08,
|
|
A0, 0D, 06, C2, 33, 03, 40, 04, 80,
|
|
A0, 0D, 06, 06, 44, 04, 04, C4, 00,
|
|
A0, 0D, 06, 06, 30, 70, 00, 18, 00,
|
|
A0, 0D, 06, 06, 2F, EF, AD, 80, 01,
|
|
A0, 0D, 06, 06, 85, 25, 13, 00, 00,
|
|
A0, 0D, 03, 32, 0D, 26,
|
|
A0, 0D, 03, 32, 14, 26,
|
|
A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
|
|
A0, 0D, 06, 34, 44, 66, 0A, 00, 00,
|
|
A0, 0D, 06, 3C, 2D, 05, 35, 1E, 01,
|
|
A0, 0D, 06, 3C, 44, 65, 09, 00, 00,
|
|
A0, 0D, 03, 3E, 0D, 08,
|
|
A0, 0D, 03, 3E, 14, 08,
|
|
A0, 0D, 06, 40, 2D, 05, 45, 1E, 01,
|
|
A0, 0D, 06, 40, 44, 65, 09, 00, 00,
|
|
A0, 0D, 06, 42, 4A, 11, 07, 01, 1B,
|
|
A0, 0D, 03, 42, 0D, 04,
|
|
A0, 0D, 03, 42, 14, 04,
|
|
A0, 0D, 06, 44, 2D, 05, 25, 0F, 01,
|
|
A0, 0D, 06, 44, 44, 55, 0A, 00, 00,
|
|
A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
|
|
A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
|
|
A0, 0D, 06, 46, 4A, 34, 07, 00, 07,
|
|
A0, 0D, 04, 46, 42, 70, 40,
|
|
A0, 0D, 06, 4C, 44, 65, 09, 00, 00,
|
|
A0, 0D, 06, 4C, 2D, 05, 35, 1E, 01,
|
|
A0, 0D, 06, 4A, 4A, 43, 07, 01, 07
|
|
}
|
|
|
|
###############################################################################
|
|
# NXP RF configuration ALM/PLM settings
|
|
# This section needs to be updated with the correct values based on the platform
|
|
NXP_RF_CONF_BLK_2={
|
|
20, 02, FA, 1D,
|
|
A0, 0D, 04, 4A, 42, 70, 40,
|
|
A0, 0D, 06, 50, 44, 65, 09, 00, 00,
|
|
A0, 0D, 06, 50, 2D, 05, 35, 1E, 01,
|
|
A0, 0D, 06, 4E, 4A, 32, 07, 01, 07,
|
|
A0, 0D, 04, 4E, 42, 70, 40,
|
|
A0, 0D, 06, 54, 44, 65, 0A, 00, 00,
|
|
A0, 0D, 06, 54, 2D, 05, 25, 0F, 01,
|
|
A0, 0D, 04, 52, 42, 70, 40,
|
|
A0, 0D, 06, 52, 4A, 11, 07, 01, 07,
|
|
A0, 0D, 06, 58, 44, 55, 08, 00, 00,
|
|
A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
|
|
A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
|
|
A0, 0D, 04, 56, 42, 78, 40,
|
|
A0, 0D, 04, 5C, 42, 88, 40,
|
|
A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
|
|
A0, 0D, 06, 30, 44, 05, 04, C4, 00,
|
|
A0, 0D, 06, 30, 85, 25, 03, 00, 00,
|
|
A0, 0D, 06, 70, 44, 04, 04, C4, 00,
|
|
A0, 0D, 06, 70, 85, 25, 13, 00, 00,
|
|
A0, 0D, 06, 78, 44, 02, 04, C4, 00,
|
|
A0, 0D, 06, 78, 85, 25, 03, 00, 00,
|
|
A0, 0D, 04, 78, 2E, 60, 69,
|
|
A0, 0D, 06, 7C, 2F, 51, 0E, 10, C1,
|
|
A0, 0D, 06, 80, 2F, E3, AD, 80, 04,
|
|
A0, 0D, 06, 80, 30, 70, 00, 18, 00,
|
|
A0, 0D, 06, 80, 44, 04, 04, C4, 00,
|
|
A0, 0D, 06, 80, 85, 25, 13, 00, 00,
|
|
A0, 0D, 06, 8C, 2F, 6F, 5C, 80, 04,
|
|
A0, 0D, 06, 8C, 30, 70, 00, 18, 00
|
|
}
|
|
|
|
###############################################################################
|
|
# NXP RF configuration ALM/PLM settings
|
|
# This section needs to be updated with the correct values based on the platform
|
|
NXP_RF_CONF_BLK_3={
|
|
20, 02, 5F, 0B,
|
|
A0, 0D, 06, 0A, 34, F7, 7F, 10, 08,
|
|
A0, 0D, 06, 0A, 33, 03, 40, 04, 80,
|
|
A0, 0D, 06, C6, 42, 78, 40, FF, FF,
|
|
A0, 0D, 06, C8, 42, 88, 40, FF, FF,
|
|
A0, 0D, 04, CA, 42, 70, 40,
|
|
A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
|
|
A0, 0D, 06, CA, 2D, 15, 34, 1F, 01,
|
|
A0, 0D, 06, 06, 42, 00, 00, FF, FF,
|
|
A0, 0D, 03, 24, 03, 80,
|
|
A0, 0D, 06, 04, 42, F8, 40, FF, FF,
|
|
A0, 0D, 06, 06, 37, 08, 76, 00, 00
|
|
}
|
|
|
|
###############################################################################
|
|
# NXP RF configuration ALM/PLM settings
|
|
# This section needs to be updated with the correct values based on the platform
|
|
NXP_RF_CONF_BLK_4={
|
|
20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 47, 40,
|
|
00, 20, 00, 00, 1A, 20, 00, 00,
|
|
41, 20, 00, 00, 6B, 00, 08, 02,
|
|
FB, 00, 08, 02, C6, 01, 28, 02,
|
|
1D, 03, 38, 02, 00, 00, 08, 02,
|
|
00, 00, 08, 02, 00, 00, 08, 02,
|
|
00, 00, 08, 02, 00, 00, 08, 02,
|
|
00, 00, 08, 02, 00, 00, 48, 01,
|
|
00, 00, 08, 03, 00, 00, 08, 01,
|
|
00, 00, C8, 02, 00, 00, C8, 00,
|
|
00, 00, 88, 02, 00, 00, 48, 02,
|
|
00, 00, B8, 00, 00, 00, 68, 00,
|
|
00, 00, 18, 00, 00, 00, 08, 02,
|
|
00, 00, 00, 00, 00, 00, 00, 00,
|
|
47,
|
|
00, 20, 00, 00, 1A, 20, 00, 00,
|
|
41, 20, 00, 00, 6B, 00, 08, 02,
|
|
FB, 00, 08, 02, C6, 01, 38, 02,
|
|
1D, 43, 3D, 02, 00, 00, 08, 02,
|
|
00, 00, 08, 02, 00, 00, 08, 02,
|
|
00, 00, 08, 02, 00, 00, 08, 02,
|
|
00, 00, 08, 02, 00, 00, 48, 01,
|
|
00, 00, 08, 03, 00, 00, 08, 01,
|
|
00, 00, C8, 02, 00, 00, C8, 00,
|
|
00, 00, 88, 02, 00, 00, 48, 02,
|
|
00, 00, B8, 00, 00, 00, 68, 00,
|
|
00, 00, 18, 00, 00, 00, 08, 02,
|
|
00, 00, 00, 00
|
|
}
|
|
|
|
###############################################################################
|
|
# NXP RF configuration ALM/PLM settings
|
|
# This section needs to be updated with the correct values based on the platform
|
|
NXP_RF_CONF_BLK_5={
|
|
20, 02, 5B, 01, A0, 0B, 57, 03, 03, 90, 78, 0F,
|
|
4E, 00, 3D, 95,
|
|
00, 00, 3D, 95,
|
|
00, 00, 50, 95,
|
|
00, 00, 59, 95,
|
|
00, 00, 5A, 1F,
|
|
00, 00, 64, 1F,
|
|
00, 00, 65, 1F,
|
|
00, 00, 6E, 1F,
|
|
00, 00, 72, 1F,
|
|
00, 00, 79, 1F,
|
|
00, 00, 7B, 1F,
|
|
00, 00, 84, 1F,
|
|
00, 00, 86, 1F,
|
|
00, 00, 8F, 1F,
|
|
00, 00, 91, 1F,
|
|
00, 00, 9A, 1F,
|
|
00, 00, A1, 1F,
|
|
00, 00, A7, 1F,
|
|
00, 00, B0, 1F,
|
|
00, 00, B9, 1F,
|
|
00, 00
|
|
}
|
|
|
|
###############################################################################
|
|
# NXP RF configuration ALM/PLM settings
|
|
# This section needs to be updated with the correct values based on the platform
|
|
#NXP_RF_CONF_BLK_6={
|
|
#}
|
|
|
|
###############################################################################
|
|
# Core configuration extensions
|
|
# It includes
|
|
# Wired mode settings A0ED, A0EE
|
|
# Tag Detector A040, A041, A043
|
|
# Low Power mode A007
|
|
# Clock settings A002, A003
|
|
# PbF settings A008
|
|
# Clock timeout settings A004
|
|
# eSE (SVDD) PWR REQ settings A0F2
|
|
# How eSE connected to PN553 A012
|
|
# UICC bit rate A0D1
|
|
# SWP1A interface A0D4
|
|
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 - A037
|
|
# For Symmetric baud rate UICC's set A086 to 77
|
|
NXP_CORE_CONF_EXTN={20, 02, 3A, 0E,
|
|
A0, EC, 01, 01,
|
|
A0, ED, 01, 00,
|
|
A0, 5E, 01, 01,
|
|
A0, 12, 01, 02,
|
|
A0, 40, 01, 01,
|
|
A0, 41, 01, 06,
|
|
A0, 43, 01, 00,
|
|
A0, DD, 01, 2D,
|
|
A0, D1, 01, 02,
|
|
A0, D4, 01, 00,
|
|
A0, 37, 01, 11,
|
|
A0, 07, 01, 03,
|
|
A0, B1, 02, EC, 13,
|
|
A0, 86, 01, 77
|
|
}
|
|
# A0, F2, 01, 01,
|
|
# A0, 40, 01, 01,
|
|
# A0, 41, 01, 02,
|
|
# A0, 43, 01, 04,
|
|
# A0, 02, 01, 01,
|
|
# A0, 03, 01, 11,
|
|
# A0, 07, 01, 03,
|
|
# A0, 08, 01, 01
|
|
# }
|
|
|
|
###############################################################################
|
|
# Core configuration settings
|
|
NXP_CORE_CONF={ 20, 02, 39, 0F,
|
|
28, 01, 00,
|
|
21, 01, 00,
|
|
30, 01, 08,
|
|
31, 01, 03,
|
|
32, 01, 60,
|
|
38, 01, 01,
|
|
33, 04, 01, 02, 03, 04,
|
|
54, 01, 06,
|
|
50, 01, 02,
|
|
5B, 01, 00,
|
|
80, 01, 01,
|
|
81, 01, 01,
|
|
82, 01, 0E,
|
|
18, 01, 01,
|
|
A0, 3A, 08, 50, 00, 5A, 00, 3C, 00, 50, 00
|
|
}
|
|
###############################################################################
|
|
|